# Part reliability

Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html)

This topic provides the reliability data, including a definition of the qualification samples
      and a summary of qualification test results.

## Reliability qualification summary

Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html)

The following table provides the reliability evaluation report for QCS6490 and QCS5430 for the foundry source TSMC‑F15.

Table : Silicon reliability results

| Tests, standards, and conditions | Sample size | Result |
| --- | :---: | :---: |
| **ELFR in DPPM**<br><br><br>              <br>HTOL: JESD22-A108-A<br><br><br>              <br>(Total samples from 3 different wafer lots) | 333 | Pass |
| **HTOL in FIT (** **l** **) failure in billion device hours** HTOL: JESD22-A108-A<br><br><br>              <br>(Total samples from 3 different wafer lots) | 333 | Pass |
| **Mean time to failure (MTTF) t =** **1** **/** **l in million hours**<br><br><br>              <br>(Total samples from 3 different wafer lots) | 333 | &gt; 20 |
| **ESD – human-body model (HBM) rating**<br><br><br>              <br>JS001-2017<br><br><br>              <br>(Total samples from 1 wafer lot) | 21 | Pass<br><br><br>              <br>±1 kV |
| **ESD – charged-device model (CDM) rating**<br><br><br>              <br>JS-002-2014<br><br><br>              <br>(Total samples from 1 wafer lot) | 6 | Pass<br><br><br>              <br>± 250 V |
| **Latch-up (I-test)**: EIA/JESD78E<br><br><br>              <br>Trigger current: ±100 mA; temperature: 85°C<br><br><br>              <br>(Total samples from 1 wafer lot) | 6 | Pass<br><br><br>              <br>Class II, Level A |
| **Latch-up (Vsupply overvoltage)**: EIA/JESD78E<br><br><br>              <br>Trigger voltage: Each VDD pin, stress at 1.5 × V<sub class="ph sub">ddmax</sub> per device specification; temperature: 85°C<br><br><br>              <br>(Total samples from 1 wafer lot) | 6 | Pass<br><br><br>              <br>Class II, Level a |

The following table provides the package reliability results for QCS6490 and QCS5430.

Table : Package reliability results

| Tests, standards, and conditions | ASE sample size | SPIL sample size | SCK sample size | Results |
| :---: | :---: | :---: | :---: | :---: |
| **Moisture resistance test (MRT)**: J-STD-020C<br><br><br>              <br>MSL3, reflow at 260 +0/-5°C<br><br><br>              <br>(Total samples from 3 different assembly lots) | 2205 | 2205 | 2250 | Pass |
| **Temperature cycle:** JESD22-A104<br><br><br>              <br>Temperature: -55°C to 125°C; number of cycles: 1000<br><br><br>              <br>Soak time at minimum/maximum temperature: 8–10 minutes<br><br><br>              <br>Cycle rate: 2 cycles per hour (cph)<br><br><br>              <br>Preconditioning: JESD22-A113-H<br><br><br>              <br>MSL3, reflow temperature: 260 +0/-5°C<br><br><br>              <br>(Total samples from 3 different assembly lots) | 765 | 765 | 765 | Pass |
| **Unbiased highly accelerated stress test**: JESD22-A118<br><br><br>              <br>130°C/85% RH and 96‑hour duration<br><br><br>              <br>Preconditioning: JESD22-A113-H<br><br><br>              <br>MSL3, reflow temperature: 260 +0/-5°C<br><br><br>              <br>(Total samples from 3 different assembly lots) | 715 | 715 | 715 | Pass |
| **Biased highly accelerated stress test**: JESD22-A110<br><br><br>              <br>130°C/85% RH and 96‑hour duration<br><br><br>              <br>Preconditioning: JESD22-A113-H<br><br><br>              <br>MSL3, reflow temperature: 260 +0/-5°C<br><br><br>              <br>(Total samples from 3 different assembly lots) | 360<br><br><br>              <br>Pass | 360 | 351 | Pass |
| **High-temperature storage life**: JESD22-A103<br><br><br>              <br>Temperature 150°C, 500, 1000 hours<br><br><br>              <br>(Total samples from 3 different assembly lots) | 765 | 765 | 765 | Pass |
| **Flammability**<br><br><br>              <br>Note: Flammability test – not required<br><br><br>              <br>UL-STD-94 | – | – | – | Note [^1^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#fntarg_1_reliability-evaluation-summary) |
| **Physical dimensions**: JESD22-B100-A<br><br><br>              <br>Case outline drawing: QTI internal document<br><br><br>              <br>(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass |
| **Die shear**<br><br><br>              <br>MIL-STD-883E, Method 2019<br><br><br>              <br>(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#concept.dita_77d8420b-5f99-4843-a1f9-7ac9c5024b11__fn_lhy_dgk_tpb) |
| **Solder bump shear**<br><br><br>              <br>(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#concept.dita_77d8420b-5f99-4843-a1f9-7ac9c5024b11__fn_lhy_dgk_tpb) |
| **Solder ball shear**: JESD22-B117<br><br><br>              <br>(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#concept.dita_77d8420b-5f99-4843-a1f9-7ac9c5024b11__fn_lhy_dgk_tpb) |
| Internal/external visual<br><br><br>              <br>(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass |

[^1^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#fnsrc_1_reliability-evaluation-summary)  Qualcomm Technologies, Inc. (QTI) ICs are exempt from the
                flammability requirements due to their sizes per UL/EN 60950-1, as long as they are
                mounted on materials rated V-1 or better. Most PWBs onto which QTI ICs are mounted,
                are rated V-0 (better than V-1).

^2^  Data is based on other previously qualified PSP
                  packages that are similar to this configuration.

## Qualification sample description

Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html)

The following table provides details of the category and definition of the device.

Table : Device characteristics

| Category | Definition |
| :---: | :---: |
| Device name | QCS6490 and QCS5430 |
| Package type | 1287 PSP |
| Package body size | 14.0 × 12.0 × 0.91 mm |
| Ball count | 1287 |
| Ball composition | SAC125/Ni |
| Fab process | 6 nm |
| Supply sources (fab sites) | TSMC |
| Assembly sites | ASE, Taiwan; JCET STATS ChipPAC, Korea; SPIL, Taiwan |
| Solder ball pitch | 0.35 mm |

Last Published: Sep 23, 2025

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