# Electrical specifications Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) This topic defines the device electrical performance specifications, including absolute maximum ratings, operating conditions, and subsystem (such as memory and connectivity) parameters, which are useful in deploying the device with optimal processing capabilities and high efficiency. ## Absolute maximum ratings Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The absolute maximum ratings table reflects the stress levels that, if exceeded, may cause permanent damage to the device. No functionality is guaranteed outside the operating specifications. Functionality and reliability are only guaranteed within the operating conditions described in [Operating conditions](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#lha1594361067630). | Parameter | Parameter | Minimum | Maximum | Unit | | --- | --- | --- | --- | --- | | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | | VDD\_APC | Kryo application processor | -0.30 | 1.36 | V | | VDD\_CX | Digital core circuit | -0.30 | 1.18 | V | | VDD\_CX\_WLAN | WLAN core circuit | -0.30 | 0.86 | V | | VDD\_MX


VDD\_MX\_TXDAC


VDD\_A\_APC\_PLL\_0P9


VDD\_A\_EBI\_0\_0P9


VDD\_A\_EBI\_1\_0P9


VDD\_A\_DSI\_0P9


VDD\_A\_EBI\_CC\_0P9 | On-chip memory


TXDAC memory circuit


APC PLL circuit


EBI0 circuit


EBI1 circuit


DSI 0.9 V circuit


EBI clock circuit | -0.30 | 1.18 | V | | VDD\_CX\_LPI | LPI digital core circuit | -0.30 | 1.18 | V | | VDD\_MX\_LPI | LPI memory circuit | -0.30 | 1.18 | V | | VDD\_A\_EBI\_PLL\_0P9


VDD\_A\_QREFS\_0P9 | EBI PLL circuit


Reference voltage for QREFS 0P9 circuit | -0.30 | 1.04 | V | | VDD\_A\_USB\_HS\_1P8


VDD\_A\_USB\_SS\_1P8


VDD\_A\_AUDIO\_PLL\_1P8


VDD\_A\_CAMSS\_PLL\_1P8


VDD\_PX11


VDD\_QFPROM


VDD\_A2


VDD\_A\_WLAN\_PLL\_1P8


VDD\_A\_MODEM\_PLL\_1P8 | USB HS 1.8 V circuit


USB SS 1.8 V circuit


Audio PLL circuit


Camera PLL circuit


CXO pad


QFPROM circuit


High voltage – analog circuit


WLAN PLL circuit


Modem PLL circuit | -0.3 | 2.06 | V | | VDD\_A\_CSI\_0\_1P2


VDD\_A\_CSI\_1\_1P2


VDD\_A\_DSI\_PLL\_1P2


VDD\_A\_DSI\_1P2


VDD\_A1


VDD\_A\_PLL\_HV\_CC\_EBI\_1P2 | CSI0 1.2 V circuit


CSI1 1.2 V circuit


DSI PLL circuit


DSI 1.2 V circuit


Low voltage – analog circuit


EBI PLL high voltage circuit | -0.3 | 1.39 | V | | VDD\_IO\_EBI\_0\_CK


VDD\_IO\_EBI\_1\_CK


VDD\_IO\_EBI | EBI0 I/O clock circuit


EBI1 I/O clock circuit


EBI I/O circuit | -0.3 | 1.37 | V | | VDD\_A\_WLAN\_ADCDAC0\_1P3


VDD\_A\_WLAN\_ADCDAC1\_1P3 | WLAN ADC and DAC 0


WLAN ADC and DAC 1 | -0.3 | 1.43 | V | | VDD\_A\_USB\_SS\_0P9


VDD\_USB\_HS\_0P9 | USB SS 0P9 circuit


USB HS 0.9 V circuit | 0.3 | 1.04 | V | | VDD\_A\_USB\_HS\_3P1 | USB HS 3.1 V circuit | -0.3 | 3.52 | V | | VDD\_SDCREF\_1P25


VDD\_REF\_1P25 | Reference voltage for SDC


Reference voltage | -0.3 | 1.43 | V | | VDD\_PX0 | Pad group 0 | -0.3 | 2.09 | V | | VDD\_PX1 | EBI I/O circuit | -0.3 | 1.37 | V | | VDD\_PX2 | Pad group 2 – SDC2 pad


Low voltage


High voltage | -0.3 | 3.41 | V | | VDD\_PX3 | Pad group 3 – most I/O pad | -0.3 | 2.09 | V | | VDD\_PX5 | Pad group 5


Low voltage


High voltage | -0.3 | 3.41 | V | | VDD\_PX6 | Pad group 6


Low voltage


High voltage | -0.3 | 3.41 | V | | VDD\_PX7 | Pad group 7 – eMMC pad | -0.30 | 2.09 | V | | TS | Storage temperature [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Absolute_maximum_ratings) [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Absolute_maximum_ratings) | -55 | 150 | °C | [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_1_Absolute_maximum_ratings) The storage temperature range applies when the device is in the OFF state (the device is not assembled in any platform and is not electrically connected to any voltage or I/O signals). Damage may occur when the device is subjected to this temperature for any length of time. [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_2_Absolute_maximum_ratings) For devices shipped in tape and reel, the storage temperature range is [+15°C~35°C] and < -90% relative humidity (RH). QTI recommends allowing the device to return to ambient room temperature before usage. ## Operating conditions Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Operating conditions include design team-controlled parameters such as power supply voltage, power distribution impedances, and thermal conditions ([Table : Operating conditions](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#lha1594361067630__table_b1b_lyc_hlb)). The QRB2210 meets all performance specifications listed in [Power delivery network specification](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#zbg1594361113396) through [Power management interfaces](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#qsz1606112453689), when used within the operating conditions, unless otherwise noted in those sections (provided the absolute maximum ratings have never been exceeded). | Parameter[^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Operating_conditions) | Parameter[^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Operating_conditions) | Min | Max | Unit | | --- | --- | --- | --- | --- | | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | | VDD\_APC | Kryo application processor | | | V | | VDD\_APC | Turbo-L2 | 0.87 | 1.23 | V | | VDD\_APC | Turbo-L1 | 0.82 | 1.16 | V | | VDD\_APC | Turbo | 0.76 | 1.07 | V | | VDD\_APC | Nominal-L1 | 0.71 | 1.00 | V | | VDD\_APC | Nominal | 0.68 | 0.94 | V | | VDD\_APC | SVS-L1 | 0.62 | 0.86 | V | | VDD\_APC | SVS | 0.57 | 0.78 | V | | VDD\_APC | Low-SVS | 0.57 | 0.69 | V | | VDD\_CX | Digital core circuits | | | V | | VDD\_CX | Turbo-L1 | 0.79 | 1.07 | V | | VDD\_CX | Turbo | 0.73 | 1.07 | V | | VDD\_CX | Nominal-L1 | 0.69 | 1.00 | V | | VDD\_CX | Nominal | 0.66 | 0.94 | V | | VDD\_CX | SVS-U1 | 0.60 | 0.86 | V | | VDD\_CX | SVS | 0.55 | 0.78 | V | | VDD\_CX | Low-SVS | 0.49 | 0.69 | V | | VDD\_CX\_LPI | LPI digital core circuits



Turbo



Nominal



SVS\_U1



SVS



Low\_SVS | 0.73



0.66



0.6



0.55



0.49 | 1.07



0.94



0.86



0.78



0.69 | V | | VDD\_MX\_LPI | LPI memory circuits



Turbo



Nominal | 0.79



0.79 | 1.07



1.00 | V | | VDD\_MX



VDD\_MX\_TXDAC



VDD\_A\_APC\_PLL\_0P9



VDD\_A\_EBI\_0\_0P9



VDD\_A\_EBI\_1\_0P9



VDD\_A\_DSI\_0P9



VDD\_A\_EBI\_CC\_0P9 | Memory and analog PLL circutis



Turbo



Nominal | 0.79



0.79 | 1.07



1.00 | V | | VDD\_CX\_WLAN | WLAN core circuits | | | V | | VDD\_CX\_WLAN | Nominal | 0.55 | 0.78 | V | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_1_Operating_conditions) Parts with voltages outside of the specified ranges are not guaranteed to operate properly. | Parameter[^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Operating_conditions) | Parameter[^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Operating_conditions) | Min | Typ [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_3_Operating_conditions) | Max | Unit | | --- | --- | --- | --- | --- | --- | | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | ***Power supply voltages*** | | VDD\_A\_EBI\_PLL\_0P9



VDD\_A\_QREFS\_0P9 | EBI PLL circuit



Reference voltage for QREFS 0P9 circuit | 0.89 | 0.92 | 0.95 | V | | VDD\_A\_USB\_HS\_1P8



VDD\_A\_USB\_SS\_1P8



VDD\_A\_AUDIO\_PLL\_1P8



VDD\_A\_CAMSS\_PLL\_1P8



VDD\_PX11



VDD\_QFPROM



VDD\_A2



VDD\_A\_WLAN\_PLL\_1P8



VDD\_A\_MODEM\_PLL\_1P8 | USB HS 1.8 V circuit



USB SS 1.8 V circuit



Audio PLL circuit



Camera PLL circuit



CXO pad



QFPROM circuit



High voltage – analog circuit



WLAN PLL circuit



Modem PLL circuit | 1.74 | 1.80 | 1.87 | V | | VDD\_A\_CSI\_0\_1P2



VDD\_A\_CSI\_1\_1P2



VDD\_A\_DSI\_PLL\_1P2



VDD\_A\_DSI\_1P2



VDD\_A1



VDD\_A\_PLL\_HV\_CC\_EBI\_1P2 | CSI0 1.2 V circuit



CSI1 1.2 V circuit



DSI PLL circuit



DSI 1.2 V circuit



Low voltage – analog circuit



EBI PLL high voltage circuit | 1.15 | 1.20 | 1.26 | V | | VDD\_IO\_EBI\_0\_CK



VDD\_IO\_EBI\_1\_CK



VDD\_IO\_EBI | EBI0 I/O clock circuit



EBI1 I/O clock circuit



EBI I/O circuit



(**Note:** This value is for LPDDR4X) | 0.59 | 0.60 | 0.63 | V | | VDD\_IO\_EBI\_0\_CK



VDD\_IO\_EBI\_1\_CK



VDD\_IO\_EBI | EBI0 I/O clock circuit



EBI1 I/O clock circuit



EBI I/O circuit



(**Note:** This value is for LPDDR3) | 1.15 | 1.20 | 1.25 | V | | VDD\_A\_WLAN\_ADCDAC0\_1P3



VDD\_A\_WLAN\_ADCDAC1\_1P3 | WLAN ADC and DAC 0



WLAN ADC and DAC 1 | 1.25 | – | 1.30 | V | | VDD\_A\_USB\_SS\_0P9



VDD\_USB\_HS\_0P9 | USB SS 0.9 V circuit



USB HS 0.9 V circuit | 0.89 | 0.92 | 0.95 | V | | VDD\_A\_USB\_HS\_3P1 | USB HS 3.1 V circuit | 2.95 | 3.10 | 3.20 | V | | VDD\_SDCREF\_1P25



VDD\_REF\_1P25 | Reference voltage for SDC



Reference voltage | 1.15 | 1.25 | 1.30 | V | | VDD\_PX0 | Pad group 0 | 1.7 | 1.8 | 1.9 | V | | VDD\_PX1 | EBI I/O circuit



(**Note:** This value is for LPDDR4X) | 1.05 | 1.10 | 1.15 | V | | VDD\_PX1 | EBI I/O circuit



(**Note:** This value is for LPDDR3) | 1.15 | 1.20 | 1.25 | V | | VDD\_PX2 | Pad group 2 – SDC2 pad | 1.70 | 1.80 | 1.90 | V | | VDD\_PX2 | Low voltage | 1.70 | 1.80 | 1.90 | V | | VDD\_PX2 | High voltage | 2.70 | 2.95 | 3.10 | V | | VDD\_PX3 | Pad group 3 – most I/O pad | 1.70 | 1.80 | 1.90 | V | | VDD\_PX5 | Pad group 5 | 1.70 | 1.80 | 1.90 | V | | VDD\_PX5 | Low voltage | 1.70 | 1.80 | 1.90 | V | | VDD\_PX5 | High voltage | 2.70 | 2.95 | 3.10 | V | | VDD\_PX6 | Pad group 6 | | | | V | | VDD\_PX6 | Low voltage | 1.70 | 1.80 | 1.90 | V | | VDD\_PX6 | High voltage | 2.70 | 2.95 | 3.10 | V | | VDD\_PX7 | Pad group 7 – eMMC pad | 1.70 | 1.80 | 1.90 | V | | ***Thermal conditions*** | ***Thermal conditions*** | ***Thermal conditions*** | ***Thermal conditions*** | ***Thermal conditions*** | ***Thermal conditions*** | | T | Device operating temperature | Tambient = -30 | – | Tjunction = +95 | °C | | | | | | | | | | | | | | | [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_2_Operating_conditions) Parts with voltages outside of the specified ranges are not guaranteed to operate properly. [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_3_Operating_conditions) Typical voltages represent the recommended output settings of the companion PMIC device. ### Core and memory voltage minimization (retention mode) Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The MPM supports VDD minimization, also known as VDD\_CORE and VDD\_MEM retention mode. This technique reduces the leakage of the digital logic by reducing VDD to the minimum required to maintain the register and memory state. The V(MIN) for state retention is found through characterization. | VDD\_CORE | Bit 31 (MSB) | Bit 30 | Bit 29 (LSB) | | --- | --- | --- | --- | | 0.4 V | 1 | 0 | 0 | | 0.45 V | 0 | 1 | 1 | | 0.5 V | 0 | 1 | 0 | | 0.55 V | 0 | 0 | 1 | | 0.6 V | 0 | 0 | 0 | | Note:

  1. The VDD_CORE voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40184.


| Note:

  1. The VDD_CORE voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40184.


| Note:

  1. The VDD_CORE voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40184.


| Note:

  1. The VDD_CORE voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40184.


| | VDD\_MEM | Bit 19 (MSB) | Bit 18 | Bit 17 (LSB) | | --- | --- | --- | --- | | 0.49 V | 1 | 0 | 0 | | 0.55 V | 0 | 1 | 1 | | 0.58 V | 0 | 1 | 0 | | 0.65 V | 0 | 0 | 1 | | 0.7 V | 0 | 0 | 0 | | Note:

  1. The VDD_MEM voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40198.


| Note:

  1. The VDD_MEM voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40198.


| Note:

  1. The VDD_MEM voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40198.


| Note:

  1. The VDD_MEM voltages specified are PMIC settings.


  2. For fuse locations listed in this table, see register 0x1B40198.


| ## Power delivery network specification Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The following subsections contain the maximum impedance specifications for the power delivery network (PDN). | PMIC regulator | Power domain | PDN ports | Maximum DC resistance (mΩ) | Maximum effective impedance Z[^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Power_delivery_network_specification)(mΩ) | Maximum effective impedance Z[^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Power_delivery_network_specification)(mΩ) | Positive pins | Negative pins | | --- | --- | --- | --- | --- | --- | --- | --- | | PMIC regulator | Power domain | PDN ports | Maximum DC resistance (mΩ) | Rmid_freq (mΩ) | Inductance (pH) | Positive pins | Negative pins | | VREG\_S1A | VDD\_APC | 1 | 4 | 6 | 100 | AA26, AA25, AA24, AA23, AA22, AA21, Y24, Y23, Y22, Y21, Y20, Y19, Y18, W21, W20, W19, W18, U23, U21, U20, U19, R22, R20 | AB26, AB25, AB24, AB23, AB22, AA20, AA19, AA18, AA17, Y27, Y26, W24, W23, W22, V24, V21, V19, V18, T22, T20, R23 | | VREG\_S2A | VDD\_CX | 1 | 4 | 11 | 220 | Y13, Y12, Y11, Y10, Y9, Y8 | AA14, AA12, AA11, AA9, AA8, W13, W11, W10, W9 | | VREG\_S2A | VDD\_CX | 2 | 4 | 9 | 75 | T19, R17, R16, R15, R13, R12, R11, R10, R9, N17, N15, N13, N11, N9, M19, K22, K18, K17, K16, K15, K14, K13, K12, K11, T10 | T20, T17, T15, T13, T11, T9, P18, P17, P14, P13, P12, P11, P10, P8, N8, M18, M17, M16, M15, M13, M11, M10, K20, K19, K10, J22, J20, J19, J18, J17, J16, J15, J14, J13, J12 | | VREG\_L1A | VDD\_MX | 1 | 26 | 37 | 630 | AB21, AB20 | AC22, AC21, AC20, AB22, AA20, AA19 | | VREG\_L1A | VDD\_MX | 2 | 22 | 30 | 205 | V14, V13, V12, V11, V10, V9 | W13, W11, W10, W9, V15, V8, U15, U13, U11, U10 | | VREG\_L1A | VDD\_MX | 3 | 19 | 23 | 126 | U22, R19, N20, L20, L19, L18, L17, L16, L15, L14, L13, L12, L11, L10 | V23, T22, T20, P18, N21, M18, M17, M16, M15, M13, M11, M10, K20, K19, K10 | | VREG\_L1A | VDD\_MX | 4 | 28 | 35 | 620 | T23 | R23, T22 | | VREG\_L7A | VDD\_CX\_WLAN | 1 | 84 | 132 | 650 | J9, J10, J11 | K10, J12 | | VREG\_L8A | VDD\_CX\_LPI | 1 | 71 | 109 | 800 | W16, W17 | V15, V16, V17 | | VREG\_L9A | VDD\_MX\_LPI | 1 | 170 | 190 | 1360 | Y17 | AA17, AA18 | | | | | | | | | | | | | | | | | | | | | | | | | | | | [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_1_Power_delivery_network_specification) The PDN AC impedance specification (mask) is obtained by plotting Impedance Zspec using Rmid_freq and inductance (L) values from this table. Zspec Page-1 Sheet.1 | Power regulator | Power domain | PDN ports | Maximum DC resistance (mΩ) | Maximum effective impedance Z[^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Power_delivery_network_specification)(mΩ) | Maximum effective impedance Z[^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Power_delivery_network_specification)(mΩ) | Positive pins | Negative pins | | --- | --- | --- | --- | --- | --- | --- | --- | | Power regulator | Power domain | PDN ports | Maximum DC resistance (mΩ) | Rmid-freq (mΩ) | Inductance (pH) | Positive pins | Negative pins | | VREG\_L3A | VDD\_IO\_EBI | VDD\_IO\_EBI\_A | 45 | 145 | 2250 | G9, G10 | F8, F9, G8, G11 | | VREG\_L3A | VDD\_IO\_EBI | VDD\_IO\_EBI\_B | 45 | 145 | 2250 | G13, G14 | G12 | | VREG\_L3A | VDD\_IO\_EBI | VDD\_IO\_EBI\_C | 45 | 145 | 2250 | G17, G18 | G19 | | VREG\_L3A | VDD\_IO\_EBI | VDD\_IO\_EBI\_D | 45 | 145 | 2250 | G21, G22 | F22, F23, G20 | | VREG\_L3A | VDD\_IO\_EBI\_CK | VDD\_IO\_EBI\_0\_CK | 45 | 145 | 2250 | F12 | G11, G12 | | VREG\_L3A | VDD\_IO\_EBI\_CK | VDD\_IO\_EBI\_1\_CK | 45 | 145 | 2250 | F19 | G19, G20 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_A | 45 | 136 | 2550 | F10 | F9, G11 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_B | 45 | 136 | 2550 | F13 | E14, G12 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_C | 45 | 136 | 2550 | F18 | G19 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_D | 45 | 136 | 2550 | F21 | F22, G20 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_E | 45 | 136 | 2550 | F24 | F23, G23, F25 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI0\_0P9\_A | 35 | 135 | 1835 | H9 | G8 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI0\_0P9\_B | 35 | 135 | 1835 | H11 | G11, G12 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_0\_0P9\_C | 35 | 135 | 1835 | H13 | G12, J12, J13, J14 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_1\_0P9\_A | 35 | 135 | 1835 | H18 | G19, J17, J18, J19 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_1\_0P9\_B | 35 | 135 | 1835 | H20 | G19, G20, J19, J20 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_1\_0P9\_C | 35 | 135 | 1835 | H22 | G23, J22 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_2_Power_delivery_network_specification) The PDN AC impedance specification (mask) is obtained by plotting Impedance Zspec using Rmid_freq and inductance (L) values from this table. Zspec Page-1 Sheet.1 | Power regulator | Power domain | PDN ports | Maximum DC resistance (mΩ) | Maximum effective impedance Z[^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_3_Power_delivery_network_specification)(mΩ) | Maximum effective impedance Z[^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_3_Power_delivery_network_specification)(mΩ) | Positive pins | Negative pins | | --- | --- | --- | --- | --- | --- | --- | --- | | Power regulator | Power domain | PDN ports | Maximum DC resistance (mΩ) | Rmid-freq (mΩ) | Inductance (pH) | Positive pins | Negative pins | | VREG\_L2A | VDD\_IO\_EBI | VDD\_IO\_EBI\_A | 45 | 145 | 2520 | G9, G10 | F8, F9, G8, G11 | | VREG\_L2A | VDD\_IO\_EBI | VDD\_IO\_EBI\_B | 45 | 145 | 2520 | G13, G14 | G12 | | VREG\_L2A | VDD\_IO\_EBI | VDD\_IO\_EBI\_C | 45 | 145 | 2520 | G17, G18 | G19 | | VREG\_L2A | VDD\_IO\_EBI | VDD\_IO\_EBI\_D | 45 | 145 | 2520 | G21, G22 | F22, F23, G20 | | VREG\_L2A | VDD\_IO\_CK\_EBI | VDD\_IO\_EBI\_0\_CK | 45 | 145 | 2520 | F12 | G11, G12 | | VREG\_L2A | VDD\_IO\_CK\_EBI | VDD\_IO\_EBI\_1\_CK | 45 | 145 | 2520 | F19 | G19, G20 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_A | 40 | 136 | 2550 | F10 | F9, G11 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_B | 40 | 136 | 2550 | F13 | E14, G12 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_C | 40 | 136 | 2550 | F18 | G19 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_D | 40 | 136 | 2550 | F21 | F22, G20 | | VREG\_L2A | VDD\_PX1 | VDD\_PX1\_E | 40 | 136 | 2550 | F24 | F23, G23, F25 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI0\_0P9\_A | 35 | 135 | 1835 | H9 | G8 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI0\_0P9\_B | 35 | 135 | 1835 | H11 | G11, G12 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_0\_0P9\_C | 35 | 135 | 1835 | H13 | G12, J12, J13, J14 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_1\_0P9\_A | 35 | 135 | 1835 | H18 | G19, J17, J18, J19 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_1\_0P9\_B | 35 | 135 | 1835 | H20 | G19, G20, J19, J20 | | VREG\_L1A | VDD\_A\_EBI | VDD\_A\_EBI\_1\_0P9\_C | 35 | 135 | 1835 | H22 | G23, J22 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_3_Power_delivery_network_specification) The PDN AC impedance specification (mask) is obtained by plotting Impedance Zspec using Rmid_freq and inductance (L) values from this table. Zspec Page-1 Sheet.1 | Power regulator | Power domain | PDN ports | Maximum DC resistance (mΩ)

lumped port | Maximum DC resistance (mΩ) | Maximum impedance Z[^4^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_4_Power_delivery_network_specification)(mΩ) | Maximum impedance Z[^4^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_4_Power_delivery_network_specification)(mΩ) | Positive pins | Negative pins | | --- | --- | --- | --- | --- | --- | --- | --- | --- | | Power regulator | Power domain | PDN ports | Maximum DC resistance (mΩ)


lumped port | Maximum DC resistance (mΩ) | Rmid_freq (mΩ) | Inductance (pH) | Positive pins | Negative pins | | VREG\_L13A | VDD\_A\_USB\_HS\_1P8 | 1 | 68 | 700 | 235 | 1500 | M24 | L24 | | VREG\_L13A | VDD\_A\_USB\_SS\_DP\_1P8 | 2 | 68 | 1300 | 235 | 1500 | L25 | L24, K25 | | VREG\_L21A | VDD\_A\_USB\_HS\_3P1 | 1 | – | 700 | 235 | 1500 | M23 | L24, M22 | | VREG\_L5A | VDD\_A\_DSI\_1P2 | 1 | 97 | 1350 | 157 | 1000 | P23 | R23 | | VREG\_L5A | VDD\_A\_DSI\_PLL | 2 | 97 | 4000 | 235 | 1500 | N24 | N25, P25 | | VREG\_L5A | VDD\_A\_CSI\_0\_1P2 | 3 | 97 | 450 | 235 | 1500 | R7 | P6, P7, P8, R6, T6 | | VREG\_L5A | VDD\_A\_CSI\_1\_1P2 | 4 | 97 | 450 | 235 | 1500 | T7 | R6, T6, U6 | | VREG\_L12A | VDD\_A\_USB\_SS\_0P9 | 1 | 128 | 130 | 157 | 1000 | K24 | J25, K25 | | VREG\_L12A | VDD\_USB\_HS\_0P9 | 2 | 128 | 1400 | 157 | 1020 | M25 | M26, N26, N25 | | VREG\_L1A | VDD\_A\_DSI\_0P9 | 1 | – | 450 | 235 | 1500 | P24 | P25, R23 | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [^4^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_4_Power_delivery_network_specification) The PDN AC impedance specification (mask) is obtained by plotting Impedance Zspec using Rmid_freq and inductance (L) values from this table. Zspec Page-1 Sheet.1 ## DC power characteristics Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) ### Average operating current Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Detailed current consumption information and details about the operating modes tested are available in the document *QRB2210 Linux Android Current Consumption Data (80-30843-7; to be released)*. ### Dhrystone and rock bottom maximum power Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Dhrystone and rock bottom maximum power | SDM version | Quad core at 2 GHz, Dhrystone (W) at +95°C (Tj)[^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Dhrystone_and_rock_bottom_maximum_power)[^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Dhrystone_and_rock_bottom_maximum_power)[^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_3_Dhrystone_and_rock_bottom_maximum_power) | Rock bottom (mW) at 30°C (Tj)[^4^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_4_Dhrystone_and_rock_bottom_maximum_power) | | :---: | :---: | :---: | | QRB2210 | 1.5 | 10.4 | [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_1_Dhrystone_and_rock_bottom_maximum_power) Temperature reading is from the QRB2210 device’s internal temperature sensor. [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_2_Dhrystone_and_rock_bottom_maximum_power) Dhrystone power should be measured on the VDD\_APC rail, right before PDN capacitors (with a small serial sampling resistor inserted, if necessary). [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_3_Dhrystone_and_rock_bottom_maximum_power) Measurement sampling rate should be > 1.25 Msps (or < 0.8 μs), and the average window should be > 1 ms (or > 1250 samples). [^4^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_4_Dhrystone_and_rock_bottom_maximum_power) Rock bottom (VDD\_CORE and VDD\_MEM) power should be measured at VDD\_CORE and VDD\_MEM rails when VDD\_CORE and VDD\_MEM are at retention voltage. See AIR1 in Table 3.1 (Test definitions) in the *QRB2210 Android Current Consumption Data (80-30843-7; to be released)*. ## Power sequencing Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The PMIC includes power-on circuits that provide the proper power sequencing for the entire QRB2210 chipset. The supplies are turned on as groups of regulators that are selected by the hardware configuration of some PMIC pins. See the appropriate PMIC device specification, such as the [PM4125 Power Management IC Data Sheet (80-PW090-1)](https://docs.qualcomm.com/bundle/80-PW090-1/resource/80-PW090-1.pdf). A high-level summary of the required default power-on sequence is: | Sequence | Power domain | | :--- | :--- | | 1. | VDD\_MX, VDD\_MX\_TXDAC, VDD\_A\_APC\_PLL\_0P9, VDD\_A\_EBI\_0\_0P9, VDD\_A\_EBI\_1\_0P9, VDD\_A\_DSI\_0P9, VDD\_A\_EBI\_CC\_0P9 | | 2. | VDD\_MX\_LPI | | 3. | VDD\_CX | | 4. | VDD\_CX\_LPI | | 5. | VDD\_CX\_WLAN | | 6. | VDD\_PX0, VDD\_PX3, VDD\_PX7 | | 7. | VREF\_MSM | | 8. | VDD\_A\_CSI\_0\_1P2, VDD\_A\_CSI\_1\_1P2, VDD\_A\_DSI\_PLL\_1P2, VDD\_A\_DSI\_1P2, VDD\_A1, VDD\_A\_PLL\_HV\_CC\_EBI\_1P2 | | 9. | VDD\_A\_USB\_SS\_0P9, VDD\_USB\_HS\_0P9 | | 10. | VDD\_A\_EBI\_PLL\_0P9, VDD\_A\_QREFS\_0P9 | | 11. | VDD\_PX1 | | 12. | VDD\_IO\_EBI\_0\_CK, VDD\_IO\_EBI\_1\_CK, VDD\_IO\_EBI | | 13. | VREF\_LPDDR3 | | 14. | VDD\_QFPROM, VDD\_PX11, VDD\_A2, VDD\_A\_USB\_SS\_1P8, VDD\_A\_USB\_HS\_1P8, VDD\_A\_AUDIO\_PLL\_1P8, VDD\_A\_CAMSS\_PLL\_1P8, VDD\_A\_WLAN\_PLL\_1P8, VDD\_A\_MODEM\_PLL\_1P8 | | 15. | VDD\_PX2 | | 16. | VDD\_A\_USB\_HS\_3P1 | | 17. | VDD\_APC | This sequence includes: - The core voltage (VDD\_CX) needs to power up before the pad circuits (VDD\_PX), so that the internal circuits can take control of the I/Os and pads. - If pad voltages power-up first, the output drivers might be stuck in unknown states and might cause large leakage currents until VDD\_CX powers on. - Any other appropriate supplies can be powered on by software after the sequence is completed. - Each domain needs to reach its 90% value before the next domain starts ramping up. For example, when VDD\_CX reaches 90% of its value, the VDD\_CX\_LPI supply can start ramping up. ## Digital-logic characteristics Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) A digital I/O’s performance specification depends on its pad type, its usage, and/or its supply voltage: - Some are dedicated for interconnections between the QRB2210 device and other ICs within the QTI chipset; therefore, specifications are not required. - Some are defined by existing standards, such as I^2^C and SPI. QTI devices comply with those standards; therefore, additional specifications are not required. - All other digital I/Os require performance specifications. | Parameter | Description | Min | Max | Units | | --- | --- | --- | --- | --- | | VIH | High-level input voltage, CMOS/Schmitt (HIHYS\_EN = low) | 0.65 × VDDPX | VDDPX + 0.3 V | V | | VIL | Low-level input voltage, CMOS/Schmitt (HIHYS\_EN = low) | -0.3 V | 0.35 × VDDPX | V | | VIH | High-level input voltage, CMOS/Schmitt (HIHYS\_EN = high) | 0.7 × VDDPX | VDDPX + 0.3 V | V | | VIL | Low-level input voltage, CMOS/Schmitt (HIHYS\_EN = high) | -0.3 V | 0.3 × VDDPX | V | | VSHYS | Schmitt hysteresis voltage (HIHYS\_EN= low) | 100 | – | mV | | VSHYS | Schmitt hysteresis voltage (HIHYS\_EN = high) | 300 | – | mV | | IIH | Input high leakage current [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942__fn_slp_1n3_jlb) | – | 1.0 | µA | | IIL | Input low leakage current [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942__fn_slp_1n3_jlb) | -1.0 | – | µA | | IIHPD | Input high leakage current with pull-down | 27.5



(60) | 97.5



(20) | µA



(kΩ) | | IILPU | Input low leakage current with pull-up | -97.5



(20) | -27.5



(60) | µA



(kΩ) | | IOZH | High-level, tri-state leakage current [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942__fn_slp_1n3_jlb) | – | 1.0 | µA | | IOZL | Low-level, tri-state leakage current [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942__fn_slp_1n3_jlb) | -1.0 | – | µA | | IOZHPD | High-level, tri-state leakage current with pull-down | 27.5 | 97.5 | µA | | IOZHPD | High-level, tri-state leakage current with pull-down | (60) | (20) | (kΩ) | | IOZLPU | Low-level, tri-state leakage current with pull-up | -97.5 | -27.5 | µA | | IOZLPU | Low-level, tri-state leakage current with pull-up | (20) | (60) | (kΩ) | | IOZHKP | High-level, tri-state leakage current with keeper [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Digital_logic_characteristics) | -22.5 | -7.5 | µA | | IOZHKP | High-level, tri-state leakage current with keeper [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_2_Digital_logic_characteristics) | (20) | (60) | (kΩ) | | IOZLKP | Low-level, tri-state leakage current with keeper [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_3_Digital_logic_characteristics) | 7.5 | 22.5 | µA | | IOZLKP | Low-level, tri-state leakage current with keeper [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_3_Digital_logic_characteristics) | (60) | (20) | (kΩ) | | VOH | High-level output voltage, CMOS | VDDPX - 0.45 | VDDPX | V | | VOL | Low-level output voltage, CMOS | 0.0 | 0.45 | V | | | | | | | ^1^ IIH, IIL, IOZH, and IOZL values are based on nominal PVT (TT/25°C). [^2^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_2_Digital_logic_characteristics) Pin voltage = VDDPX maximum. For keeper pins, pin voltage = VDDPX maximum - 0.45 V. [^3^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_3_Digital_logic_characteristics) Pin voltage = GND and supply = VDDPX maximum. For keeper pins, pin voltage = 0.45 V and supply = VDDPX maximum. Table : SDC 2.95 V mode DC specifications (VDDPX_2) | Parameter | Description | Min | Typ | Max | Units | | :---: | --- | :---: | :---: | :---: | :---: | | VIH | High-level input voltage | 0.625 × VDDPX | – | VDDPX + 0.3 | V | | VIL | Low-level input voltage | - 0.3 | – | 0.25 × VDDPX | V | | VHYS | Schmitt hysteresis voltage | 100 | – | – | mV | | IIH | Input high leakage current | – | – | 10 | µA | | IIL | Input low leakage current | -10 | – | – | µA | | IOZH | High-level, tri-state leakage current | – | – | 10 | µA | | IOZL | Low-level, tri-state leakage current | -10 | – | – | µA | | RPULL-UP | Pull-up resistance | 10 | – | 100 | kΩ | | RPULL-DOWN | Pull-down resistance | 10 | – | 100 | kΩ | | RKEEPER-UP | Keeper-up resistance | 10 | – | 100 | kΩ | | RKEEPER-DOWN | Keeper-down resistance | 10 | – | 100 | kΩ | | VOH | High-level output voltage | 0.75 × VDDPX | – | VDDPX | V | | VOL | Low-level output voltage | 0 | – | 0.125 × VDDPX | V | Table : SDC 1.8 V mode DC specifications (VDDPX_2) | Parameter | Description | Min | Typ | Max | Units | | :---: | --- | :---: | :---: | :---: | :---: | | VIH | High-level input voltage | 1.27 | – | 2 | V | | VIL | Low-level input voltage | -0.3 | – | 0.58 | V | | VHYS | Schmitt hysteresis voltage | 100 | – | – | mV | | IIH | Input high leakage current | – | – | 5 | µA | | IIL | Input low leakage current | -5 | – | – | µA | | IOZH | High-level, tri-state leakage current | – | – | 5 | µA | | IOZL | Low-level, tri-state leakage current | -5 | – | – | µA | | RPULL-UP | Pull-up resistance | 10 | – | 100 | kΩ | | RPULL-DOWN | Pull-down resistance | 10 | – | 100 | kΩ | | RKEEPER-UP | Keeper-up resistance | 10 | – | 100 | kΩ | | RKEEPER-DOWN | Keeper-down resistance | 10 | – | 100 | kΩ | | VOH | High-level output voltage | 1.4 | – | – | V | | VOL | Low-level output voltage | – | – | 0.45 | V | Table : VDDPX_5 and VDDPX_6 2.95 V mode DC specifications | Parameter | Description | Min | Typ | Max | Units | | :---: | --- | :---: | :---: | :---: | :---: | | VIH | High-level input voltage | 0.7 × VDDPX | – | VDDPX + 0.3 | V | | VIL | Low-level input voltage | -0.3 | – | 0.2 × VDDPX | V | | VHYS | Schmitt hysteresis voltage | 100 | – | – | mV | | IIH | Input high leakage current | -20 | – | 20 | µA | | IIL | Input low leakage current | – | – | 1000 | µA | | IOZH | High-level, tri-state leakage current | – | – | 10 | µA | | IOZL | Low-level, tri-state leakage current | -10 | – | – | µA | | RPULL-UP | Pull-up resistance | 10 | – | 100 | kΩ | | RPULL-DOWN | Pull-down resistance | 10 | – | 100 | kΩ | | RKEEPER-UP | Keeper-up resistance | 10 | – | 100 | kΩ | | RKEEPER-DOWN | Keeper-down resistance | 10 | – | 100 | kΩ | | VOH | High-level output voltage | 0.8 × VDDPX | – | VDDPX | V | | VOL | Low-level output voltage | 0 | – | 0.4 | V | Table : VDDPX_5 and VDDPX_6 1.8 V mode DC specifications | Parameter | Description | Min | Typ | Max | Units | | :---: | --- | :---: | :---: | :---: | :---: | | VIH | High-level input voltage | 0.7 × VDDPX | – | VDDPX + 0.3 | V | | VIL | Low-level input voltage | -0.3 | – | 0.2 × VDDPX | V | | VHYS | Schmitt hysteresis voltage | 100 | – | – | mV | | IIH | Input high leakage current | -20 | – | 20 | µA | | IIL | Input low leakage current | – | – | 1000 | µA | | IOZH | High-level, tri-state leakage current | – | – | 5 | µA | | IOZL | Low-level, tri-state leakage current | -5 | – | – | µA | | RPULL-UP | Pull-up resistance | 10 | – | 100 | kΩ | | RPULL-DOWN | Pull-down resistance | 10 | – | 100 | kΩ | | RKEEPER-UP | Keeper-up resistance | 10 | – | 100 | kΩ | | RKEEPER-DOWN | Keeper-down resistance | 10 | – | 100 | kΩ | | VOH | High-level output voltage | 0.8 × VDDPX | – | VDDPX | V | | VOL | Low-level output voltage | 0 | – | 0.4 | V | ## Timing characteristics Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Specifications for the device timing characteristics are included (where appropriate) under each function’s section, along with all its other performance specifications. Some general comments about timing characteristics and pertinent pad design methodologies are included here. Note: All QRB2210 devices are characterized with actively terminated loads; therefore, all baseband timing parameters in this document assume no bus loading. This is described further in [Rise and fall time specifications](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#mpw1605871078936). ### Timing diagram conventions Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The conventions used within timing diagrams throughout this document are shown in the figure below. Figure : Timing diagram conventions Page-1 Sheet.220 Sheet.97 Sheet.182 Sheet.183 Sheet.186 Sheet.187 Sheet.188 Sheet.189 Keeper Keeper Sheet.1 Sheet.2 Don't care or bus is driven Don't care or bus is driven Sheet.190 Signal is changing from low to high Signal is changing from low to high Sheet.191 Signal is changing from high to low Signal is changing from high to low Sheet.192 Bus is changing from invalid to valid Bus is changing from invalid to valid Sheet.193 Bus is changing from valid to keeper Bus is changing from valid to keeper Sheet.194 Waveform Waveform Sheet.195 Description Description Sheet.202 Denotes multiple clock periods Denotes multiple clock periods Sheet.203 Sheet.204 Sheet.212 Sheet.213 Sheet.215 Sheet.216 Bus is changing from Hi-Z to valid Bus is changing from Hi-Z to valid Sheet.214 Sheet.217 Sheet.218 Sheet.219 Sheet.196 Sheet.184 Sheet.185 Sheet.197 Sheet.198 Sheet.199 Sheet.200 Sheet.201 For each signal in the diagram: - One clock period (T) extends from one rising clock edge to the next rising clock edge. - The high level represents 1, the low level represents 0, and the middle level represents the floating (high-impedance) state. - When both the high and low levels are shown over the same time interval, the meaning depends on the signal type: - For a bus type signal (multiple bits), the processor or external interface is driving a value, but that value may or may not be valid. - For a single signal, this indicates don’t care. ### Rise and fall time specifications Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The testers that characterize QRB2210 devices have actively terminated loads, making the rise and fall times quicker (mimicking a no-load condition). The impact that different external load conditions have on rise and fall times is shown in the figure below. Figure : Rise and fall times under different load conditions Page-1 Sheet.134 Sheet.95 Sheet.96 Sheet.97 Sheet.98 Sheet.99 Sheet.100 Sheet.101 Sheet.102 Sheet.103 Specified switch low points (active terminated load) Specified switch low points(active terminated load) Sheet.104 Simulated driving 30 pF signal load Simulated driving 30 pF signal load Sheet.105 Sheet.106 Sheet.107 Sheet.108 Sheet.109 Actual switch low point at 30 pF Actual switch low point at 30 pF Sheet.110 Sheet.111 Sheet.112 Sheet.113 Sheet.114 Sheet.115 Sheet.116 0V 0V Sheet.117 Simulated driving 80 pF signal load Simulated driving 80 pF signal load Sheet.118 0V 0V Sheet.119 Sheet.120 VOH VOH Sheet.121 VOL VOL Sheet.122 VOH VOH Sheet.123 VOL VOL Sheet.124 Specified switch high points (active terminated load) Specified switch high points(active terminated load) Sheet.125 Sheet.126 Actual switch high point at 30 pF Actual switch high point at 30 pF Sheet.127 Actual switch high point at 80 pF Actual switch high point at 80 pF Sheet.128 Actual switch low point at 80 pF Actual switch low point at 80 pF Sheet.129 Sheet.130 VDD_PX VDD_PX Sheet.131 VDD_PX VDD_PX Sheet.132 Sheet.133 To account for external load conditions, rise or fall times must be added to parameters that start timing at the QRB2210 device and terminate at an external device (or vice versa). Adding these rise and fall times is equivalent to applying capacitive load derating factors. ### Pad design methodology Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The QRB2210 device uses a generic CMOS pad driver design. The intent of the pad design is to create pin response and behavior that is symmetric, with respect to the associated VDD_PX supply ([Figure : Digital input-signal switch points](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#bij1605871468862__fig_bmt_qb3_ckb)). The input switch point for pure input-only pads is designed to be VDD_PX/2 (or 50% of VDD_PX). The documented switch points (guaranteed over worst-case combinations of process, voltage, and temperature by both design and characterization) are 35% of VDD_PX for VIL and 65% of VDD_PX for VIH. Figure : Digital input-signal switch points Page-1 Sheet.48 Sheet.30 Sheet.1 Sheet.2 Sheet.3 Sheet.6 0 V 0 V Sheet.7 VDD_PX VDD_PX Sheet.8 Sheet.9 50% 50% Sheet.10 VIL VIL Sheet.11 VIH VIH Sheet.12 Switch points Switch points Sheet.13 Sheet.14 Sheet.15 Sheet.5 Sheet.4 Sheet.16 Sheet.17 65% VDD_PX 65% VDD_PX Sheet.18 35% VDD_PX 35% VDD_PX Sheet.19 Input Input Sheet.20 Sheet.47 Outputs (such as addresses, chip selects, and clocks) are designed and characterized to source or sink a large DC output current (several mA) at the documented VOH (min) and VOL (max) levels over worst-case process/voltage/temperature. Because the pad output structures ([Figure : Output pad equivalent circuit](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#bij1605871468862__fig_vtj_pc3_ckb)) are essentially CMOS drivers that possibly have a small amount of IR loss (estimated at less than 50 mV under worst-case conditions), the expected zero DC load outputs are estimated to be: - VOH ~ VDD_PX - 50 mV or more - VOL ~ 50 mV or less Figure : Output pad equivalent circuit Page-1 Sheet.291 Sheet.268 Sheet.97 Sheet.98 output pad output pad Sheet.265 Sheet.273 Sheet.275 Sheet.276 Sheet.277 Sheet.279 Sheet.282 P_out P_out Sheet.283 Sheet.286 Sheet.288 Sheet.259 Sheet.260 Sheet.261 Sheet.262 Sheet.263 Sheet.264 Sheet.266 Sheet.267 Sheet.269 Sheet.270 Sheet.271 Sheet.32 Sheet.272 Sheet.274 P_out = high IR loss < 50 mV P_out = highIR loss < 50 mV Sheet.278 Sheet.280 Sheet.281 P_out = low IR loss < 50 mV P_out = lowIR loss < 50 mV Sheet.284 VDD_Px VDD_Px Sheet.285 SDM pad SDM pad Sheet.287 Pad voltage: High (max) > VDD_Px – 50 mV Low (min) < 50 mV Pad voltage: High (max) > VDD_Px –mV Low (min) < 50 mV Sheet.289 The DC output drive strength can be approximated by linear interpolations between VOH (min) and VDD_PX - 50 mV, and between VOL (max) and 50 mV. For example, an output pad driving low that guarantees 4.5 mA at VOL (max) will provide approximately 3.0 mA or more at 2/3 × [VOL (max) - 50 mV], and 1.5 mA or more at 1/3 × [VOL (max) - 50 mV]. Likewise, an output pad driving high that guarantees 2.5 mA at VOH (min) will provide approximately 1.25 mA or more at ½ × [VDD_PX - 50 mV + VOH (min)]. The output pads are essentially CMOS outputs with a corresponding FET-type output voltage/current transfer function. When an output pad is shorted to the opposite power rail, the pad is capable of sourcing or sinking ISC (SC = short-circuit) of current, where the magnitude of ISC is larger than the current capability at the intended output logic levels. Since the target application includes a radio, output pads are designed to minimize output slew rates. Decreased slew rates limit high-frequency spectral components that tend to desensitize the companion radio. Output drivers’ rise time (**t**(r)) and fall time (**t**(f)) values are functions of board loading. Bi-directional pins include both input and output pad structures, and behave accordingly when used as inputs or outputs within the system. Both the input and output behaviors were described above. ## Memory support Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) All timing parameters in this document assume no bus loading. Rise/fall time numbers must be factored into the numbers in this document. For example, setup time numbers will get worse, and hold time numbers may improve. ### EBI0 and EBI1 memory support Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) EBI0 and EBI1 are dedicated non-PoP type LPDDR4X or LPDDR3 memory. It supports LPDDR4X and LPDDR3 SDRAM memory parts that are compliant with the *JEDEC Standard for Low-Power Double Data Rate 4 SDRAM* (JESD209-4-1) and *JEDEC Standard for Low-Power Double Data Rate 3* (JESD209-3B). ### eMMC on SDC1 Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) eMMC NAND flash can be supported via the SDC1 port. See [SD interfaces](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#bcd1606107209335) for secure digital interface details. ## Multimedia Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Multimedia parameters requiring performance specification are addressed in this section. ### Camera interfaces Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The QRB2210 device supports three 4-lane DPHY or CPHY camera interfaces. Table : Supported MIPI_CSI standards and exceptions | Applicable standard | Feature exceptions | | --- | --- | | *MIPI Alliance Specification for DPHY v1.2* | Supports only unidirectional data receiving | | *MIPI Alliance Specification for CPHY v1.0* | None | ### Audio support Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The QRB2210 supports the PM4125 audio codec IC through SourndWire interface to provide the system’s audio functions. Other audio-related interface options include: - I^2^S – [I2S interfaces](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#ptw1606107508695) - Digital microphone – [Digital microphone PDM interface](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hxm1606107682446) - SoundWire – [SoundWire](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#xxi1606107799916) - I^2^C – [I2C interface](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#bsy1606108055605) ### Display support Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The QRB2210 device supports one 4-lane MIPI DSI port. Table : Supported MIPI_DSI standards and exceptions | Applicable standard | Feature exceptions | | --- | --- | | *MIPI Alliance Specification for Display Serial Interface* | None | | *MIPI Alliance Specification for D-PHY v1.2* | None | ## Connectivity Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The connectivity functions supported by the QRB2210 that require electrical specifications include: - SD, including SD cards and multimedia cards (MMC) - USB host/slave support with built-in physical layer (PHY) - Serial low-power interchip media bus (SLIMbus) interface - Inter-IC sound (I^2^S) interfaces - Touchscreen connections - Dedicated I^2^C interfaces for camera (CCI I2C) - Through proper configuration of the 10 QUP ports: - Universal asynchronous receiver/transmitter (UART) ports - Inter-integrated circuit (I^2^C) interfaces - Serial peripheral interface (SPI) ports - I3C interface for sensor support Pertinent specifications for these functions are detailed in the following subsections. Note: In addition to the following hardware specifications, see the latest software release notes for software-based performance features or limitations. ### SD interfaces Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Supported SD standards and exceptions | Applicable standard | Feature exceptions | | --- | --- | | Multimedia Card Host Specification, version 5.1 | None | | Secure Digital: Physical Layer Specification version 3.0 | None | | SDIO Card Specification version 3.0 | None | Figure : SD interface timing Page-1 Sheet.540 Sheet.1 Sheet.2 Sheet.3 Sheet.4 Sheet.5 Sheet.6 Sheet.7 Sheet.8 Sheet.9 Sheet.10 Sheet.11 Sheet.12 Sheet.13 Sheet.14 Sheet.15 Sheet.16 Sheet.17 Sheet.18 Sheet.19 Sheet.20 Sheet.21 Sheet.22 Sheet.23 Sheet.24 Sheet.25 Sheet.26 Sheet.27 Sheet.28 Sheet.29 Sheet.30 Sheet.31 Sheet.32 Sheet.33 Sheet.34 Sheet.35 Sheet.36 Sheet.37 Sheet.38 Sheet.39 Sheet.40 Sheet.41 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Sheet.46 Sheet.47 Sheet.48 Sheet.49 Sheet.50 Sheet.52 Sheet.53 Sheet.62 t t Sheet.63 ( ( Sheet.64 dhrd dhrd Sheet.65 ) ) Sheet.66 t t Sheet.67 ( ( Sheet.68 chrd chrd Sheet.69 ) ) Sheet.70 t t Sheet.71 ( ( Sheet.72 dsurd dsurd Sheet.73 ) ) Sheet.74 t t Sheet.75 ( ( Sheet.76 csurd csurd Sheet.77 ) ) Sheet.78 t t Sheet.79 ( ( Sheet.80 ) ) Sheet.81 t t Sheet.82 ( ( Sheet.83 ) ) Sheet.84 t t Sheet.85 ( ( Sheet.86 t t Sheet.87 SDC_CLK SDC_CLK Sheet.88 Read Read Sheet.89 Write Write Sheet.90 Dynamic connector Sheet.92 Sheet.93 Sheet.94 Sheet.95 Sheet.96 Sheet.97 Sheet.98 Sheet.99 Sheet.100 Sheet.101 Sheet.102 Sheet.103 Sheet.104 Sheet.105 Sheet.106 Sheet.107 Sheet.108 Sheet.109 Sheet.110 t t Sheet.111 ( ( Sheet.112 dvdrd dvdrd Sheet.113 ) ) Sheet.114 t t Sheet.115 ( ( Sheet.116 cvdrd cvdrd Sheet.117 ) ) Sheet.118 Single data rate – SDR mode Single data rate – SDR mode Sheet.119 Sheet.120 Sheet.121 Sheet.122 Sheet.123 Sheet.124 Sheet.125 Sheet.126 Sheet.127 Sheet.128 Sheet.129 Sheet.130 Sheet.131 Sheet.132 Sheet.133 Sheet.134 Sheet.135 Sheet.136 Sheet.137 Sheet.138 Sheet.139 Sheet.140 Sheet.141 Sheet.142 Sheet.143 Sheet.144 Sheet.145 Sheet.146 Sheet.147 Sheet.148 Sheet.149 Sheet.150 Sheet.151 Sheet.152 Sheet.153 Sheet.154 Sheet.155 Sheet.156 Sheet.157 Sheet.158 Sheet.159 Sheet.160 Sheet.161 Sheet.162 t t Sheet.163 ( ( Sheet.164 pdcwr pdcwr Sheet.165 ) ) Sheet.166 Sheet.167 Sheet.168 Sheet.169 t t Sheet.170 ( ( Sheet.171 chrd chrd Sheet.172 ) ) Sheet.173 Sheet.174 Sheet.175 t t Sheet.176 ( ( Sheet.177 csurd csurd Sheet.178 ) ) Sheet.179 Sheet.180 t t Sheet.181 ( ( Sheet.182 ) ) Sheet.183 Sheet.184 t t Sheet.185 ( ( Sheet.186 ) ) Sheet.187 Sheet.188 t t Sheet.189 ( ( Sheet.190 Sheet.191 t t Sheet.192 SDC_CLK SDC_CLK Sheet.193 CMD read CMD read Sheet.194 CMD write CMD write Sheet.195 Dynamic connector.210 Sheet.197 Sheet.198 Sheet.199 Sheet.200 Sheet.201 Sheet.202 t t Sheet.203 ( ( Sheet.204 pddwr pddwr Sheet.205 ) ) Sheet.206 Data read Data read Sheet.207 Data write Data write Sheet.208 Sheet.209 Sheet.210 Sheet.211 Sheet.212 Sheet.213 Sheet.214 Sheet.215 Sheet.216 Sheet.217 t t Sheet.218 ( ( Sheet.219 dhrd dhrd Sheet.220 ) ) Sheet.221 t t Sheet.222 ( ( Sheet.223 dsurd dsurd Sheet.224 ) ) Sheet.225 Sheet.226 Sheet.227 Sheet.228 Sheet.229 Sheet.230 Sheet.231 Sheet.232 Sheet.233 t t Sheet.234 ( ( Sheet.235 dhrd dhrd Sheet.236 ) ) Sheet.237 t t Sheet.238 ( ( Sheet.239 dsurd dsurd Sheet.240 ) ) Sheet.241 Sheet.242 Sheet.243 Sheet.244 Sheet.245 Sheet.246 Sheet.247 Sheet.248 Sheet.249 Sheet.250 Sheet.251 t t Sheet.252 ( ( Sheet.253 pddwr pddwr Sheet.254 ) ) Sheet.255 Sheet.256 Sheet.257 Sheet.258 Sheet.51 Sheet.259 Sheet.260 Double data rate – DDR mode Double data rate – DDR mode Sheet.261 HS400 mode input timing HS400 mode input timing Sheet.292 Sheet.325 SDC_RCLK SDC_RCLK Sheet.334 Sheet.337 t(pddwr) t(pddwr) Sheet.339 Data read Data read Sheet.340 Data write Data write Sheet.376 Sheet.392 HS400 mode output timing HS400 mode output timing Sheet.433 Sheet.458 CMD write CMD write Sheet.358 Sheet.295 Sheet.294 Sheet.524 Sheet.296 Sheet.525 Sheet.297 Sheet.333 Sheet.342 Sheet.523 Sheet.526 Sheet.527 Sheet.528 Sheet.529 VIH VIH Sheet.530 VIL VIL Sheet.531 Sheet.532 Sheet.533 Sheet.534 t RQ t RQ Sheet.360 VT VT Sheet.361 Sheet.362 Sheet.344 Sheet.345 t t Sheet.346 ( ( Sheet.347 dvdrd dvdrd Sheet.348 ) ) Sheet.321 Sheet.349 Sheet.350 Sheet.351 Sheet.341 Sheet.352 Sheet.353 Sheet.354 Sheet.355 Sheet.356 Sheet.367 Sheet.368 Sheet.369 Sheet.370 VOH VOH Sheet.371 VOL VOL Sheet.410 SDC_CLK SDC_CLK Sheet.412 Sheet.413 Sheet.414 Sheet.415 Sheet.416 Sheet.417 Sheet.418 Sheet.425 Sheet.426 VT VT Sheet.357 Sheet.288 Sheet.289 Sheet.290 Sheet.291 Sheet.293 Sheet.302 Sheet.304 Sheet.305 Sheet.374 Sheet.375 Sheet.306 Sheet.264 Sheet.265 Sheet.266 t RQH t RQH Sheet.535 Sheet.536 Sheet.539 t(pdcwr) max t(pdcwr) max Sheet.537 Sheet.538 Sheet.262 Sheet.263 Sheet.267 VOH VOH Sheet.268 VOL VOL Sheet.270 Sheet.271 Sheet.269 Sheet.272 Sheet.273 Sheet.274 Sheet.276 Sheet.277 Sheet.275 Sheet.278 Sheet.279 t(pdcwr)min t(pdcwr)min Sheet.280 Sheet.281 t(pddwr) t(pddwr) Sheet.282 Sheet.283 t(pddwr) t(pddwr) Sheet.54 t(pdcwr) t(pdcwr) ### USB interfaces Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Supported USB standards and exceptions | Applicable standard | Feature exceptions | | --- | --- | | *Universal Serial Bus Specification, Revision 3.1* (August 11, 2014 or later) | SS Gen 2 | | *Universal Serial Bus Specification, Revision 2.0* (April 27, 2000 or later) | Low speed is not supported in device mode | | *On-The-Go Supplement to the USB 2.0 Specification* (June 24, 2003, Revision 1.0 A or later) | Supports the host mode aspect of OTG only | ### I^2^S interfaces Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Supported I2S standards and exceptions | Applicable standards | Feature exceptions | | --- | --- | | *Philips I2S Bus Specifications revised June 5, 1996 (Available for free download.)* | None | Figure : I^2^S timing diagram Page-1 Sheet.49 Sheet.449 Sheet.450 High-level I2S timing High-level I2S timing Sheet.288 Sheet.289 Sheet.290 Sheet.291 Sheet.292 Sheet.293 Sheet.294 Sheet.295 Sheet.296 Sheet.302 Sheet.306 SCK SCK Sheet.307 SD and WS transmitter SD and WS transmitter Sheet.308 T T Sheet.309 Sheet.310 Sheet.312 Sheet.313 Sheet.314 t(HC) t(HC) Sheet.315 Sheet.316 Sheet.317 Sheet.318 Sheet.319 Sheet.320 Sheet.321 Sheet.322 Sheet.323 Sheet.326 Sheet.327 Sheet.328 Sheet.329 t(htr) t(htr) Sheet.336 Sheet.337 Sheet.338 Sheet.339 Sheet.340 Sheet.341 Sheet.342 Sheet.343 Sheet.344 Sheet.345 Sheet.346 Sheet.451 Sheet.452 Sheet.453 Sheet.454 Sheet.455 Sheet.456 Sheet.457 Sheet.458 Sheet.459 Sheet.460 Sheet.461 Sheet.462 Sheet.463 Sheet.464 Sheet.465 Sheet.466 Sheet.467 Sheet.468 Sheet.469 Sheet.470 Sheet.471 Sheet.472 Sheet.473 Sheet.474 Sheet.475 Sheet.476 Sheet.477 Sheet.478 Sheet.479 Sheet.480 Sheet.481 Sheet.482 Sheet.483 SCK SCK Sheet.484 Sheet.485 Sheet.490 Sheet.486 Sheet.487 Sheet.488 Sheet.489 Sheet.491 Sheet.492 Sheet.493 Sheet.494 Sheet.495 Sheet.496 WS WS Sheet.497 Sheet.498 Sheet.499 Sheet.500 Sheet.501 Sheet.502 Sheet.503 Sheet.504 Sheet.505 Sheet.506 Sheet.507 Sheet.508 Sheet.509 Sheet.510 Sheet.511 SD SD Sheet.512 Sheet.513 Sheet.514 Sheet.515 Sheet.516 Sheet.517 Sheet.518 Sheet.519 Sheet.520 Sheet.521 Sheet.522 Sheet.523 Sheet.524 Sheet.525 Sheet.526 LSB LSB Sheet.527 MSB MSB Sheet.528 Sheet.529 Sheet.530 Sheet.531 Sheet.532 Sheet.533 Sheet.534 Sheet.535 Sheet.536 Sheet.537 Sheet.538 Sheet.539 Sheet.542 Sheet.543 Sheet.546 LSB LSB Sheet.547 MSB MSB Sheet.540 Sheet.541 Sheet.544 Sheet.545 Sheet.548 Sheet.549 Sheet.550 Sheet.551 Sheet.552 Sheet.553 Sheet.554 Word (n – 1) right channel Word (n – right channel Sheet.555 Word (n) left channel Word (n) left channel Sheet.556 Word (n + 1) right channel Word (n + 1) right channel Sheet.351 Sheet.349 Sheet.350 Sheet.352 Sheet.353 Sheet.354 Sheet.355 Sheet.356 Sheet.357 Sheet.358 Sheet.359 Sheet.360 Sheet.298 Sheet.300 Sheet.301 Sheet.305 Sheet.361 Sheet.362 Sheet.363 Sheet.364 Sheet.365 Sheet.366 Sheet.367 Sheet.368 Sheet.297 V(hi) = 2.0 V V(hi) = 2.0 V Sheet.369 V(lo) = 0.8 V V(lo) = 0.8 V Sheet.370 Sheet.371 Sheet.372 Sheet.373 Sheet.374 Sheet.375 Sheet.376 t(LC) t(LC) Sheet.377 Sheet.347 Sheet.348 Sheet.378 Sheet.379 Sheet.380 Sheet.381 Sheet.382 Sheet.383 Sheet.384 Sheet.385 Sheet.386 Sheet.387 Sheet.388 Sheet.389 Sheet.390 Sheet.335 Sheet.391 Sheet.392 Sheet.393 t(dtr) t(dtr) Sheet.324 Sheet.325 Sheet.330 Sheet.331 Sheet.332 Sheet.333 Sheet.334 Sheet.394 Sheet.395 Sheet.396 Sheet.397 Sheet.398 Sheet.399 Sheet.400 Sheet.401 Sheet.402 Sheet.1 SD and WS receiver SD and WS receiver Sheet.2 Sheet.3 Sheet.4 Sheet.5 Sheet.6 Sheet.7 Sheet.8 Sheet.9 Sheet.10 Sheet.11 Sheet.12 Sheet.13 Sheet.14 Sheet.15 Sheet.16 Sheet.17 Sheet.18 Sheet.19 Sheet.20 Sheet.21 Sheet.22 Sheet.23 Sheet.24 Sheet.25 t(sr) t(sr) Sheet.26 Sheet.27 Sheet.28 Sheet.29 Sheet.30 Sheet.31 Sheet.32 Sheet.33 Sheet.34 Sheet.35 Sheet.36 Sheet.37 Sheet.38 Sheet.39 Sheet.40 Sheet.41 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Sheet.46 Sheet.47 Sheet.48 t(hr) t(hr) Sheet.50 I2S timing details – Tx and Rx I2S timing details – Tx and Rx | Parameter | Parameter | Min | Typ | Max | Unit | | --- | --- | --- | --- | --- | --- | | ***Using internal SCK*** | ***Using internal SCK*** | ***Using internal SCK*** | ***Using internal SCK*** | ***Using internal SCK*** | ***Using internal SCK*** | | | Frequency | – | – | 24.576 | MHz | | T | Clock period | 40.69 | – | – | ns | | **t**(HC) | Clock high | 0.4 × T | – | 0.6 × T | ns | | **t**(LC) | Clock low | 0.4 × T | – | 0.6 × T | ns | | **t**(sr) | SD and WS input setup time | 8.14 | – | – | ns | | **t**(hr) | SD and WS input hold time | 0 | – | – | ns | | **t**(dtr) | SD and WS output delay | – | – | 6.10 | ns | | **t**(htr) | SD and WS output hold time | 0 | – | – | ns | | ***Using external SCK*** | ***Using external SCK*** | ***Using external SCK*** | ***Using external SCK*** | ***Using external SCK*** | ***Using external SCK*** | | | Frequency | - | – | 24.576 | MHz | | T | Clock period | 40.69 | – | – | ns | | **t**(HC) | Clock high | 0.4 × T | – | 0.6 × T | ns | | **t**(LC) | Clock low | 0.4 × T | – | 0.6 × T | ns | | **t**(sr) | SD and WS input setup time | 8.14 | – | – | ns | | **t**(hr) | SD and WS input hold time | 0 | – | – | ns | | **t**(dtr) | SD and WS output delay | – | – | 6.10 | ns | | **t**(htr) | SD and WS output hold time | – | – | – | ns | | Note: I^2^S slave support of 24.576 MHz is available only with I^2^S1. | Note: I^2^S slave support of 24.576 MHz is available only with I^2^S1. | Note: I^2^S slave support of 24.576 MHz is available only with I^2^S1. | Note: I^2^S slave support of 24.576 MHz is available only with I^2^S1. | Note: I^2^S slave support of 24.576 MHz is available only with I^2^S1. | Note: I^2^S slave support of 24.576 MHz is available only with I^2^S1. | ### Digital microphone PDM interface Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Figure : Digital microphone PDM interface timing ![Digital microphone PDM interface timing](data:image/png;base64,UklGRuIGAABXRUJQVlA4TNYGAAAvYQNVABcgEEjaH3oNAUGR/6MJBJL83WZ6/gN/FYqCtm2kmj/vfXcAImIC8nOojGv0hcrDBFNP+nYAtbJt27YCqfPex4X/wQ/1nSIR//8x6bRdE6f7vdeI/k8A3EhyI0lWNoT2APAHc4/eF4F2k3O7mBNPiuj/BPA3q/747x+KPu/22Zq/m/+QSID8/c6KUFna3gHv5G8gL4XYn+KtkLszvBd2h6J5J6jse0PVuEPt32n8wqKdugbAN2dvxs1R3yu3R3mr4P74Us43KFuseyw7/PHfj//+kQjK7kGx3HeAurkFWYcN2MthX6Q5q2rUA8z50BoaZcxPR/LVNI6E2IHkzsC6kmdj/m7gmWjUM9+ZRiHzlwKSTrolJTrqVFJpMST5ahpFnKC5pQEdIDuauyDqSZYIyo2mJkkLi45wGKws+VZ602gXJXs+ZP5uYJX8NbVdGL12sdiHRjXzKnYT7DaSF80hjVLmhyEclnw1jToRbQU2QlST3E0OgbUlz+L/MWL+bmChFivoG9GoZV5G2WtkkFSydWREo5j561n2oqMjkq+mUcYZms1SUy8WdpP7IGpJFgHuDOAVSIUrLQbA6pLvlDdEdMTZod+ZvxtY5Jkb0KhkvjONcuavZ4AvkXw1jaMhKkluYTlYX/JMzN8NPBuNOuY709iA+ZlIvprG4RB1JHcG7lDyLAxdH9IamhTUJduGdIWU0TpO+oasF1uww1itU/uftT6/XfwvG0Z+GklxBpX5nC+aJRlUOxUls5EGdD7Pafy6YR6K0C6ampf2HGe7i1OwnOOFjMvXjCyQgc/d5xQwg9AxnfIpRc+QcdcOQZYluQYxYTgXxZSwXcx7llPIMdzRLe/0CAzLCF+GIVkA4BAwGyOGvMP0AAbPx0docWPPCuqZxEAj73hmBiA5vmRYANcBFwDsHwd1mZLhlCUc4slQlqWm0FfkhJ0M50IpCANSEVTOBCeod8gwoNNOwWa0R3Eacq5xinIjB7LQOPw1c50Z/fD2cy451J7U7uJYMPZ50tddnstnKJ9kN8Zz+fa9x/7bMP0Nkz9iSX4UIMXZaJnPSX4UoJLxORNLpgJpQOfzGEumAnn5OhNNS6WFpualPUbTUmlx0VOQOSoZSsbla8JizmKASnbsEBQT4jqhM8gp3IjrSB6BYVmSazAjB4MpzUalhXnPcsrHFHeajUrrME5AFgFJ+CrEyP8xA6QCZ4DpvCMNeaOYHcF93PF0GCQtCjCo5JvZAxobWaK93agLAI73ZGzYAMTI/wEEuz05CK7SVDKEusI5kjqleRC2yFJTU1O4gGOUGTsJ6pTrJQxIg1M5kzMccL3ExfIMKBPWYVCcRMwFp+zGOjyLeeP410R3YtR4bzyVHGtPyjs9FU58HsSBr2P5jOWTPnefY/n+dSt/GNEG+Fvjyf+8Y5j1jqFsdgRVvWOY9SI6hY7WiQ7qdnQKu8iL1PGLFcqLbGJekiTBsiBJc1bV6CS/tY7GDjTq+AXckzlJ8zqSJCXL2MW2plFHoxZx8U0ROwALJamxK0lSso45aV5IkpStgYVRTIOU3JVGPY1KToIPAZJOuiUlLgonNQ1waq4wp/miBNA3HQD0vSNJySUJoH8RgA4gFsxp/hwnaG5pQA/5bRrfoFfGOxrfoXd6g3hQUG40NS+0YAsyyBYriMek1sBvO/dS4zl602g9fpekZCVz81KSkg/KX1PbhdFzunfcF4FrnXAMVUdX21whFjnbGKoAjaDv64eqDY0n2U2wq2RjtE60JRqL5GpzOD7G157GCrnkGI4BWbAv15KD+zL4IpSQAjvQkR0p7ApyCSpBgR1QCNTF6dgw+KMi2oylXix1UaxJ5EsE13RNIl+Bmn2Fdrg1fgO6BMxhP8FFEAXMXTwRtRRIBhXIJZLL2iWMnzJfJVMYPyf5rBbPwjdUCnMdBPawjMf1B+JByl4joxdK69AWxTIhBfZTuixBgf0cvITlTSODwUbGCoM/ocA1QT6Be/YoZ2g2S03taX6T/rpoUEIJ1DEde7/EikFlH7oBted4DHBnAC9ABtkYDLItCayRq13i+JAjxR3oErlkiuM7+6gNDeRz8oaInvObJCWXwNlWc0h0dCF7x9x8BZyqbA55o+8rhBVJeUxFcNVfNSeWvN+BZUmNnWlU0nhEh7ANqpcwwL/PnOaVJCn5AHvLnLYvjXoa34fhA0SJZ2qQqAQ+Y1+DRO5KkpSsY06aF5IkZVtgPaKYxs406mgUA0n1TZmTNK8jSVKyjDlJ25XGDjRqETsj6oC1NDq5B8N0XgRl/WKomxfBrBfROe6A1XQKRWyR1olqXONFDvzHfz/++wcg) | Parameter | Parameter | Comments | Min | Typ | Max | Unit | | --- | --- | --- | --- | --- | --- | --- | | T | DMIC clock period | – | 163 | – | 1666 | ns | | t(LSU) | Data left setup time to clock falling edge | – | 5 | – | – | ns | | t(LH) | Data left hold time to clock falling edge | – | 0 | – | – | ns | | t(RSU) | Data right setup time to clock rising edge | – | 5 | – | – | ns | | t(RH) | Data right hold time to clock falling edge | – | 0 | – | – | ns | ### SoundWire Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) QRB2210 SoundWire PHY timing parameters, as specified in the following table, are compliant to clock and data specifications, as specified in the MIPI Alliance Specification for SoundWire Version 0.8, Revision 04. See the following figures. Figure : PHY timing – clock output/input and data input ![PHY timing – clock output/input and data input](data:image/png;base64,UklGRkg/AABXRUJQVlA4TDw/AAAvL0OHAFUL47ZtJJn9lz07yczez4iYgOxWzllL2e84I9nuCtMh9wlngEKgYNlD655CIsUT1U9xRe1TJCLFHkvIYobEivUYnEfeNCaOz1BFfnBcYnqiKk5g7a4ktMb/L1vbpqTQISAJoyUS2RKJbIls2bJly5avfCWOV7Z8ZMtXIl+J66qz1/r//3ufvf77rOsdbg053BkgUdQuHFHc1SSAazn6LvxL3XkwrExWBISwkqCwpIC6mGIYkyCApwiAFO5MdiaHIQEiOFkwszI5lgSoetRKg5ksxiSIZPoxxbFrWYK4JUFQtR1BTDsF5LyZFB67qxNZTAGQAhosIZAAIeBRSGtrx41/s4JoJGOKxvijKNJEEWkkOdkSIiMjI5GUQP8KiUQikf2XBdlq3TDHdlPFjkoQktDLcX+tTACwSpLzyZNPtnyyZcuWLVuOHPlky5YtWz7ZcmTLlk+2HNmyZcuWLVu2ezXv+x70m0m/MMtR567OBdaHOetC6+Kmal+YR4WjRl+YX5jUqVOBdVdxLQ46HJ2KI5mKY+qaemFcnarR4VWhGbFhJpfY2/0NU3Wkgj9gXUivCzP8gqMw/o/OP2D4ASdDdurahtExdthypmrOhR0zHKzLylEXtT8h8IUzYWaQ9A/uaqrWhVkzM0/gMMzgJy/kTp4NLfhw/IGf3xCVKNKHipyMAYAC6RrbbMe+7I19g2EYhmG4eD/pcPEwDMOwZ/OsZ53NWWcyBYANJCu2tY1dMBgMFovF4uDgfuJgMdhnedZneZa1nvVfFiTZcds06AMMC3lCiaYOPgj8/W6+7LK98Z8XU74RfNnlAL72NMCXWQCAL4cTPZc5U6BK9AyvTRowJDSvDyz8BmhZXXjuhvD7aVlXbIA3TMusXoXA5Hl5YOG/O5htoIU2/ezsFzgs/HNE87wa+/1Hpdlq4Hnu+cn8RL4TBfFbjGmMhgj/MSK2UCs+dovb9i40cHS+E6jj+Cl4J+2bwLeioZbSCNXnH3u/2H/fRAv4CSSfxDzwOfSEhb/2HL5ScTrBVtZu90jM4zuoehKiSfgR7pRwNWP3R6xDT1j4esLjeHX2DajEu3gj5qEosWNZ02GqYlTiXbwRPY9qe14AQNcByIgBN032jo43T+JdvJHu75pumjtM96uxH8AJubTVE1F4s0EOYotFsTFRF09E523er62t3sTb7ol/3ND7Dn9k7/ab+Fj9cV6Bsd/CR/NHzP0GPqo/Yu237+GPWJa03bapu7bqkxj7jcvaqk+isbZUtvaXPQB8VQCxY3sIw5PmtYCFP5Zr67DclX0DGoXlAqZWjFPf/hquAFm68kR+DFwtWFkkX8bn3MKhk1M8ojF9cQHywowd4QzmrH3E4nV9dfH7S5wMnfVSgxZECAJ4eQEa/oGtoY0GInY4+QCmKJpsGTvSb0t0vSXSvN7MoIxgRE+hjXzHkf7DBYiGqRV4s0qPDMTF6/rq4veXeJDxd9ZLTiDID6BPpCPGWEz03DThp3DIbrdNp2Lzgz+VbWIG0hROpYCwwd9riUzoDiGgkM3EPdi5uCtXV5eI6JleCgcel1JwEvv9+jj8IobGcDBTDLWQ3DelvpeyXgpIX6RdG7ppEKA1CGEPXiTblMyaA3mEGHCzP+4ukYVZcAGhtUCKm5ywI9yIp9A9wN5lItwDzJ78TYxiSCWOyYDU1ViopOLKH8Looa0T3AKNvf6xtYv9BzXW7NZ+xeRVnZfc+6pxddZ1iM0/SQu2K0M+tg4Loje5P7mUI04uAnApUxXXkhesEaUy/iH0jva3sEvo1j6i8sby27CkDlJXY6GKoKsFp5xxOu8eQgPxCnUO/RqIAODqniVSCzUuUZ1lKir4JmkBvo1RBBDhP5MI7aABs63hjAhXCz4tYfwE+GkROUQUdLSHTddaL7+7dT9XUlcjQa0j5yfHDaf269h0a05fUcY9zhfle/eW6vePVa5cXJ11tdQNPolp8ksaD0GeVqR83JYp3ikHFNUHxFpYRewpSIiMiMI0NWRGqYfU1XiIjRfW3HFS92Df346OlzjZvEWHp4q6eNKvZsTXWVchdLtHYpv8eMhYpTILGIDARnHpb9tGDQoZYQw3l/AgAarPTzO0UCdcXAupq5GAOxFB6o0ILmvIZ+M3AAcAru6h30k4JIFPj+PsrOvt/ohl8iMibM0Uxb3gozYb9t5zYvCkTu8AQZ/ZNWpsvpD3Xez1OjcXz+b3aO8jV1wLpasRgHbDYbxuEZz6zHSvB8S1lrQt48rVrG+ubjjOzrri7o2YJj+iLeWKj/vuBu4EUg82lhCQFsRyQCxeimkZo65w7Miggai+kYBk6qzr7d7IdU2+0kOnGRbPlu8I3rML/GMVKVjFi0nRpnqPrZfEwErGQutqBPqSJ6yx7J7ICO5ySRogAWAhodgUhIOxGNjqPywbbBvEA0sYo3Py6og7rC+/3Cfwa3WwJBcUVSI3UXYLHsniktGXtIb0PTx6nHTMKz+L+31SbY/gH/zSX/tPxj8PZyzrKYUyP+XOqBTMw1H2qDcO7pj9wHYfUxdJ6LUZ1OjHsJ5SjMwZlaJ5nroeNw/OmP3Adh/pWzyhF1eakz+G+WJqgLYT06U0EOpbYIPCQiu/U5Mpo1K2jkBRbzvU2wcHzb72tXsJCb0EptFvbhFkM7nmk+Iz6V0aMdaUrKSiOwdvwE3LPnpMQKaMStk6NT0J9QbCQbP/s5/1tHuJCb0g1xS7xbZN+zoUhn9XAm6a7D0qjp7LdHFh0z6yZFQK10G7yA27Dto9s+9v9+IJvQLTcYtKZ3CA4hoSmcip07kCoL69RuaMSpXN/abBYbOvfe1e/G7vOBiHcTvcsvcrvFdTMkPqB+kZTaaMSl/FYbP/b5/1tHuB2btNyJ53Yr+frwiv1ZTsRIRa2MRQQ1gOKFdGpa/isNn/ls8GsPsv5qHN3mnUDGDQCVWmSgStKakxbIRLXR+sQbaMSk/FYbP/kc8GsPsvncOYvdumEzsyaMoB+a/Iy5lROQ34wvaN/sXsr2D3IyfuhEmZ4vJk3DT7yyrKYexeAyalCRAXLY8/Lp/GTbP/n0Bvu9fXdDyLSbLcLw/T2DgvFo2NjY3zfi3dt2HmPoYtqID8vfU5tvDiRFqAOMyDsQNBA+TvrQ0IL0jYBr9+iUE4AQQt4Gdoypce+XKEfbRahzN5FRD4kjOf+MUI+9B0KXujYP6/vONVvBRhHareKqWR31vH247c4yG9EGEeut6KC9e5f1kA8EKEcVsjZW/1iGtp62WIK996W11lfdULX6H79vV6uPYX+49dbQRlf7kf97nWCP3+gj+v4EozwPaX/nlrw5r82R1az4t+uVt3s2u97ublbl3n4+V/Xec1TUdXs/0aO6QY4cDWbgnGmso3M+f+44Er2/YFyi1AeyyKPBpN6rJmGe3Rj2MB3JNzNwkz3Nr2MvXEDYAiqD7/AOQeyId55Sczrbth7iTR+NvyCC4E4rGv3T/wSFNOMf42P7IegQoiZn4d7H9AWnLdnf3A3EceANajOKSls7PTuU03Ye1q9qaKQtLfJnSUwWYBttNjvD4v77/oMztEI4ICVy4R58xEJpqtM5vkmJ7OGVgnm71L6lKrKqgZWE1TyebqhjU6mHlVv1BUIYhBuTXgVwIzzY1vZiLTTPfuJ7inqHQHJprUHVkfjWSJnFw1S2Rwl27wJiCSJRIzVYXEMzORyWZxs5TNU83duNuWPqRc8SmqqhmAPcmfgEj1OK0xcP6VS8QzM5GJxuGnSwoTjVIHxr2BZV+p6W8fP4fVOgCfFk56tJ4v4F+5RBwzE+GbhJMZE9JIpL9GTPZb0xoTrq3sEdNmzvHoyLbOHQyMtz0oVJ2XVusL+JV4ZibCl0AvFTEVt1UrtGkJbW7YAEeoEca4D4jt9Mhqf9UanvhmJjK9f5jDPGP+ZhDHxFn8tMaEoBW46vH63vph2LhttPBAHMFN+TUgJyCumYlM7tvJLGRdb0bkyZ23ptZWa00OgL2lIgF80OEdIOgAiBLtggXENzORqeUOFVjLdJKvgbuPyCLfNT9MKsZ7s/scwDaZlFU95LnkB+XWtlRnILpPXYBPmEru0I74Z8ai8FbcD+Be3ceoXNM0EjFq3Fg6oPCAb2HFWjSg7sAxjczj5spLB24lfhxd/lCBsmJNU0gA7iMOXHvpwK1E53/pQD0uL1PIDJQOjZYO2I8czr7/2rPrumWKT6ReYr7A3AmCKUB1ntS9TB/Buku2SksH7EcO507sDMLx2UU4ZqpKyxeQ6S40GTFVeUyzJZMOMR2WDiYsphmkGeB6MY106YD1SJXIG6PpZy8tYkxSvsCkHkshDTelU3ngB0dxKg3EWCukcNukAL2TP/8y79J61c/7bobgF6BvTFX1mNK0z+8c0rbGuXSApsae/GvS8gWy4GLz5us52c2LbaZcz8luXlcDzuYRe7X4TFh8FpQaJNtEoEnYTlOoD8eJE56emI4bZD60kFEuHaAgH8fVmYHjIjfvFu4oLV8gO/mIuAJk5daD3JDdWqPjQ93jM54w10CRu2urT6SVeu2YDkt6PWLCaulgmmIy2AeXV2hw41w6QEE+0jaRgkIrhSdKzBfINiUF1msMbwcGQan3Yt8QPc2UY5gWJd1kBd6porYDCINrWdltA8r1lDH+pQN0QHq+gLAqgnrhYPbzHa/XiIVukgZJJKaqoZwCgE0VCjBPGu26qTz6pQMM0vMFBKl15Lwbomc4vPWK7mWNcKIvm9dor5wWdag7EMeGPlrVa+kAg/R8gbAuiMiK/lPkx21h64SKHYK6K80zv/bYesWOnZeWq3T2A0qpAR+0oQH7hJFWzFWrbeD1ApImIq6UdmBRxzNZgDJdZCDXidmUVloxb+oQgDxdLEDyOwKQLyjkK40KhXxcv2MB0gWN2uKDou7VfkcB7vWCRqX/VNFd7Xd8DuDUiDpjnShO4PA8ZqxVJTIQpok7UPyOBjx0ogD3SSIBS/U7HkDTiboBaYoIQPA8ZszVQCeLHhBdw8nvOC9hrUiX4AhQSpl+xw40E6WqgOHQNex5rJiriVI2PRy6hv2OdglbKOUzDYeuYV9hyE9baFUJDIaqYc9jxlwttLLqwVA17C0MGNaMAtynBmCrfscBRM2oC9aJ4QSy57FgraqRgXNa2IHidxRgp1AquE8LK5bqd2Tg1I06Y54UGvDwPO5AUo4H0K6FXlr0PICtEujVMJ8SFqzV7ziBTKFXS2NCKMDueexAUY87kKaDAATPY8ZcKRSz7engDiS/owEPEsV8p2HQM1a/IwMng1qRTgYRODyPO1AV5AG0QVAzVs8D2Dj0inQQ1IzV7ziBrCEV2CaCBNw9jwfQVGQDBkHLWD2PBWtVgOF6Q9LW1GcHit+RgF0Dhuttv2NVnxlz9TsCEHSkrliMaLSnAQ/PYweKkuxAmgIycHoeM+aqJAE4p4A7kPyOAjy0pAD7FLBiqf5Gs2oLLakz5gmgySfheNFzMJ7YTb9ETXag6M8BRCFe9ByMB2D6JSyqnQj6s8lVMznPwdi2ltMrE6NbVU/S5YT+QJ6uej4H4wG5KTBKnAdjxd27CtrUU7spE6NbVU/qgrk/eq8hUPQ5GCP9p2ZVa5Q4D8b1+W2Jrrfw3t7BUCZGt6qiPIB3vZnqM049ByPmCMyDUXgijJOOG5406fzDK1b55YAwDLjiyENhhbJiq4pyTgDbaNcQuPIcjDYC82AUnghjtikJo3CTE3b8FD6MfEs/hdJ1qwrQ7cQ3oz3jXUPgynMw2vDnwSgyEUYOjKJ26jViXH3MHlihXM5EVQveBT8G5YlAHifOPAej/YfAPBiFJ8KI1tCwQjRfU6ZU7oCu/awPQHkOoPGo+hyM9tsC82CUTPOE567sG5TK5YyunAOg8Bl9n4MxPIgjMA9GyWofxlTFSgU4dCUNgMJn9H0Oxu8gbwdZezFxQebBmEMQWcVVmezdoGCisuPeS3/0PaPvczAOJN5E7ldjP6BgqrI8lOeYyjs4tZEXnx4rl01bTuXZJvQOTgrm0JakPMDd/4jqztv90Bv9zkyx3UOPmOoYYgIs6RWN6Z2lJp1jOjDab6bXoUSXgLFZ0t/IMW0j/mbaoWlMclymyG0Nhmcg21Jwn5SYEFlhqn4xHZZ+VI4pgkxcjCymW/mStRNK10ssWi8tT/Woz60M1CZrzYa1+h1Rb+5aA9wt9LyR063BoTdrL5Qc9dHzRk63BpveoPVBxzOK3sjp1gCKk3VmIc5ofCMns7QyjDOWebN/gTeU0//7Jb+pUrdymk6i5txVJlGT1hS+kdMlAOA26tW60hxvKKff+r0/XKlbOU0nh94sWFXmpCataXwjJ2od4HsSyqJDOf26C/atnOg7OX39P/68X36ka2kMh3dpvXq2uxnKY9Ob7nfANeZBjPqofCMnppAzGlUG+/7lcEM52di3cmLu5PT3///POeIijIcSoT48bOc3H46VB7BqTVdD9EDFXy9X90ZO6KAaRNDB60pjAnXDjGpj3cqJuZNTrfXr4/Vi36AtdA3f21y98ojArDUVuPdAxV8v1/NGTjSpifJa99lZmssM2mL/Yd/Kib7Txtf/wf/473qvEXH0NFOOYVqw8jiARW02rD1Q8clKlb6RU/bjdsjSHDeUk/02cSsnkl/xDXV9Ietnjse5xYpIJKaqoTw2rJuIu4YYIyhyNHz4Eq1v5KTRceqlOd5QTv/rAnErJ5I/8rP/wpfKHaFI2yZP9OUVt1cewF3GoSIRyPqyYK4mat/Iqc0Wt2Xc9+cN5fRTu/GgX/sHvte4ldNPo+7k9Dt/+i/743aIXp+56SSx9YodOy+tbbAfUBiGretNBTZ1GPjhCibsVk5f/81/VLne93kATXE2QF3O6Xz4EuWyYK2KcwBRW3ag+B0JuGtOAw5tmTFXv+MEsubUFZuyFGD3PB5A0Rz+1wsB9QiXM57HjLnqTazsr+MCgHbcgeR3FGDXnQY8dGXFUv2OAATdqTNmVWnAw/O4A0lzrH5hTclA9DxWLFVzrIa7pmxA9Tsa8NCeBNw1Bbj7FGJj1566YFWUE8iex4a1qs8DaHryAJrHYTlR+hOBQ09mzNXvOIGsP3XFoiYF2H0OqxN4ArgDSUsycPobRJWgPVakWnIHkt/RgIfyEN6VCLVi9SqEpq4+VqQitIrV26AMXHkoCXRkB4q3QThQ2kNNnpSgVazeBtFA1x4qA6hIAx6exx1I2kM6WBryAJrHYc+Q1JzzAtmA15AFa/UsRGHViUAkx68UpAC757EDRX1oFepHBk5Pg64MJoNwCfLoFPY7TiBPBwlYeFQKex47UPSH7mIsLCqFPY8VS50A6CCLSmG/4wTyFEAHWTQK+xmM5zQBcGrk0CjsZXAVwQTAVdO6MV/CfkcAwrRQV8yq0S5hz2MD0sSwA00zHkD0OwpwrxNDBHZ1YGtdv+MBnFNDnbEqxgkcnseMtU4OBxD04g4Uv+MEHtNDATZV4FVSfQyunJ0MGGWqAl/l8qj74JjKjCtnJ4hTMVaslUfdB8eceB5AmCLqrBZBdsMAdR8cc9pJK+Y6SWS12ERXT9+DY/7QX+qqIAJwTBNpVYoou53m9D045s//3dH1lnC/x4hiqo7FNIP+uowSqqYxRYkwO66ajiPmLptTMHkPjln/1V/81KTzD69Y5ZcDwgbyVeIu18KlmMit1umJqVxZoaOlAEsVMHkPjlk/+ztJGMYl3/RTYZrGpJCqTuyyJ8mYvgfH7IBh1E69RsGKvjHZ7CJhZBLG63xBpwMVV/zW436dq4DJe3BMk6YkjCvxbzIbvUQDXRK1vcQk2FqWvTj2OlEPjjlRBGCv08asDE36OlEPjjlNpO514kDWhQ0IEqbtwTGnhgPY69SxJk04J22Gp7aXAyrgeQWlM+PJAw9FSPPUredUQBuQ69SxAlEHCC9CiPrTpCeTDCx18jiBRQ1a50UI0X+a9FRSVqBNH50SH0qQlh4/LKv/NOmpZAGOOnHYpZES7H0+o/40aYzXd8q/6DPvqAs8JVqIcLK05uzAUqeFU0g9tSD0eU//adJYo4PterOffzLl1oBfibxQ3W+ydIqxuBDTyADWMjEcUuquAw19YpyAadLoadHZjzNVRYgmS9M+8dqcj6nuQ8ZkcPaRSSZMsL7ZCGIKo4zp8wCf8sIAphTzhf7SNzc3S2ipjSmmtgLzNaVXb5o0elp09Tj0s79AmGiyNFFqrR10TPgEaUzFsZhCr5gQjJgeVRQTZMJ8O5Yw148pXSmmuzSmasX0Y7GkoGMCKJlmS6ZhY5oFMW1DxDTLYvqwApZMV4pJu2nSat3YLZz0aO67C/se0WRpYmvH0ZiYTuViOgA8DClylcQ0AwJhNiBago49ptM2nwu5naIt3VPfmALwzbDCGBhSdAIsyZJ+xDH1qZiWt8B92675h3rTpLc9KFQ9p9g32WRprbeH3ZKYyLdrhbE7bO0Z/e5rPgnTpPvMfnpk9WJEVssmS+tMXDDFdLo+HKVsPY8pmCYNGz/PUfAHKb8G5ETIJkur/LfObNYJJt279kdI7tH2LplD7cFETJP+oMM7QNCXd+UuGA5Yw880qLLJ0n9mvGCcWwz7jK6UTRNMrWE12lFHhDtbDA/DhdhKncBtfUFTDji3fbL0uM1ni7VOMjUdK5zclk+oU7tVeug0w/Jtv/9D91X1P5aHWchOMrWmcHeO+dFqnVwmfTHiD//cqv8e6ax2LdJxXJvjSA5SST226BIxVe/bro4xheH6JdCS3ML1zfMxj+XaLN3+Ek7oSGPIZJTsbUsX7FtmwxPMeaebaz63SE7dKhoYwj+bI4QnoigBdwPtl0oiEO1jLPuK+wX7ltkGCr7RFvqdIDSmS2ynn6JQmCc9Gv3shij2BtpjodJD+Cnk3EUvn4HzRPJdWC7caHZgI28JhIUwfhJwIXFEz9g6heVd70ydcotrePCnJh33UzjtcRAUnnT+4ZU0h2OjfzL7AYkDaH/x64Ow9kQyqlLf/hpftinJu92ih82XHGazxTOevQeRn2WOkT80OMnAlVT092zg5vbRY5JetyHemFncUNkFggXohNPBJQ6g/YXMPghrT26HRA+aEoh+/oN3wpbb12t8DIPZQTCivQc4ZD3f+fIco0YmVpnsPSpu+39hU2RX4oFDZae/7bp7xJi0AbS/fXafAP3tRETPXIcDj0tpDAOKYKzydMxKMsMasdBxk/z9B3+ELbev1/gYgDGOlvQBq0G7bG5P4qMJ//AAqG8XBlvSxqPuEQGTNsDp58a4AnTTIEBrEOK1RSpXkT+E0TMTwe3hnJq8uJ7g22l3u90aseBxk//9h1prCJ73Bm2HwzY+pKV3H+AWWJ2G0LvALFI/yDmBErjDc1eJfnh4yMfWYWk1qgi6WnDqskt7QVPyDQSNMtx2e47QcVPw+w+1Ac0fGbbxIS29dfiDhV8/R+Hk+r4ub3lthMA2Mbih/vuA6dHcd6vHbVN7a2W/X58z4LkIuJDqrTyCZo7n2VmJrhZgv791pTmsecLz6x02JWEEXDjCt4n6WvT9b/yRYRsff1ZYervytnkDgR4cgHSp65cLDdL+dTRdH6xBzZwDQD+Z6vPzHACQ6mR3scYsuITSPMfy/lmO+IY+hqWtOPrQDWvTwgeXGVLvhnhE4DvxT4ZtfHz3JSu9+/K224caQbGGUPodrddtwMKYYUX0yeC1YEsRzBF428Eu4v4DyUWMdSDLL+m0e6apEcG1E3iw5CLgjp7xQPBOhm18XIWwXvYvxR5mBMX+9lzfH3fUC4PNPRe5RbKzjr3K0bxurVefme71gBzN6wwePXn+N58ie7f7JsM2Puo1iJ3Bf4ffZwRFAtf3xx0dornncR8xhV8MHwj76LWtL2jgWrwI4jlq1mrunsmwjQ+r9B4Ys4YYZgTFGkIR9v2Zh8lVtgDAZL9BtDUIScdBYx5DrqCKf/FBxtX46I1p9EOMoFRrCEXW9/etO4zjmjTzwt6wCbAWOtAYf5esoLri/nk8kOs2PsqR+/EJR2TGO8x9iBGUag2hyPr+fvSLLp9dlXPB/Vwq61hoxGevuXsg1218RNuKISMABz+e3rZtiBGU77GGUGRts29atbV6JUSedklkHWnMY7sWHr81mDsADvOQPp3xECMo1RpCEfdlUFxzF2ItdBg33r+WJ3S7lGCMdIgYYgSlmkMoQ3DVXYS1LsgF/H+X0OsYZASlWkMo6Gt/cbnqvgj4PPa6IAcCLwC7gD5H/xGUAYZQaK66fyrggzHvgWdclwSLF4BdgHFc+15wJdHAzppFGNUe7Ii8fxfR/X2ge8EpBkzqmHaj7IoeD2vWR7d9QrxsaRu0Xa3fH9Xcx3NUn2TURj9erlwVC96W5EeqP34fzfFSSwDwQcC9y49yMfMoRshCtfD9LS1WXmzde/k4ZoC7W6wqEBXVJuAIvfbj6tDr1Pz/EF2ydLtamNmRZ8FZe+wtluunTmzV5gXgWAQkY9cJKzMKSIGQabQbwQvAkSTjpOauD0RWNJBLNX5eAI7K0dZQrV0jti4jWoj38fMCcLDURMmkEnvtRQ0vW0QjKxpIM/Gh08d6Umt9yaJt91Tl1HTfwo3CC8DWp7Hxxn/e+M8b/3njP2/8543/vPGfryFEKSUDyKLt/eM9RrJl0QbMOZeJJZU8xu22JsWzyzMGPwl6u5x7N3c57PvGsq/v9gv0NzN4zTk820SS2tlpfozbzbHnIbdS0tCfN9/Jrzw5P7p3TMazvb0fWYKxxTR8VZzzjFmk+sfjjhFt3/d4L/liwMNK5TTs354559uYYVM2d7VEGdB0zL+dsWULyv8z/vb2430fTeDdB+OL7NneLHKMZ+4+2oavHww4pR/3GePb3n78PiZ3mdipPFwip2gnsXmKSGJLjGsHbju6N4ay+WJYTiEuIc0urADuY2tOl8P4Momw2wvvCCFe85mGrB9k5PfvwGwjq49lDJnIJeTXHJql2ZZfyRyeTkum4iy3T8AuGwVSlBZPM/cN4v/nV0q+1HEm8n8/scUxttEOAEuzS/oLHxNZ7IcyYP3wbFaAVP39rVkTPx5j4vEwa8p1FwaGS2SjMmtcgjOl5Q3c0ZcaXRUUw5UqlhBPwyr688yvlHmk80Kr5HGMVF1tBtZmW2gXKHQLrgzSznslapJ3mKlMUhYAs/VQQqOsjx/VTtWOwtWysfdh1NrCBK/FqNFv5A61rkhNtAFH2rN4DnEU6ujepp+JP45XWwu5mxGRyuq/F7oEKh8xE1VhW4E1j1dZD5APoHZ2f7RamUROvY/GJThzPNPNPFwT6Kog0nmzdfuARz0zyW7kpDFu5NcqNh9zDonRxYD1Q7sEPibyWMqo+65Xao9G4MlXW9c8buExG6YqYNJ8MANojLU8cw4Eh3mMfF+SxbszMx5SDqmXsriS6MJGHvvYy8SF0FYEApeqJec+e+kOcYIn87it93ymIXdaqMLZjk2kGlCjPnm32NJJVxGdGmvtZ/C0EO+wuXJwzwQZgWjUVZyH8RTL20koTvBqKv323ntYsjyyFLLAdizSCoTxK2sGsoVpx7QaY+1j8JFR6maRZuNwYr/b8wrs+onWQyThsqI409ZoVIc3+B65YpMpQwexnbPLtDabGybfOlfTxFRP4nQ1gLLM2tBmA+5uJPEKHPY8HGNPck+By4rSeozQ+M29C1y6JBSiMm5+SJwl2WQnnj7e+nomvCk34Vu8dEZtbnO4oCvK3YzEvLVnpyFhpuOlYZSaGO+i3MCTmvuZgmU9jBDinM2JbZPW7iIntg3INvWkvVLhW6LaLxkQlaQjWwDmZMzzFGko8olsq1Sc4DXe1hexBsJ5dX1LzidjX4acNnfgcKVwWbGWDkEeTEz9wGiQs3ebpWvoObPdgYcBke2EeZKrpZki6JZ/j0n/0qsCkL3HWZJNBGZndHUAewdRwvd4y5YscvZucxAXOXNNjECkNcSWMLwk4gSv56383kDtIIl9c/bBWRLB4tSKxRmIFyh7ZgxY9h6jZpsCrMmpIhFYIhDpmqxPCRN5D6KwQk4ZseNEd0l0qyLnMjFv8Zn6ZCW2CW5VEd07FyijlWhGbOKGKm3uVpe4W29doGuyHlVVEnkQtPaSuqQue5vIQEjNAO7BSsMT0LtjFW6HuZYIuCP9R1z1nMPcO8E02M/f6Gn0QfBKMANOeSYbcIG08D4NkCboubOJwOKaD7HiLRC5rgK6xuUaqE2c4LWp/Bl1mgv7SoXS+cnuEh0wHoCWxBrcDnMtjd0iYZf2+O3YWp6AepBNdcbOBWUtaVlshUhgDPm49GJAFidMfcCuPOI+kwi2znN1bDsAitTVTmwXDqM+LmNq/4pxxaofPQTS0iuXKC4xFjbZGQNhXnq+0jjW8N075J5eYl+5osXmI+G5OvURktokL31eE6PKWBUm/e39lMFm93p6TZxW4N21amg7xQ6QrtylL82bpNxe4WCDC8OptR8MxUEbEOWLPCgR/ngyL7QQTf5a3XuttdAU1tWL4kIo5ZwTwaeAg31bmaZKXtqEvWI1A6tpKtlc3SRIj0YokoBOQbfZ67UNoeyyi9A7rbx7nowLozTHhfJfSshtkuQ0S28pPnSWGHlMiZYiZVKKT8i0FPmVkqKjOKCRWsmY7iCF6V4oKTozJqV40vJGW/rN/i6uxfSB/rot5x6JnFulpUiMFNGSQp+Yar8teyOumu38R4NHRwsCgHqbsh/QOgLAGcvxM4HHryGQUPCmJvaVWiK+AGdjypwU0cgqFrsZU3UnpghaipwtKUQaSTLpTVCrczF9HkaK0EfCwEjxZKTI6Wpf3gHT7Pnhfe2nTGX8BNiTmKfdhpubm2k4dnZEaQ6rde3WiHF2SPrZDQgJBXcCCVqNEqmOOaZCS5FLH2spzlEZAkceQuzFVSJD60NjKMJcq0tMQ4B7T9wj/e3j57BYJR5oFCWtMiIX5clIUQgpPoESJp9V5F8xSqguxQTWo6KkiDk3SopEyBtosVc7yRyLyaRyqpCleE60MCcjWi6WtjSKqSdt5hyPnq1zB0N2KkbCjv087X6FVukOiMR0kjmnKoM10b3VjN4opUlb6wVYq4Obycx3sTEaE0jzzLmwomm9adP2vMjQQ2Fl0PhMWAQ5Mucgtpa0OgsMTRClCGPZUgUy66ndBYEdpeJS3NSQXLSo+oy1qsfr9nr1S+wExiCtDqJV1oqtJcNd5j51MVOaSIQAsDnMVtnyhdGYMdomLELt4lJvaq3J23lLxZyOAPrJkO34Uv3hTpk5U1f44l0RGIYpymc/498ro0LO2eDcQsYyzLJWbC2Ls3wAmBGqxOhNUNkxRYvTvAMK79YxGuNs4BSMkXrBr2GIylKmDjPsSWwtDY6yYQF2WnGR11t+zeKae8anDtOtguCzIaMxiY/BiukDWy9f3bw29ilrd3fZZvriwKuqNj7r0rnlg8PEme7iKIKLA+dxS66eXlS8+Mk30EPOcmtZMTtLZi7m+xSM0qTP1S5zeQmM58c55Nz6AsHVbYJR+eJu+bM4TwfgcJYC3GnFPZnagr/6SXckzpvLFP7iwq6qO9lqj8vU07vpeTFZtr7mVzZcCe5AcRbjO0trrpyDoPFHFy3Zaeq938UXGmMNSdKI8oaLn+Kq6ykoa590j/BSncXIcD06RwLXUxdokZGcxlBXj66DkHNjMjFflvrD1qdpVIyytkcdERwmrVh6qIr3C+k5BffqNEZTU95iTV2Z2G/Qxx/o1/VmNH371BEOU/cewdC5rj0GfYLbGOqS110xv5KJfPLh6BOkHsHU2XyvOsJlzp5BukI46XHdtbrOCTzEbaOQOyeif9hThn5OIgNcePaYgxOcpvYINppC5+AC7M5T50tQqJVi9IGevhMmrUKYa8+urJWGFyC5jChI941Ia44HcLrPA2hMrUsXgp36fChcJXNtGj3WXUhroT99ry7TK9g1P4owPGOt7tPkwZCzoT4vCtd68h+mcmbOT/mnnUYUZD4mCzdgdx5ZkGq7GurzonCtTfBhotilsnBgB0mT08iC5LhPkIUzcDqPLEilvKm+PmEP+nDOJ1WbJXaQdKuuE6TByztdBSz+tAZEafDMmVQfF45G2HeCdnlKzSVo/IQW50ns3LWTqAO6ekDY8b6rQF35oK03KqbChYMd9p6h0tMQJr9mLivbTpjTkK4o5aQSTXJCVYHteD+dh0gyQTDm3KjEPb1lzprMNSetJuRsdQoxXUV2I999qMUEpGmHnAlVFUZVG5B04BTMXbPUZjsPfL9C84iw0New8qSVd82YBGP3wMNtCMeONuZmNe5MVdEGTriNOlCBpfL6skuUZN0+IPI+ugcFLTMnbOhkRxybAtQFK1e0mLqiVVWZjncFIPxXvkiku0lMG2A16kHBUk+qKZJEXVwaQPz0EdfisFRFGTjRXHEfssSg9WX2tzPTC7hwqz6y5XxyuZYZtJN0cbkPM0Zvf77Tla0q1sBXLFUDiA5FRl+GF84NTXML1vwDQV9QyIGbFBL5Li7HofMeaeBMtzCnyQgcGsD5r5KO92rEwE0q8ItwD3fjaczSTZSrcvKTCpxH0CXc1Q3MsCNl4PZwvh4cQOSLxEKWl6/SSQWeMrWAnv11klmYkQrYqutIWiDGuZADrap4gaxLlEA215MuBFt+FU8q8J2pBa+vOVJF68nGejgP3QJhWhyRVlWhhAJ2FaD8V75IpFNcFqsPRfqaC73kkI3VfYSRkvMI8mt+ZWNVAdJ/5YrERqrIc2KVO+iNNvNnfuVjdR2mxGBaHLSqnh3UWIsOSCN9zYVDEqsXRRpoV4WNVQ0i/cQ0kS5NWn7lY9UBcaShcgFJrN4SqZRklLx0qawGFaQMhc6aifFcG3AogTDSDu4Sbk60n8BP84qMnedXdk60HtwBRjuFVRXZc6wLB9DEfzyN2znxsXpQpCdfSRSCGUvVgwycFLSBM6rasFYdEPqvJ1MkhkxrrPlIrIzPQefM/OTeJkctFIBWAlOaMG/T7RRlqCtZ1hgfowtLsi47feSMsE3bjE5hpgVPVyUKIKtk24UnXVmchBBAVgKZ/1qMIpGuyMjysovVXzBmfTHzcAozN4RsqriPsBH3vBCqbNznARQtoAs7ukgMdEXWlZc+c0Y4JhfySeXaZA7Sky6MJgQg0FkzyeYVzJirEsj819OYD1Goiowc64nWGZ+JlCxPiVzbzBkuVBNZFQqwi2YLRXPeGiWbFsj812wWiVSCGx0+3jMJhy1GWyfAmTM9g/KkJvUqAVVncbNR6XnR1DC+PuxAYn6Ije6HO3Mmz/jOCaI7yMi1khn6G1B1gG4TkasdQpWsu9mBoglU2SFYQmt81pLFbsh6C1w5mvNJNXJTzpHy5YG7MpxAsHXFGLgxZkIMVGkC65ueOZsZ0054K39SZ/znhPlZItca9k748hHIypCA3dYVbeCJKGcK8FCIOmNmisRGJnjnFxJn/OeElTMJM7E+FXKwZ5AoQ12w2iojDTyY5Yw9UKUMlHNKfDbn067IqPiSccZ7TkQrPio6w1qME9aMFm14AM3UFW3gT1OIZA1UqYHEf41EkUhUZJY0PnSGyJM5n3autfKubTQJuKvDCWRTV4yBU+XMiqWqAeu/Ujkz0kWiqTj7jP+csHOmaTamtRN1xXk5owxm0WFlTTMmog5Ohv7a5YxK1KU7kfgisRHlpRedMTOl1aFlOVJGdzDRFnkATQfYE1QdkPNJTVgN+TTP6MTjcsLMmZa+qIrMuNaDzhDl65kzmWs7ayH6uhasVRussuPMmTbw5wXznzHO6IHgRCSLRLIiM+TxnzNE+dqVp8IfcWndGXUwfVO6NCndGBVRzhhndKJLQypnRrtIpFLcPONDJ8jJuDmftlNo1BbdGR0QGDxRB3QCmHMgrBMNOJSi8xESXyQ2srz0njP0nM5C5VrzjHWiO6MDAoOndJXzaUzLt09czkSteADPnBuVMemK7MyX7fQhCrNAreVXylpizh+xVo14APk10wb+rNU+cTlTteIEHnyRSIlprPb0ISqdM2vhbq95AHeVOIF7PmUG3nJ+i00tErBQOTOaCc6kePIiztzlTNlDJ6S8X86oRAI+5iYz8JTfX86oRV3wliwS2Yqso3oR7UJhcm0ihHh3OaMEEoOndEWvhq7hEo568QDeN0GRSPqFfkTJdHnaMmn08QPeViUQGTxt4E+C50eg6sUJ3LkisVI8c45+ROWgpcjArBQ7cKegDTx+io+KkYCPlcMz/2jAR6V49gFYFKMyBMvlpnpBgx8RJW8rGDjoQGBuDzqrFoh0IAne9qmPsY1fBS/ZyEsSc0nW7ZKju4QZYosURrb1tXEf/SKqPSIq+aFnRM+cAzfuk3P0tXkF+o2TRm6cNDPjpFBznDTkQP/GTDOyrR+dyU/BvDX15uEc3Dwc8sSp4zwcYhZt4+atddnWm+ZFN25eNCGSVvM8N6yRnr0diBNZ0XmeLedmrEPlUtzr1t10c96VWkdQe6wjKJquIzB0FZh1N1229bV1ndqtU4vsOrXEr1PbVFynZtTFhudHacyLTnT+lGRxbrJFUmod9MGtgw7UOujTWgetFJ2PYCexpSrG5061O+FDZ8zLDXI+TeMhROpO6MNm32eDsPfLCUpv3QmNMJPQcBbsM9aNdLgU9x5yPu3Pmf8KYTydi6/rfZwIvXUnVMJ0EcwTtqYMz49J8afXYJm5XYUR5WrIp673CUxmLUHorTuhEGYKUkkcqOiYFA8+dIaK6czZNh47B9RFv/vQBuY+tFW3+9BmK4ntuK0ChktxHzpDnMj5pArZU837nD+NakLD+5w/6PucN/ofY1K8+QyWF2/ZifmP2caj3O9o3O2yxTJssxIm9NaAh0YsmO2ktvo+7QKGS3GPwSpkiX/G+Edt41Hud5qyXbYYjpOtQKpba8WiEIn5nSZmuJRLcS86U00TP3OmjIdw4Tesiv0OoGHXdm1B6W2/nFDudwCJgQOzOLQ1ZjZWPeiM7YjkfFLGE3LQ6ndml4F+Z/bUh70rXuwq2BzgITw/SmPFY06wbnpmf/f/qefvmBdFf8d8Ft1x1uzO4VLci87UerLLCcjF0bgNn5OhAA/+jrOEWxiZFPcV2GGGxixXi/RayTugBfxvlJ+X46x0pqWF04YMnHSiRrqsPOkUz8VP4HuBSn4lXZCi0nP+SKqsdiFWWaY9gaDZc/7YdwggekiMFPebEyInPZCriWtS7Dmyivw5sqJ+z5G1iO84e2ZSY0aXg6/ATsN95leyCzXQIq2qPacclYEZvS1YVYGde3oaeZH3uX3oxGmcIU9UHmoYRa/nYEyyTGsuf9CFgxbi2XW+MQVMqNWLTjDFa+lgAto8Z6nsyf0Z15XJtFGl5ywVU8k0tqbkeEyskaLxTtWp/nP8borAr8YInQvBiNFq9ZcTco/jpBvtT86XXzA7D+1PcS10Qm+aPSc2u9ovGYnK+dysd+4vZxhvhHRHQu5yrX7PIW8OjTLjPkx/hAYIx6Ea9wNNiSxg/GYtQWLPvFJylJwN354ull1H5k81Ff+fC/Q8B+4XZUWXeMlUnB7lZzTsPDHPyqri/6Mk55Odt0ZmDSWgFgJxv1hOq++VD3pQrDXkQA0DnTkbrSqmFeI4rD/FrLth5kUzvqsCsINVzLxoKsWNC7lIvSjWSDggXW1hTQghDc1x2FiZdZ22qoySh/Fd9WAhE8soWsgu0WJ4s2flIvWhWHOxp7FZ12Y2Useh/Cmu+LeDzVzXyUW6KIA01mDMGCRTvOuK4yL1oVgzIYrlXDHGM2N2HGms9udMJZk9J4zv6j5Ua48pH4kZ6ZbimhdFGsjWrGHhVFWXczAL3Ma0QtxGGOvT1E4xqwKqhU7lDvcRtPaswtDwsqkUT9l/IjVMg7MMy9qJ6BIb6aEABdgZVVnaMVVF1dWU96UFKxbGg7CyJ6E+visueUmw8eFkxlRsa2eNZ8XiNoQ/xThLRP1sLUktjIEvgPtwZVy1Sj9bbdQ/EHNOXKTeM6nAbPZ2w46Uh/hkIy1OI5oTnanbvBBaFEwtcB473JjBXdvX4+575jmRJj7WRv2rlv9HCEDUKc6TgI1VlW3ithYjP7XAeYSTCpL9z5DxCSJ9eki4GRA1GGFFlIcYcmBaIc5zAsxofCK0Y1YLgvphxuo8wkkFRIatXFco0wkUPCScBOFaG33TB8nUApeRTSogV7EQCsq0gT8uQQ14kGFj9JlKVMrnbpKpBZ4TjpQ8hg8iqSXyJegyskkF9AzVQGXaQtAuQdexw0x1TPl6lMOXBMHoReFaT2PSocwdKZegy1hhpuBnVkCQ9QYTdB2rsBCFjetJ9QmmFgTPCVMZ+PVVmhvqcgk6jB2WlSBPs2gRB93nwc/xpBO1O1WZIFk/+02YXTQlD7rNiplVCBmsVR50nD7hWovtc8uDXhNO7CJ2edBhrNFGuk4QIP2w49ifZjIjv3hWHvSZ8EkK8XqhT9BdBJ8OtHJes9RDrAdwuo1gkJRJVNPn7hP0mUFSpo44a5+gwyTBp8mc+Zqf4ioPuLvOKhgkZdI41ton6DFLCBKzKNe0JelQqcMEfpCUNnc2+KxMXew0gjlrJy0Zt/75FAyV+swSAtrBykyQn7vmLnfJICkzTtoYe2emDzmNoS65q5c4n7v4y1Bp4ZcQcLMQmUyQ2Llr2VkKsDGqojUTurJGLBWwOE33tbnykaRxPnfNOfjE3LUeTdiQc2LqhGeWeydpxewsmV9CwGRLTjtMQbMDi8t06uqR807D52a7Fji/0FOufjIiGS1ccbW3A84yY2UyImfOxux8qYGfwAeX6dTF50NafZkJSlZ3+socHNpXb/2aVdFdFmBnWhS8XnIOPYZ+PnWYy+vOX80kcuf6sS4GI6c3XJ3EV5v9W7FPRp6d5QMQacVVJtNaupJq9gAc5h0/6MO9BrOqk0t2TuLFy1lwot068lf3dRSzs0A6B8eMV1L9Mhc7DX914tyLaBgBV5NNxsWpy96mPaRm/pNUh19Vdwy3k6J6zmHurR5n36v7ipYcJve4OhLqpKsM7mJnkVzNJ+eZe10cNL9YnebCPaB0frK7NGjjfTqJ4XaSdufLbK1c1auZ9jm3AFp+sav0vJrQlbgxCKzusvLdbEwiWwk/URdXrPrRQyAtvbJegBK1XKRNq0CZjpt8BHZGcYxhi1RYmLy8AsVZjsqqgklka6y038VBb9Lf3k8ZbHavp8fCtH0u5ALLvuqVu/Q91s63dymDC+Mm/QxZftfP+j/flanWa+gXc61VUNoyo/YXinusAOfjiTKtIOLCZHNXecvHzGZbqlOHTPCpmOypZmA1TSWbq5uI9GiEIgm44UnWaxtC2XXzq92t58m4MEpznSz/9+9+S7wf1d5f/qdXBwCciulpt4lgPIV1oqTobIqSAns1pXAnpghSI51dyzWSky1voaXfbLFdi+k9/XVTzoxoT1JbgZa3e2H0Og5VjNJQa/8teyOumu38R0PUDLus1zoCwBnL8TN/+DWEKUv9BX/vc2OO4QAciilZUphi5CyTghGxVmdi2vtppNFSRJn0JqjVuZg+0FI8MyNT6qO7HIVavnZMozTUAT68r/2UqYyf201iUaU5rNa1WyPG2SHpZzcQxnX1F//t80d05clIkW0pZByuAY5IEyojU9KEwGmL4xMYOCnySOAM1Ulw74l7pL99/JxcTDH0CaRMS9FoKUpmZHoyUnyCKYXNavuILsRkvfbwk1qtPbzCYsrUYZ52S1tpprV1Mt5rbbRX+GRkipfTpIRnzgN/XbgTUx2ANnOOR8/WuYMhL5XGfBrTCVSYQex+/REnXds+3BrXBTmRJmZuZVdmRMyvXCT0tDc4t+rLqPtjr1jESZy4uZ9F88k42rQ9LzL0UDihK+zy4fzsYw/PnCNnWASzY5FswEdspBEz/YUMLeeTKZMIontzC8qKtxfIQlCgH15/ZFE0FZNxqh6v762fkBloYQZgAxsIzkPFmfDwxam0AE1kHUdmCSaHEwS3+oW7HLbZRHZYN/RSbCEU14m9AcEt7ob/Gpl8ySbyBL7U/qmdt1QMdQTQT4bVowMEnSs/c7gJ98nMmbrCF+6KpBxxclL9EYv+WuJJf+ZH5CNTx/FS8i/NprrlVS1AvECZsKjEZ7JuohVH0IA1OTbmM8cLVM5jU1TiQ8ht4LyplxP0rqmSoA7gS19OaJvo0kywbN0ogzZZrrIQWDytqmJhtGPuLiVxV5J10CUik8gSi+CqPVaom/3mTa0yRkwIQZadnAfCVYoWhpdzuNP8WEuHnTOliuOkYYoiEzPrnO6wd56yjbm4hsuGIo+jh+sXJ3NBdIJdd0ozduTMy8TKPm6wdQVCh50zhUrhKw1SttPEmu5ZnCkRO6fTprAFypNMZM6nZXTKZuyb/OYarzkxOTPZNJmnYWcMTnC7yz878Zb99Qws6xW4sbK3TlpxzaY+gCW5QVu7z1okq0BhEllqFVydzQp1ix90m4Nxl4Qele3BcHmbGCLbgIcjBt9MWCUksa7MfPFkVEo0uxZX+hPT0qWJCVG3Moks9jrYBOeEusVjiNJMWwyRZBtjZFYJbVNWF5ohaQZytSh8Qy/2K5GYAono1lsvuyPHVm2efK/0a27yJI5cgnNvxRv7MNKdyZm0EM8e8obMZ28ARNugjZ2N/CFyw8DZtscgu5FP3mGj6sndiWNJNk+JR/fsU5I2Lmey2fu2Pts1kxhjoYU4h3UfiSlLj/Hve9fOsXh3Mss2hQ0JRj2RzNLEtIR64rI7cKypWmTR0TOJ2ZzJOe63My2/kkfsjIUVabg9Zoq6j3ZnvpbFx66goY8yoKKfecZC3hkUWxp1Es/A3KrNI9MKarKDE6uJpajxht7TaVgtLUUkhLAtZ7BKoj5J6jLqPd3JL/UO8zAH007PodhyzpjPVKmTaxivsg6QfX+ho9Q6YCI/BXtkhbqJ/xYznTGfhmdCiZRzG7pWfJKzfdMGII+1fljIo3zETBY0w5TwJXSub6GyeY6J+kbYznEmcZ47N9P6fuV8AO+pjsSnlcj992fifA5GqHhjkoXb62UTSFFKPLNhyoO0uhgLA0BJu3c2X8Y6CX9uRMac8TGRNVZfh4guhMKzlZI6N/I15zOWUuwZ/useYnzG0WznkY+t+zpvQymltXiGnB/AWQwxBkhkOmuGwtXOzMmz3JTH65BbNrYwlGNRzs58WiLI+VnI+wbubZT1w5ao/DbbHdEtGO284bRlbZdApgur9+8w1u3t/aAKxI5H7rZBE7kw+bmcTO4uRmlTbnfOIbNXzIagMcbcQdv8bNQS7+6P9yMx9f0+mxZP1sRGRstW5ZDjoD7wJRojondMmnR/+TBG5u87MvX9GIbMXslU7jMWS+mvvIty1e32CMhZYilD1zVPS2IDxua/bx1n/UB9NwvLQJ9paH2Vzpn6PpHmj8f3be/uV9wOZlvm7ZHZrSPHy/Z8NiuRB66PX8e45dt6qLV19vNqwfzl8W4d1zsfjfpBxtmSrhNrr7c6KcXTjxjIrTcQbY/RBB7vs2AzA2ZNrC7XTOGSR7jd3od9SXVvsyae6Ywy2xv/eeM/836t7kv6Mgu11q9Vwx33F1yqk6Q91S+7bG/852sagwE=) Figure : PHY timing – clock output and data output ![PHY timing – clock output and data output](data:image/png;base64,UklGRvwxAABXRUJQVlA4TO8xAAAvZUN5AFWL4rZtHGv/tdOvPiNCgds2yhiP7xO6GlLA5Us/7azmJsFAaycGqgtqCxieaNnNUKfigTFUgrTA2O2Rsax2BVzsz+sLsPew3/JgQIvT2xejNf4/29o2ZUKbEEYikUjkSCQSiUQiXzkO5CsfOXLkK5GPm6q9+vBbvbp7X1df9XKTyANxTNXK5C4clgSeDAjhzoEAOo1Ri0RakcIbBPgrCo55nE8hnN2bySIL3I4CuxOh/lWEQABXCFjUSo2UfhzyWNUSjX+i4AxLcnT4VUUIKNTyWHwXgdBRTCI4spkckLZtJLNb5/efoPBh4dFnP4KRSFI2Ao4a9E9CBORLZP9hQbZatzmy6yokLlKChPVw1F8r0va/cuX8l3CgoGBDwYaCDRs2bCgo2FDwQEHBhg0PbHhgw4YNGzZs2Kxrzvmf090a1TmnZ5wWMJk6QNFBWoKRVnCr+tS9fGBkwhJ1OKoLjbyBvILJat9FOGkDzkap69bf2RvINs056ibR4Rc6T6AOk5yzUQ5wFmAzsYl4mCNzmcVbpkY5wGxvQDV08C1rA2bGFuvSCi7rKm1gnHNCk5gvdGYXO4efs81UQsLO4hdOYM45Z69AF7WDkHO2RV1dxzmg7IucurQA55xtQVdpVuCwgLQAixtKua0pjKTPBZdygxtc47YkElkSiYycnxTZsiUSiUSyrtZlHO1Yl3YyBIARJCnWZR0sDBYWBguDhYWN88TGYDBrOauzWquxWus/JLaNHEnqngF6ZoMvTNjkdX1/njey8Ml/PvnPJ//55D+f/OeT//yQIT8JYb7Pb+BtaYe3H0D+Zt7C+DnIn+G3AsmS6UG4rqVPm03RfnfTCfnXQX/Cr+D8iilzKdpvbiJBdnoWfhX5LYL+0wzqrVfzgWWRc1ZS0d8cUC4Dz99C9Si0X8uQknzX+ZqFHodojVOt8TwLy1Arn3ebIiv9DlEXhv03Uj0Mz2G7z5RrJ9MC+p6rlyEP2z1mUa6Gj2tJC5Gnv3utfb9tdxbtfdyvLTU8JXuz40mj3FnKY3jGVmtioO+G3V/hclcpq1qepQbKTHo+u+0i53In0fd9qemBJ7lWz8NBPu4o523vNT0wfBo33yk72e4mT2VPEOxBXLw0ci93kkay1RQBedQAwoN83kc2paxME+xbACif+u0eol75vkwI4su6zYAC68IIbJtxwC4KfkCeuWoQ4SIf9xAZWnFfKhSJIlS2Fgy3VxSwqIgMI7djDYOhm6LdQXby5fIHXayIwfaU4H/g76U4vgjNVQvIL78S8tdTAwlCrncQ8llfLAQ2N6bImY9/3ByBLYw5jH0E9LgJMnxzIzUG8eehk8m4gSkO1UOLAbAL/esGzWWPdyIAfj3/vl0GG2WF7GscL0iWO8hcXi5osYGXYePiVwt+fvKOiQB8M2hvD+KHF2BU9owM/n0WhECE+RdQbude7G40Jvdn0qfoAPz1Atu0ilt7C1yXrDAHRSaPe8dL5291oADcUIshyBoA4PsydDR3JcA35F5LdEvtwd/foqjG3rwDQWPdciuJEPx86Wj5o/kUZ42zl1qr8UwOtPFTVZKQNpmcOnV0q+pMh6oSSLOL9y8Cqt44pnv/PFA1howxJZ9lyI1NdQT/QQjUkvjmXh/vNEqIqRUTJoQ+mWEzoLkHAayUd5DjOiaeCIXu1Ytp5UCUCwb7rzuwrRI/8/xCwPyr/l7bwtQloJfqCGq6RjZ8aDuT9u6gSvmkqk0Nggmgv2nGlMqTpM5bVb1NACfJJn9UjSCqPbwDzlqhA4VsfzGEIIjfQtHHsPQiO7wth8DcU06obCPsDgzKTk2MDSqg4SbHyKyZhnjshf27FxG5J/rMsrHlt5H1fblBTqfXGpUq20okM8Ob5eIj5qGqY/EvQ+o4pWZbAhylObKqEk6AR+8fpk08Ac/DkEDBS4LvbwxheDqJY+qFxrG4SaG5GjHhRfj4OoYgdwFF3dMzcOT+gKMwrLRJ0VP0IP5bk2LPibL85uDxj1tlglKWzWYWVgm+QfIWg3IJ657G4mzOgbef1RDGiLK+bELCkoxaj3es2scEfyEENJL9zr6JMHXl5UJAn8UWrd+vNw9TKiQumtE1Wl7rs89wcPyYkOY0jKlF6J5GIL0s5LGERdm5l/vFxZcPqiO8iKptbhToQhBqAADeb6ME7ZV1cTJ+4/kyba2dRhTrU1irlJU1wO1f5D5pYFkNoHwzi2pLSS8HuYR2f/4nKXeLsr+AgCpKNqFW9/YcDvEHvtipudFHq8QF01nshtzOqEiOWnVRGKcUnnRg23R0RJ/0oFHOv1xeURBXK5JLJ+caGhs53y0uvoRIFIgRa+mnEWWlTYqfDVPh31cRO3JAELJF+WhB/DPlIIQs5euLE6O+nbK9b0zuT2IqQ8Ka7F2gbXRL/x3mEGTIsjZlH19PxVHNTZJxm2h/Umo5yez9d82A1fadouzcB15sQZvYGuE57iF8CyX71fBC7jU0lFlf551CyDNN3Dl8+EMhfm/aTJb7xExuaYKZ3ELkIuUukQffIEnQyEfVCe3Jd4mDXNIED7KFApDefofo5FqTBGWoyzQC9OnuAFgzcTIAeHag1J37HQBrJk4GAM/WkADrm3Z3EPKZJujko2osobGQj3sAUFSmCU4ymwmvq+7O0Mmjpgl27jVcnmR2QHyfnSZo5Bkw/Ra9L5ShqEwTPMjFSJDRu0ImnykBayddyMgtelc4yJ4SsJX6QbPdoveEjVxrmuBB9qCp6y16RxBSkgK2eNgIed0RZnJLCpjjYiZQ585jwmypTRMc5BY49cfk/eBJ5rSApQYLnSfZxhLXeEkLmOPBs5DnWCIbTxM8yC146s55LFGNtzRBIdcaPifZ7wQz95oYMMYjQCavkcQ0fiYKHmQPGWNFPpKoxlMDxq5wgECHnYwjqvE0QSafUeAi8zhiGk8OgHeIu26EaxfjiGk8UbBzrgChnvQeMJMlTdDIZyR4kH0UMe0KTxOcZAsdY0dG/HmSOVEwc6+RYCOP+LOSJU3QyRMgYNPwjkDnmqcJnmQGCLldMPYIKYmClSzRoJHP2HOQW4JAvwiLBpVcI08ZMi5BoPlWEeEgS9zJ5JUoeJBbRLjIHHceZE8UkHMFCXdwV9zZOdcUgdrQARG0eUQc9U1MFJzkEg80vznmPMkGooSif987Zu41KshNEG/UNxFEAUX/vnd08gESsuDhAWFnGojyjf6tMX65lKQNpc6KCkqdHm+UNxFDSUX//vpzt/LvUSUueRVFGTTkVCFxrGSJDCfZ481BbhhKKvr3D3ruVv7dQuU8QQgeNlXaUO6kExkyKdFGeRMhFFT07+lW/p14/w90aSOTV2zYboJoM7yJcSHCS/92ufJvWCnvSC9baTuMbjPHkG1U/7x5yVSulwJpY/ALUcIWRJvhTYwM8V36t8uVf/OZbjkZTkUnxf07AdRvGHUkJY6de0UJXBBrhjcxMsR36d9OV/7NwcvAQoAnLMkrdUlD+RUldH8v0nTyxFBS0b9drvw7+AaMGuAlwDQkYzmQPDJM2IIj0lzkV2AoqejfY1f+jaNtYW69Wvoo8aGuZKRZyYKhpKJ/j175N8wYY94XAsljrRHiSS5Rpgx1P4aSiv7tcuXfp+E0cDIwCYel3EhLHxdM6APqryiTSQFRcMm/3Y3CvOVppI8eIwr5a4gyD7KjKN02mHvkl4HksdcYUXdyUsKfkZck5rWdcWIlJcIs5JkuyHHiC/mIME+yvTpw/999oar6kAAWTNWLk6TON1U/e5u6SRIQeVXv/I69WYYzYdp4qyrt2mhMmDp/somTpDmiqoaV5vu/VRsjtBmjlA8JoF1VjUnT7E2GLMG8GbIn9bXwcI3Tw7XFeOrKHKtJr2mDQh7R5ae4twkAs7lSV3IyYnCX2NkaHOqWqPEkl4mIwY31ZnNwqJOxREAwJYGvqkm5OdTJFo+xREAwDVG4r55Sc6hLaiIWdW9t5E5d3QZawzWpizD7WCIgmJag11St1Bzq9JVELOqG/qXzn74J16QuvnSOJQaCqQh+UQmKzaFO9OOjxKCjnScenkldjCWjiYEAII4SxeZQJ0phSQY5JZV1jqrITep+8d/80k+on9z5vbZFf1J9+3Wy0rVmNDEQAMRRotgc6kT579spjDTH1MhN6v7fn/7nf+dvfS579WGd6z9ouxK2JnLUlSx2oihRbA51IQxHAnBjWnRpPrKnLFYaJnXqHcPVq1CWH1lYJfgGCVszljhMYLETRYlic6gLQfDz52SlrLDXfMpipWBS9z/+xi/96EfNaRhTi9A9jSRsTfRYyKedKEoUm0NdKPOs0ebkpgtQbItFblL3T//v//qb9b8i90nDlAvnm7m7lHStiR6VXAOB9Eui1BzqQgJTkIeexcI1qTPyH/7///x68vvnSw+u+6/513uElLljxI7jJggCkvTpPxBSbg51IS3qEu+fvkYpmNT9vd/3o1/+A5R9vlYcddlkfJ/9SQl7V+04tghw3QTBEMIS7BSqSd3v/IO/PYa9dHkcsbhLTjQ5yf7C464NntxiR905B4MfkkTBzrlGjwe5hYIXkkRBJ8/4IWQOBS8kiYKLzPGjk49IcpI9UXCQJX7UmXsoeCFJFJBrjSAn2QPBB0miYCGfMSSTVyD4IEkUXGSLIYVco8hJ9kTBSpaxRCR7wsAHSZqgkGuNIhfZ3KDfEaYRB/ODYZC8E0FgCANPZA02lmk6eSYKGnkFgweG4wb9jjDtAnr3cnPTxDy7hujOjXGbvPwnptS6vDEC4yrTCJkTBU9yiSN15+zATIzjyAEnXih23aOBynqlONfgcTUarnZbvUzzILdEwUxWB8TjpFOA+8Ek3m8uvXow54BJANOQyBpQptk51zTBRj5iSSZlCqYgN/o41Lo5ktqfjpBV65qSETO9JFGQSXFBPE46ASruB6NOXsrfbzgs4rFcw9VKCutlmusmSRQ8yM0FETmplXJdDn4sx6HF5kjCKnlpT/I4Czcc1HI1TzjIkijYOddoImS2UVZy/MOU5BrMyJO3y6VFTVXs9B4hG/6xzwuU1YOmCRbyHMsZETr5MKHtu4OXvZhVSnXT3j/g7gQAHV25SPbCEXiHZR9o5DNR8CTbWI6YfCJn7ia0vY8Gem0c9YQYtboG6QCcSSDnzBT+LozZA57kkihYyRJRnmQzgOxjRqGIG75E1KdnJmuaoJOfa0Rp5Glg9D6KIRjJt+GvAKyVVp+ajXwkCoQ8Y0rduRsY/bt/jwI+Z+abFfh7KNU+NZmURMFJdhfEKJs4hL37lqjpeZBbomDmXqNKI58qfobp+YZzTRNs5COu1J2z/0x81kRBJsUNkYnGiy83iQte7RI3RCYaL1ayuODVLnFDZKIG1uKbQ6Ey8bAuF7zWJdHlJJvKPmw+7pxWkigQUqJLI0+Vrmye7efAtMO6EgUPcosudeeumYm6+bXXaVnJmijYOdf4curDiau2ebVPSyGPRMFCnhGmkw/VTLTNE/9X2SemkVei4CJbhKkzuSlmom3evANn1ZhUkihYyRJjhBSDmfTj8CR+POvkzGRNExRyrTFmI2cvzWRyNvKRKMjkFWXqg1wiRCYlUXCSPc408hEhHmRPFOyca5ypMxkhds41TdDIM9ZcMWIhT6dE0wHAT7LFmhIjnmRzSjQdAPwb7jXW1DNCzGRxGomiA4Bn8tt4s/nNhGd1ijIKAP51H1j/tyAA+PA1k+gCwH/xd/wD/CMF/gdE47XxVFWC2hx23dykOUxV6wSqeoSQ2S3KKAD43wXW/y0IAP79ZFg1ILgA8L//u/94lP8jLY0JUzdJNoWiqn+s5OYWZRQAHFj/NwgCgH9/M2BYALhr/8hARc5Em1J+qDpD2hDT8RZxn2YACELV7MOb4Q+dXKtblFEAcGD93yAIAP6HB/QFgJvX/13/0u/9b3/pt32v+amzv/zTd/5ERAYhHrXG++Fab8wxefhJfnFHeF9srx5CIMJLG9PTqgwCgCPr/4apf/l/G9AXAG5e//ewstubGj/T+u//5J/Fog1+J5fowxwPtp1/bnNH6C+2F9ExVDS4Va1DBLyACcogADiy/m/+iyYNaAsAt63/+8agxrAU8Gg0wZ81/swlGpzk5TBd9q/D0T+vqsu5IRy6MvbceUlQo0q7MggAbl//Nzb7iwb0BYCb1//984/C76mDClFgIfdyB+AVC7bhXfQAUCdT6N6eOdzeqFgqlEEAcGj938AHANcxLAA8YpSZlHoP2LdIcAzljA+A91tRqtxz56Mt4oVVTqMMAoBD6/8GQQDw78VwIsMCwL+28eIkj3oHuMgjDiyDz+wHLeigGlDtUQ1TvCMrhADg2Pq/BQHAf26jrP/7B+m/pC4A/GdzpvV///U//At//A//wh8fVIgBeah97gGDJ/AVMUBNvh9MQ9IuBetTKTsq60orAHjU/suRXO8B9SuGhyLAc6jK/UCtM8zRPur9liqBeUF02PpOPut9oD7II3yWoYjxg7nt1immB+/1ry/siyKno07ClEuH8xbVSbxCp+yk1On5Q3+bEATMv4pTKaXFCN/oU/SocFrLNPi5dLhaKydErcCYA+cYqnHHjNYrSjTyUe8CPA1+Lh2uVpKTUoXce9CcQxeda0Z+s/29o8JeHlRutT0RUy4dzmvqOWwBIyR7dQ34zfavSbZrp3JXjKmYcOlwnlPXYQsWUR1lLyKvRcoiD2WUxlfUKelL8WjpcMviDWXYcqCcytXoawx6H65SpySrN6B3v3Q4PJWnB5g2PkuAbEN6c/WQqG9apdQ6JVm79vFj6XAAO3lOjqUum1twKG5/ru5BS8qFj/p2dDi72lZrnZSsf5j9WDocQB82b6h5sLQ1l4DYrnkoUXqdjEw7XBcS7bVJMe/ulw43bvOGuh0cwvG8GEQ4V1L1jicj21u/yjpsr3+M+wRLhxu5eUOty8HQwrnVOhGGHdle/Zh2d0uHc7f5Q62bHOGwP6TUOhn6jm2vfH41ht/dLB3O8TY5dtESBtvEb662o9vr/ofHwTt8eUoIzWpnrfD2mocvSvQd35IjlTXOP8a+Da97PkeKmpw5+M30yznFXbM3Bj6v029+NjPcn4fr+brn5KN4sHnZZH53XlZPvu4pZ6nq5uNe7zEZ3s5Bp1cy443Rw/0uU5UN/m8VXsmMN8fNI9RhuXcadQP3VzOjt8WrVO693mu0DZrunQSo5XF0jziOXu8BHs1rU/bXM4GlVtapGSDX1E6w6f7kP5/855P/fPKfT/7zQ3I4WAzx3JgM/0pY0TlvOIxfDLGgyhymgqDonDebiIMllOFV5vh0CovOecviXgevECk6580KvMockaJzIOXfhsCqzBErOgf7dL4JgVWZI1Z0zlsOfec1Ar7KHNGic8zr/X1joe8cg8pVmSNadM7/saz39w0F/f+PwRFUmUOfaEqBF52jKGf61yjeTtD/yR93wbq9maDuoxZDHHF/K0H5feRiiCPubySYpJMJ30Aw7NNubyA/vFiY7Q+b8Vb28A8VvWwfv81O9DpdV7Yp9x8eGj9ZyVq1bbL9bYRaqz6vzR0v1Hltr+bNJS/UOdqJI3zyn0+vUvpXNMHDDbsq17ef6Uk4HldP5nRc9psYgsK7KYh8+Uy/wiwlhbNpv7XcrCHLu/ajmZ/x8Eq2q780O9vSMl6lA3X6lwc9DN8dz5aU6IqsI9XYNiiUe7Eq2tfBHK+tjghlyUNSNsAbVuzVqk5pimmelnR3VfaOBRVjjf78jt6G/dySET+LvKuGaKffFModUHTZyf2qo8NismOr1b5LB4qRBy0T9Tb1t9Ygvxn4cU3uNR/H5+/mIXz3+TCFddeKjCvpYNsX1D7fpZVqJw+GuFUHoTTMjmtpYDrzbtwW5ZGtYDkhH5vt4b4PNXp2d0G5qYkqdnU+BnUWmzrLc1cyOeFg2XuFf++12mmaU+lkG5K0wQlCtBm2kZV6aVpxo2AubPZcnYayKOmCk2VV5hqS1dMPfewO0PfbXp2FCbbTUN6MqZM1jPtRquuwoV70hlWufR221MMG7BaFAMqs7C43yQXdNnBrWpEA71u1kukkH+BEQK1MDdrKsG2JhybyAX7886AQwsP13YTKYC4OrT6Te+noXtXdymLbnWdIQdTBt7UkHfrwGcdQrBJBhurEsRXBdTRq9Q/yW1jRRTF6K9vuaMeLr4arA23PlEMZ6iv8sWLEaE3N+aUX4BKOSnHZyacssPpbtbOSR3UfzD46rA7mQy8Jh0V5DLc9hMckVdYi0mCrBx+aW8GrYjsXOZc67bY5U0eGFCYZdJspIywSYSH3CaypjLi+kwU8NNxxttNJmsc3T1PuuFPnIK9kw4fIMsK7hJjJPE1dJdmd1S9P8nDkONNscVM+p6PqLEDKh4ItxWA44tUbQp7s6quJdFd1VREZrrwwe9uqFcWrrUOY+KHiTJ0neSUa+oij5AKgHJdJjQi0WcDgv5CnG8eZRSkHpgy6E4Gq8wH50HtJM2QZcewVIZOnZ0bULUarV+ozuVVEHYCLfNTJKaMaXrHDywTtNQyoESOw7UXZRTqAei6HObRJ9htdK6d4uoe/gmerDT0zhyOW8ZO+aQG5ZBNpI67fIAazm9KIMH3shz7UXRcpUJUGsA/ZMGkwNO7CL8HELxT+hFBfhtGBAv5ABx+FhYNwDQHNg48GoE5GoBqe59fTp+ihSVy0ZzF5RDGaDb98g1CPEx76+INWqStWhFR0CEo2eHuoGXpPTjK/TCKHfYLtKSks2lvPpWCmKcZA8Sg7gO4bXab/sxECXlrOOzfKJAVtclT1gXB3xNMCHwpg7N+RDfBzIfZSfQgdPXT7Qes/eZmwyg9z5tMOAGOMOZqS6jkRUXFr2JZORy3vDIMnugGeG3WAuTOtAs1CLfKG8rnG6zsMw/COyU6ywbYFVN7Dk+3VHMaz+hGcHgbf+EWCFht4GTau1BtM2ak10pgWz0NRBMurV4ujbZR7Pc7bc3mT8qLG/nsWhkAE5IRrAGgbNadxLQho7W0BWUOpv3DfDWWZDvXaE08kUNHOZLFcmy0VY5uUscmqFSz7Bl/9ZfKyDhSAG2qx6WtAC5X357IYgznHmiPJQbea4ZrdOwahFttHdmFZ2cvzcMyjsjM5yRdsSmJgWlw4NnZEWKnfM8Bn690KIHOtEx8KalvdroP1yQJpbJD7LB7UgQ7lRcIYU/JZhtz4CFloQQdsdhpcygY8RNB4epyt6OBxupax989C/CgIow8D1zJ4s1dVI5f6tZrPNFYbUNVgEjBSKXKUqlJQVSfPEFkwVUUwVTm7yNltdJodZpMIps0imKrUtOEEqavVP1WrQ6W8R60bqICOl0+C0IywdeJjYtIukAWe5rRAFrdRLyagOY0rHA8r+BnQiJGqbviKCqrqQZoFowmmKuk0db5mSEEzZNbyZZI0h6ZqUMC0tW45I3bX5QD8u1HHzhtP8C9gtLQdISu2uBSwb9WUYeiZ3GvjRlUP00yOUUo2uzYq5+QZItIhbTYRLJF0nzrWWidT9SvApNcPNEMWLV8myZDAVDVS/SdhSbbUV2ofUw3QYMp+1z4MZ1Bk8Qd6aXLPHhYpTpv6Jx91X7W+91HXXcWs1859XEtr8ewzu4l8OMuopl2GDibzogjqN1Z/dpejMHbOightrfHDmc+hVrsfKAPcPrtu2sfZ6ycvZjM+yTaqgT/7VjNkgU+MPXkvLxGgakFynGFYwS3W6COsSo47jbSbafRzwN5qSinQnZqgeEEX6XBVBdjSojVdwp2Jq28sI0bELNAgyvwiIfF+siP83npPVk8IMWphtKSAY2gCj/uPIsZ3gYC2W54Ge6lBlJU22fqe9ww83irE6h44TXiBAviFM/cxveidvlHwTkTJUJIfGi+XoE3MeBcqiM8CNLf1nNGa/Bx30oHBnE+yjbg8fdrxw4l2llEzWZLKjBvHcQUvosuIGsw6W6DfoiNKm9mKvzmyQerILZpUcBz3hCKS8SJFbV+0RfHSptOKxzkCqbORazKhkHQfZ/U7+qGoZI3Cpc3Tjrc5gs5JWsmSSug33MZV/I7KuyA9YiPiu0LI0VRCu+E2ruH1i9+BjoKd+4j4qRBw9JFIKHLDcXw4kc9tiF3ekft7nOSCx5syXinoaBqhD7g0vkyKir8d4gPYJDL81VUh2OiTzGmEBgO7aw9yG/A5Cn7zBDnD8YcVr3ME7RA/0wgygFYYGORcSfrd7Yyl+CC/5FrxVg9W/6LFmToz9yTCBrOg10SNfE4FmjT0xwdmxt8uCCtZVPyLdmfqnGQSYYFpIhXiSS4DPk9uKfIurUIe4XdbhRzYtap4GHWmTkskNAWHl0Qz9+pRk7lIhl9WagVO+g3aBOQDaD1eXUVLkgC04htOz/rwiYZFP24gaS6fyY41AXUAf5xoZ+ocSYQustxwOuBEFHy+7LrFIQ+2f0teUMU6V0/Z4JNCOSLpAbiH94bbsyp4dNmFGRDkJ7YLur9rJ09fqS6HnfQkwmBIN+C7boyptKo/UXyUMmBWP0YSe5HNQMgnTSBsIm3A3fWQodLy+LIrixTkjgebyHdkg85qIJyTLna+vZFCJANwFTKm0vL4skskQ8OEF3mXmwA6q4GAT/olQYBZMQZ81sNQaflkQ4i9q4UL0AoKCBp5mfDxpM7UKQmEobIacDisa61eoZox4LuqfqK9FFD8UqBn3mM+XM4HuJE+JB8KDiVPHZ8E6L2zPoDS5mkXrGQdgc+30FsgluQh6QouJTo+CTDX9SYACoFmFQyuq4mgBBBX+pAouJR455qJNLu168WLvaehWAWZFJ+pbcTgLogjfUgUXEq8Qjdjq+eq+4lAxbWS1lH43UxIg7sQmDwkKg4lOt7aUBOxlS8GLbRWFuudjr1mczhRmylDoNdUKg4lOn7ZEHa1JdLsRYAisA2YNhK0gKlD8CFSVBxKDHglsNm6qYCx1ayqwCYxeopBC5g6BFmkqjiUeEgTsfmtJg/WVgJYBJrf6jnLmJ46BCaOOW0aQBcVLDHgnw2Zak5zCWPV4anNbTOYupWAbocA0dOGRMOdxBPGVNgizaiCuQCwOKe622omMAGEJA3JpuFsTlsx4JkNYZbeRMylja2hRWuCsRHUEEqIR9LoC68QZdScNgOepd7stUI6iDRrp4HWnWAjrCGUdmbuSUOi4+Y6iDxN+GZDRhfZXp9aBlM+yM3U0FrNhCawc5JbasBsPzpOqg4hswlPbUgkWzxYk2JY2g+YIJZp8GFnyJDUgNkX1IH7p+wDqbzCYsaY2WQRoGbt5NPU0AoQ0k1H7AwORsKQFB1nd4A04ZsNmVxAqCrPIkhX4UU2Mx6/M7A6VurONV0MUW5Vx0VfeCEfRryzIYuLbLJ1oLQ5SFNDq5XABirbOciSLoYoG3DxkW7k5StdT2gTgfJlM9esF7kYGlqtBDZQ2YpSp6eLvnADjvrCFyPe2RDmIos0ZFAKeekNrSFQx/SH21lSxEBlg19owNEQ5eoXtpQaqiakmGkiiL+cSbET2EBlOyVZDFTOItWAg2bzSq7+0kTsLrKuB1DazNz1hlYb4Qms1JV8/QO7Wybc9IU/zfhnQ1YXWa9TgZpV6XZWbclGCALbe2NDLW9SRV+4CUd94X5ibFcRaUD5o9ZX9vQrfmEYlBGCDxuq75wq+sJNuOkL38z4Z0OYi5xFkBuSkE/ldRdAUAOVRbKdNNEfrlqNCUd94f5Ss2TVRUamkA86AdelSnu9nZD7w9Vk71xTRV+4CSd94YcFD20IcJFVewdKm4NUnlcCoY95opUk0R+u+oVG3PSFe4gtsU0EyZvF0BdumWmzc652wusPt6B1ZKaJvnAjbvrCLXhoQ5iLLNKA0qaRspEnQHj94VbSRH+44hcaGTv8HXINPbQhrLZqIkDNupGPoR0RILz+cCuJoj+8iVQj45+5c61e00QwF3mRdyAfhqc9yQ4QVn+47eJVS/bMPUk804yT+dl+8yGCucjbsEyDxcqD/I6sEMHN07aTIuZpD36hmdFVxuAa+k2Xd8xFLthiKK7BmI9wKGPmadtJEfO0F6unNfryZ3AN/QKrLDErwhb2sij/fxZGaPO0m52FfKYGBr8QA5asZPUK1Iw7lj3I4gHLQEMIsD8ceBvINTWQJVczY7ulKnn4BWrGG1jVZ3CRqxtEgNMB7BxkgpgIYGFMG4Pug/nOYq0sTfnQAE7ym4oQYn+4necrpj+c0QzNdzb0smuBWUOiyLtg4d2kDkkZwslAQjQ78YvvlOGHi4f1qmoPiSrvo4PC8Ae+/Ln0Q/f+x4Crl9VjyIaQcPlD5lD2aLZn3+k3CtpPt2FvVQ4qIs3dKO+da9J5Sg/hKeDLOjbmpA+cYT2lOxrlnSQmkDYRjDLmlj4hnGipjsZP5oE1Rid6/d8MwckoWxdTAXxHMWOsDMoi0CtJgCAnA9h5kv01j5NRtqNHWDzJxW82mxkbR8AgGbGSF7mENLKruRvlvZIpYoq2GRdTtMVvujIXYIN6nDugDnk08rISZGc4AHmkjhk34z/M5COEeW0dquiBjFhusiEbIjDjZsNGKaef2aOz39ykSq0O3TvLlhHabbNmzsHwMebmWVYSwBdhuGibG3/jwwdZfMRSpkCtmCJIq8eD3JRv3A2FLOJslLeaGSli+ijGx4i7+jQLHmaC0uDj4p7G6vOFbP4CpN1dP+fMOU3cnt/C6NkAAdyhTmnwAQogICOGc6iXXvG5Q92WJlZBkUXicrdVJMWKuasd9EgrK3nYCLEv3E4jrwRy53AXs7R9RqSpTiGWMyLZ2mMIZQNDnKFtwTirLT30h28YTQTjJLu/aGfPInabRwzsIPXTWQiwLxzgINPHNzo58M0ymX1Fv+RTbtBv7bDHvMI1qO8A3UbcOWuxYcqRFNEfjrGNuROkp2jn005ntXmrKWl/TWvisBDgXSBt6H3haUJgxkV/+OovWUSvsKw2D2SEkBlem0FoK8AqNpLDXSBtLilmrHnMHfp9xGK+tnKlidiKIb3H2aCAmeD6wqXa0PrCE4WgY7Qx/eE+oruihhRbbd4ssNwDX8hmJry+cCup4O788GfUiJv+cP8wWa/BjC02b8kI/TIQXf9VeH3hVlJBXzjsbxlx0x/uIYaq05Bii82bqixsyZurmfD6wq0ofeFJZJVlbvrDfUWkmTxAIFcM/eHW7rmDNBPe/GwraaIv3OQBhr5iQEPNCaVYpCGGvpLwGlOD6wsHWMk0svpNN/3hYsK3QsbWYK93JyCakQe8XuLgJHaSwfxsuC7QcfOhJh8mfHOYjYZubPsBMmIhn/Dav4OT2FH7whOGwICb/vDZT0SyOcVYP7RIQ2bXrdyNhDZEudjR52cnjf5wzTiczNPefAMZUiLZlHbEng6yWK5PfUck4+rYURYZkjIEJhwtAcsbrN2ClurJUI8jxdDOGf//YkJblDRAqhiibDAhjD5moLInAEWJJcWGpAPFUCdP/H9lCm2IMsRZa8oQmHA0UNlHsoitfjK0bFgzAhgIPHM3EZoEIqcJDDaEGauMGais41c9DqW4idiLIX0gsEVgICjJu1SILTlg8wANuBqo7B9dZLGmWKvF7cWQdjNKm8CA3xLAwYCYa00bAgOOBio/dfxqX7Wm2N5VqOmhfWGSTWAgaElNHZJaswjGNuaLnfyjidhTrHU424shbX6mTWDAb8n4ht/EIBnxUR2Mw6FAwyuJPcWAzauKaPMzrQIdvyXjOzETgwR2u1QcCjS8kgAptl9zaZWqIrELdIKWVFWSOgQqDgUaXlXiQIqREZyDJlm56LILdIKWVFWSOgQq7gSzb2QRJMXQ8OAi8lAuuuwCnZB76WpVJelDQNLVxZBySabikwRJMXbN1eTHykWXXbBohDV4EmJLGyg+4YCrGkRpXlTx2B1sIhtkQouQ3wG5Q14aIQ2ebBi1pg8BxjJmCKWKTxLE4D+giXXlhGaOFXLVCGZOW4eyZEkg1Cai42xum1/Iu0ApzphlPbCZYytZVIKWPFMIi8iGfTrzmJuOKPjsDmYBV6n0HdnBLg1PcFe6YeqsCglEoIHObUO6xhR8bqX/kHfIhDZybqDn7Cnd2a1Gaq2FKYQq0jA2+ONNHgo+u4PbjY4VKw8BPWc/AAs3Z1eJWSGFCG7grhp4BTbgsztY5F0KJvkiG+g5+4m8C/wmIUlPI3QFh80OT7JNhrt6GmTnjzEtM3kpBDysq+5phE3H4eCuc8AjdxCNYMkdTAs7qUIwZ8VyJI1Qs4azwV075wGf3cFleApWdYO1+kFuPpKdnjWVsKi4PekNn93BLFB0JgtYqwspAx6e1Z06cyphg1lGnPTpCwsax3rDN/KhGxei0UA48wCwdKcR6sCINhHwCuyGx+5gF1lEPpCaEm4IWkkPaSPiGzaiNJGg99O5nA9ww2N3sIkMJwVMeIOrtksllHjGCpctkdBhPtCoKPjiDqKWpaTYPhoZt7quEkp8geJrTSSUG25HN3lDw+MdaI/JpIxQdVYIOS6phHqjjPHM0Cswv+P2vgXtfj4jo0HHUwodrEtGRf2OVyUKxCv8Yv9YnMdTCs191OdX91qVKPKtMuNeHGpX+EXKCwTtNQyoESOw7UXZRTqAei6HOX/b7UFSPN3DXyHzSHH7Yi/YxsQBCzvIbVR5I76xue4KLy8R/oRQX4bR8dEf6PApCwfhGgL++WgA6uTyGrlnueF0chv9cAdRyzKoZXYHx12TlYEwJtt0qF31UV8ikcM+4Vkp/l5iPZeCmc8ZWG8H0H0j5KH/s4qA7HZIvBfIuxTUhIAaS0gZaXqeMXQSuvNfTzK/SFjlhznzaecYY8zRlFTPeZO3YFv6iuX2wiF4YuY3OsDcmVYM9RCcDFlENvzSCL6A9MAd/IBtHrj6mslt/L2r6NnsbGcZVXbu9UWCFht4GTau1Btuup80puWZS+y+Woi20Q6//FRSfrUr/xYRkBOuAaCy3u9ACMkfvKx6FeTxtim4ukHWY6pljA+8mQ/l4RKXzab9lnyjkZncQVt5g7EF2UmXyefLBOj4JzfUYtPXgJa2z2UxBnOONUdSDHLZX7mwTl9+i/9d4pMLNiUhXiCTVnIv9GMzzinetzzNKKsYteR+8X2eYjmQMWRUV93U5gSnBzYhk2ZicgdtVRzG5c+zXXfS9RcKY0zJN2znxkfIQsvONzsNLmUDcXpOrMPO1rrSZyF+FITRh2ttMCefIwleqwuamzjJug6vh/yfou1MujagUjFTlRylqmyYNuTkaZaOKSUZ02a36SYFSsduyNnpM0QwpT5AbXhQexfi+nELAbVuoAI6Xj4Jwqc5jUviN/TFsMUucxis/BAc2qURAen/rPgUFjScCdMmYqpynKryAarqQZoLpo10TNXTmhNg6rKWsx5kSAYzRDBVmTUmSXNoqoYGeB621i1nxO66HIB/tw9ufU+MlrYjZCPA7dzIk3CNA6oWHFmpQynNKqhNzFTV2DClKIJpQ06e5g9QGylmVaVXLUMs2kjGmL15M6SD2gim6mx4EyZJc7iq1iBIWJJR6/lKLf/kSYMpu+BMdBdf/YEePoOGvIy9nQ0SF+WIP5BalIdlUEnL2NVqh++VtahNfb4trCOLbGgSgSuzQn4HXDR2KBuY/Tgzel1csP6Ob8nL9L69NIL6jdWf3XUh7JwVEW7FD2c+5yL3g/A59hPoU3RIdHLM31Vc2eX0o68/jXyhdZw5+2CrV0LLtC0bTlI46KG0HyKTuDFmL/hAz7xgTb87WV4uQNWC5DjDeAGjPzPCqvQLBmA38w4DB0xxIKB15M0337xkUWCekPz/g21uxXMVea+fIznzOcYu7fF99mxXvlA7C/APPMQy6eLdGn78AOpUdd4ocgA4/DgUeXd4VL4s8QVD4v1kR/ihsNfGUU8I2ff5UwAwFXkgXFvqazhU3rc8Df4yg8p6PQdBQMsohdbmCCjUIeIKgBZDXE1JGaMoUfijDSk63w4eHgFNFsgj3gYN7Sy3Q2DHlVyMvGiCNjHjXRixtK8nv8s25ES20ObX4B95iHw7eH6s9UP94k9M8cVOPXzoq9ucHk0+RFKZcVNr7eMOkKLrZMO7+pgjoMv3IHdYRzsbuW/uwdpz0MLEzuAZJxhMgyXB2q1BF5CT+YYljzraD7fjBeeEnfqceLjZmOJtg49zTTDooxfxw4Yo6sQ3xMsKd07i9g2/2eASotspO9kmf83mTp2ZbCmGER9vzexzQdhIbhNdcznzButJPhqu/WaltqkfauhrGlYaXeRR0wxGsZtmjloV3/DwxYYWcNRyJ7+5RvRrtGKlPlx20aNJL1jJ9i4FyhD2RIMm7iOqLKjSncnLDxva0Nr7IJ9wvV6ayIedMk+5rJauJNBVjpR1yO+Ewybv8EsGhRBFF47trHNmxiWDFetFzmqK4RR8GDHUbTLh3+qoOgvmQK815VCXUQ+1gih6jbsEg43FySWXwVQXNcUjNhOmO6HkyfYPWB1s33vaoWT7Cc0KQYoe5Focth6iZvyBnnEnL01ZUNgH0zNh2p4TSRu6t4J9s+5SEw0jKhOLQlBxsA6b070gO+q9ruShq/suC26Tm4b5dnVHcc2iWLErdbZVqaZTD7WP21oBFO37beuOvMGMTWcpDbwS6/NQahhVyx1rrLmFpWiztYy/7pfTX7Y8ZLUrdcq1k3uu6YfatQoFtKW8GYoD87Y3J96gojaQGHTPu6VqXmQIbVn6Zgl9sED5sM2JXObhl+fi6pGehyR1N+r0fO4k515TELWrNRNcCX4Uu6Jl8N2OZbQVNazQKB+CXewtBwf/16Y2Gt5vQQaMulyf6WX4c1TDVWrCAfDRpPUN8So1hWyKlqcyZVuWMRVVU0sMSBu7yfflOQ/JeBZrmhf8AdF414PIl8/f0NMwP7daUxG1LDKqylLNyaLOc/fPihawlNiGyGIPSqRZjf85Icfx+bv18+fDFm56qMNfUg/WX/Jgy3BQsCgi385e8WjO8y0g80pB2B/oyzjXENDly7fOK6qhnrqs4Xxc11JqTdZE5uP8yX+iMOqbGLWmceptT6W8iYU3sr3WT/7zyX/iCAAA) Table : PHY timing parameters (1.8 V systems) | Name | Description | Min | Max | Unit | | --- | --- | :---: | :---: | :---: | | f\_Clock\_small\_1V8 | Frequency of clock signal in small systems | – | 12.288 | kHz | | t\_High\_Clock\_small\_1V8 | Duration of high half-period on clock output signal in small systems | 35.3 | – | ns | | t\_Low\_Clock\_small\_1V8 | Duration of low half-period on clock output signal in small systems | 35.3 | – | ns | | t\_DZ\_Data\_1V8 | Time to disable data output signal after positive or negative edge on clock input signal | – | 4 | ns | | t\_ZD\_Data\_1V8 | Time to enable data output signal after positive or negative edge on clock input signal | 7.9 | – | ns | | t\_OV\_Data\_small\_1V8 | Time to valid data output signal after positive or negative edge on clock input signal in small systems | – | 27.6 | % | | t\_OH\_Data\_1V8 | Time for data output signal to remain enabled and valid after first becoming valid | 6.7 | – | ns | | t\_ISetup\_min\_Data\_1V8 | Input setup time | – | 0 | ns | | t\_IHold\_min\_Data\_1V8 | Input hold time | – | 4 | ns | | DC\_Out\_Clock | Duty cycle generated at clock output signal calculated from t\_Low\_Clock/(t\_Low\_Clock + t\_ High\_Clock) | 46% of the SWR CLK | 54% of the SWR CLK | ns | ### Touchscreen connections Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Touchscreen panels are supported using I^2^C buses ([I2C interface](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#bsy1606108055605)) and GPIOs configured as discrete digital inputs ([Digital-logic characteristics](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942)). ### I^2^C interface Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Supported I2C standards and exceptions | Applicable standard | Feature exceptions | | --- | --- | | *I^2^C Specification, version 3.0* | HS mode, slave mode, and 10-bit addressing are not supported. | ### I3C interface Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Supported I3C standards and exceptions | Applicable standard | Feature exceptions | | --- | :---: | | *I3C Specification, version 1.0* | None | ### Serial peripheral interface Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The QRB2210 supports SPI as a master only. Only six out of 10 QUP ports can be configured as an SPI master. Figure : SPI master timing diagram Page-1 Sheet.223 Sheet.224 Sheet.228 Sheet.222 Sheet.241 Sheet.242 Sheet.246 50% clock duty cycle is shown but is not a requirement 50% clock duty cycle is shown but is not a requirement Sheet.247 SPI_CLK SPI_CLK Sheet.248 SPI_DATA_MOSI SPI_DATA_MOSI Sheet.249 T T Sheet.251 Sheet.252 t(mov) t(mov) Sheet.264 Sheet.265 Sheet.268 Sheet.271 Sheet.1 Sheet.2 Sheet.3 Sheet.8 Sheet.9 Sheet.10 Sheet.11 Sheet.12 Sheet.13 Sheet.14 Sheet.15 Sheet.16 Sheet.17 Sheet.19 Sheet.4 Sheet.5 Sheet.6 Sheet.7 Sheet.20 Sheet.21 Sheet.22 Sheet.23 Sheet.24 Sheet.25 Sheet.26 Sheet.27 Sheet.30 Sheet.31 Sheet.32 Sheet.33 Sheet.34 Sheet.35 Sheet.36 Sheet.37 Sheet.38 Sheet.39 Sheet.40 Sheet.41 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Sheet.46 SPI_DATA_MISO SPI_DATA_MISO Sheet.48 Sheet.49 t(mis) t(mis) Sheet.50 Sheet.51 Sheet.53 Sheet.54 t(mih) t(mih) Sheet.55 Sheet.294 t(mov) value is positive if after clock transition (shown); n... t(mov) value is positive if after clock transition (shown); negative if before) Sheet.250 Sheet.306 SPI_CS_N SPI_CS_N Sheet.307 SPI_CS_N to SPI_CLK timing is fixed at 1 clock period SPI_CS_N to SPI_CLK timing is fixed at 1 clock period Sheet.18 Sheet.47 Sheet.52 Sheet.56 Sheet.57 Sheet.58 Sheet.59 Sheet.60 Sheet.61 Sheet.62 Sheet.63 Sheet.64 T T Sheet.28 Sheet.29 Sheet.65 Sheet.66 Sheet.67 Sheet.68 Sheet.69 Sheet.70 Sheet.71 Sheet.72 Table : SPI master timing characteristics | Parameter | Comments | Min | Typ | Max | Unit | | --- | --- | :---: | :---: | :---: | :---: | | T (SPI clock period) [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_Serial_peripheral_interface) | 50 MHz maximum | 20 | – | – | ns | | t(ch) | Clock high | 9 | – | – | ns | | t(cl) | Clock low | 9 | – | – | ns | | t(mov) | Master output valid | -5 | – | 5 | ns | | t(mis) | Master input setup | 5 | – | – | ns | [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_1_Serial_peripheral_interface) The minimum clock period includes 1% jitter of maximum frequency. ## Internal functions Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Some internal functions require external interfaces to enable their operation. These include clock generation, modes and resets, and JTAG functions. ### Clocks Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Clocks that are specific to particular functions are addressed in the corresponding sections of this document. Others are specified here. ### 19.2 MHz CXO input Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Figure : XO timing parameters Page-1 Sheet.306 XO XO Sheet.307 Sheet.308 Sheet.309 Sheet.310 Sheet.311 Sheet.312 Sheet.313 Sheet.314 Sheet.315 Sheet.316 Sheet.317 Sheet.318 Sheet.319 Sheet.320 Sheet.321 Sheet.322 Sheet.323 Sheet.324 Sheet.325 Sheet.326 Sheet.327 Sheet.328 Sheet.329 Sheet.330 Sheet.331 Sheet.332 Sheet.333 Sheet.334 Sheet.335 Sheet.336 Sheet.337 Sheet.338 Sheet.339 Sheet.340 Sheet.341 Sheet.342 Sheet.343 Sheet.344 Sheet.345 Sheet.346 Sheet.347 Sheet.348 T T Sheet.349 t(xol) t(xol) Sheet.350 t(xol) t(xol) Sheet.351 t(xoh) t(xoh) Sheet.352 T T Sheet.353 t(xoh) t(xoh) Sheet.354 Sheet.355 Sheet.356 Sheet.357 Sheet.358 Sheet.359 Sheet.360 Average Average Sheet.361 (DC component) (DC component) | Parameter | Parameter | Comments[^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fntarg_1_19_2_MHz_CXO_input) | Min | Typ | Max | Unit | | --- | --- | --- | --- | --- | --- | --- | | **t**(xoh) | XO logic high | – | 22.6 | – | 29.5 | ns | | **t**(xol) | XO logic low | – | 22.6 | – | 29.5 | ns | | T | XO clock period | – | – | 52.083 | – | ns | | 1/T | Frequency | 19.2 MHz must be used | – | 19.2 | – | MHz | [^1^](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#fnsrc_1_19_2_MHz_CXO_input) See the [GPS Quality, 19.2 MHz 2520 Package Size, Crystal, and TH + Xtal Mini-Specification (80-V9690-24)](https://docs.qualcomm.com/bundle/80-V9690-24/resource/80-V9690-24.pdf) document for more details. ### Sleep clock Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Figure : Sleep clock timing parameters Page-1 Sheet.113 Sleep clock Sleep clock Sheet.114 Sheet.115 Sheet.116 Sheet.117 Sheet.118 Sheet.119 Sheet.120 Sheet.121 Sheet.122 Sheet.123 Sheet.124 Sheet.125 Sheet.126 Sheet.127 Sheet.128 Sheet.129 Sheet.130 Sheet.131 Sheet.132 Sheet.133 Sheet.134 Sheet.135 Sheet.136 Sheet.137 Sheet.138 Sheet.139 Sheet.140 Sheet.141 Sheet.142 Sheet.143 Sheet.144 Sheet.145 Sheet.146 Sheet.147 Sheet.148 Sheet.149 Sheet.150 Sheet.151 Sheet.152 Sheet.153 Sheet.155 T T Sheet.156 t(xol) t(xol) Sheet.157 t(xol) t(xol) Sheet.158 t(xoh) t(xoh) Sheet.159 T T Sheet.160 t(xoh) t(xoh) Sheet.162 Sheet.163 Sheet.164 Sheet.165 Sheet.166 Sheet.167 Average Average Sheet.168 (DC component) (DC component) Sheet.1 Sheet.2 Sheet.3 Sheet.4 Sheet.5 Sheet.6 Vpp Vpp | Parameter | Parameter | Comments | Min | Typ | Max | Unit | | --- | --- | --- | --- | --- | --- | --- | | t(xoh) | Sleep-clock logic high | – | 4.58 | – | 25.94 | µs | | t(xol) | Sleep-clock logic low | – | 4.58 | – | 25.94 | µs | | T | Sleep-clock period | – | – | 30.518 | – | µs | | F | Sleep-clock frequency | F= 1/T | – | 32.768 | – | kHz | | Vpp | Peak-to-peak voltage | – | – | 1.8 | – | V | ### Modes and resets Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Mode and reset functions are basic digital I/Os that meet the performance specifications presented in [Digital-logic characteristics](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942). ### JTAG Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Figure : JTAG interface timing diagram Page-1 Sheet.3 Sheet.4 Sheet.5 Sheet.6 Sheet.7 Sheet.10 Sheet.11 Sheet.12 Sheet.13 Sheet.14 Sheet.15 Sheet.16 Sheet.17 Sheet.18 Sheet.19 Sheet.20 Sheet.21 Sheet.22 Sheet.23 Sheet.24 Sheet.25 Sheet.26 Sheet.27 Sheet.28 Sheet.29 Sheet.30 Sheet.31 Sheet.34 Sheet.35 Sheet.36 Sheet.37 Sheet.38 Sheet.39 Sheet.40 Sheet.41 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Sheet.46 Sheet.47 Sheet.48 Sheet.49 Sheet.50 Sheet.51 Sheet.52 Sheet.53 Sheet.54 Sheet.55 Sheet.56 Sheet.57 Sheet.58 Sheet.59 Sheet.60 Sheet.61 Sheet.62 Sheet.63 Sheet.64 Sheet.65 Sheet.66 Sheet.67 Sheet.68 Sheet.69 Sheet.70 Sheet.71 Sheet.72 Sheet.73 Sheet.74 Sheet.75 Sheet.76 Sheet.77 Sheet.78 Sheet.79 Sheet.80 Sheet.81 Sheet.82 Sheet.83 Sheet.84 Sheet.85 Sheet.86 Sheet.87 Sheet.88 Sheet.89 t(do) t(do) Sheet.90 t(htdi) t(htdi) Sheet.91 t(sutdi) t(sutdi) Sheet.92 t(htms) t(htms) Sheet.93 t(sutms) t(sutms) Sheet.96 t(tckl) t(tckl) Sheet.98 t(tckh) t(tckh) Sheet.99 t(tckcy) t(tckcy) Sheet.100 TCK TCK Sheet.101 TMS TMS Sheet.102 TDI TDI Sheet.103 TDO TDO | **Parameter** | **Parameter** | **Min** | **Typ** | **Max** | **Unit** | | --- | --- | --- | --- | --- | --- | | t(tckcy) | TCK period | 50 | – | – | ns | | t(tckh) | TCK pulse width high | 20 | – | – | ns | | t(tckl) | TCK pulse width low | 20 | – | – | ns | | t(sutms) | TMS input setup time | 5 | – | – | ns | | t(htms) | TMS input hold time | 20 | – | – | ns | | t(sutdi) | TDI input setup time | 5 | – | – | ns | | t(htdi) | TDI input hold time | 20 | – | – | ns | | t(do) | TDO data output delay | – | – | 15 | ns | ## Power management interfaces Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) The digital I/Os must meet the logic-level requirements specified in [Digital-logic characteristics](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html#hqk1605596536942). The Rx and Tx baseband interfaces are proprietary, and therefore are not specified. ### System power management interface (SPMI) Source: [https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html](https://docs.qualcomm.com/doc/80-30843-1/topic/Electrical_specifications.html) Table : Supported SPMI standards and exceptions | Applicable standard | Feature exceptions | | --- | --- | | *MIPI Alliance Specification for System Power Management Interface (SPMI) version 1.0* | None | Last Published: Oct 08, 2025 [Previous Topic Pin definitions](https://docs.qualcomm.com/bundle/publicresource/80-30843-1/topics/Pin_definitions.md) [Next Topic Mechanical information](https://docs.qualcomm.com/bundle/publicresource/80-30843-1/topics/Mechanical_information.md)