# 架构

Source: [https://docs.qualcomm.com/doc/80-70014-20Y/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-20Y/topic/architecture.html)

视频软件栈由一个客户端应用程序组成，该应用程序使用 V4L2 框架与 Adreno VPU 交互。下图显示了解码器和编码器的软件架构：

Figure : 视频解码器软件架构
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Figure : 视频编码器软件架构
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下表列出了视频软件架构的组件：

| 组件 | 说明 |
| --- | --- |
| 用户应用程序 | <ul class="ul" id="concept_gh2_1sh_bzb__ul_dd3_pv1_ybc_eputla_07-03-24-1546-23-577"><br>                                    <li class="li">基于 V4L2/GStreamer，它与解码器的 FileSource 和编码器的 CameraSource 交互。</li><br><br>                                </ul> |
| V4L2 框架 | <ul class="ul" id="concept_gh2_1sh_bzb__ul_jcs_rv1_ybc_eputla_07-03-24-1547-5-469"><br>                                    <li class="li">与用户应用程序和 Adreno VPU 驱动程序交互</li><br><br>                                    <li class="li">负责处理事件、回调和缓冲区管理</li><br><br>                                </ul> |
| Adreno VPU 驱动程序 | <ul class="ul" id="concept_gh2_1sh_bzb__ul_wlt_yv1_ybc_eputla_07-03-24-1549-9-424"><br>                                    <li class="li">用作视频内核模式驱动程序 (KMD) 的入口点</li><br><br>                                    <li class="li">控制 Adreno VPU 的编码器和解码器的通用驱动程序</li><br><br>                                    <li class="li">使用主机固件接口 (HFI) 管理视频驱动程序状态机、缓冲区分配、时钟/总线管理以及与 Adreno VPU 的通信</li><br><br>                                </ul> |
| Adreno VPU | <ul class="ul" id="concept_gh2_1sh_bzb__ul_zcj_dw1_ybc_eputla_07-03-24-1550-30-313"><br>                                    <li class="li">一种硬件加速引擎，可以最低的功耗执行视频解码和编码操作。</li><br><br>                                </ul> |

Last Published: Aug 22, 2024

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