# External delegate options for QNN delegate

Source: [https://docs.qualcomm.com/doc/80-70014-54/topic/external-delegate-options-for-qnn-delegate.html](https://docs.qualcomm.com/doc/80-70014-54/topic/external-delegate-options-for-qnn-delegate.html)

The external delegate interface dynamically loads the Qualcomm AI Engine Direct
        delegate. Therefore, it does not have static information about the Qualcomm AI Engine Direct
        delegate options.

The external delegate sends strings as key and value pairs to the Qualcomm AI Engine
            Direct delegate, which parses them as options. The application using the external
            delegate interface must know the accepted key and value options strings beforehand.

The following table lists the key value option strings that are available in the Qualcomm
            AI Engine Direct delegate:

Table : Key value option strings

| Option key | Option value | Default value | Mandatory | Description |
| --- | --- | --- | --- | --- |
| backend\_type | gpu and htp | NA | Yes | The backend Qualcomm AI Engine Direct library used for opening and<br>                            running the graph with. |
| gpu\_precision | 0, 1, 2, 3 | 2 = Float16 for best performance | No | Precision for the GPU backend that defines the optimization levels of<br>                                the graph tensors that are either input or output tensors.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_vgz_x5m_tbc"><br>                                <li class="li">0: Obey precisions specified in the TensorFlow Lite graph</li><br><br>                                <li class="li">1: Float32</li><br><br>                                <li class="li">2: Float16</li><br><br>                                <li class="li">3: Hybrid</li><br><br>                            </ul> |
| gpu\_performance\_mode | 0, 1, 2, 3 | 0 = Default | No | Flag to provide precision modes supported by the GPU backend.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_wgz_x5m_tbc"><br>                                <li class="li">0: Default</li><br><br>                                <li class="li">1: High</li><br><br>                                <li class="li">2: Normal</li><br><br>                                <li class="li">3: Low</li><br><br>                            </ul> |
| htp\_performance\_mode | 0, 1, 2, 3, 4, 5, 6, 7, 8 | 0 = Default | No | When performance\_mode is used, the delegate votes for the provided<br>                                performance level during inference and returns to a relaxed vote<br>                                after the inference has completed.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_xgz_x5m_tbc"><br>                                <li class="li">0: Default</li><br><br>                                <li class="li">1: Sustained high performance</li><br><br>                                <li class="li">2: Burst</li><br><br>                                <li class="li">3: High performance</li><br><br>                                <li class="li">4: Power saver</li><br><br>                                <li class="li">5: Low-power saver</li><br><br>                                <li class="li">6: High-power saver</li><br><br>                                <li class="li">7: Low balance</li><br><br>                                <li class="li">8: Balance</li><br><br>                            </ul> |
| htp\_pd\_session | unsigned, signed | unsigned | No | This flag defines the PD session of the Hexagon Tensor Processor<br>                            backend. |
| htp\_precision | 0 | 0 = Quantized precision | No | Flag to provide precision modes supported by the Hexagon Tensor<br>                                Processor backend. The default precision mode supports quantized<br>                                networks. Other precision modes may only be supported on certain<br>                                SoCs.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_ygz_x5m_tbc"><br>                                <li class="li">0: Quantized precision</li><br><br>                            </ul> |
| htp\_optimization\_strategy | 0, 1 | 0 = Optimize for inference | No | Flag to select the optimization strategy used by the Hexagon Tensor<br>                                Processor backend. The default optimization strategy optimizes the<br>                                graph for inference.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_zgz_x5m_tbc"><br>                                <li class="li">0: Optimize for inference</li><br><br>                                <li class="li">1: Optimize for prepare</li><br><br>                            </ul> |
| htp\_perf\_ctrl\_strategy | 0, 1 | 0 = Manual | No | Flag to select the Hexagon Tensor Processor performance control<br>                                strategy. Manually vote the performance while the backend is<br>                                initialized and release the performance at the moment the backend is<br>                                destroyed.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_ahz_x5m_tbc"><br>                                <li class="li">0: Manual</li><br><br>                                <li class="li">1: Auto</li><br><br>                            </ul> |
| htp\_use\_conv\_hmx | 0, 1 | 1 = enable HMX for short depth conv2d | No | Flag to enable HMX for short depth conv2d. For more information, see<br>                                the C interface or qnn\_delegate.h.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_bhz_x5m_tbc"><br>                                <li class="li">0: Do not enable HMX for short-depth conv2d.</li><br><br>                                <li class="li">1: Enable HMX for short-depth conv2d.</li><br><br>                            </ul> |
| htp\_use\_fold\_relu | 0,1 | 0 = do not fuse Relu into conv2d | No | Flag to enable fusion of Relu into conv2d. For more information, see<br>                                the C interface or qnn\_delegate.h.<br><br><br>                            <ul class="ul" id="external-delegate-options-for-qnn-delegate__ul_chz_x5m_tbc"><br>                                <li class="li">0: Do not enable fusion Relu into conv2d.</li><br><br>                                <li class="li">1: Enable fusion Relu into conv2d.</li><br><br>                            </ul> |
| library\_path | &lt;Path to backend library file&gt; | Default library associated with chosen Qualcomm AI Engine Direct<br>                            backend | No | Optional parameter to override the Qualcomm AI Engine Direct backend<br>                            library. |

Last Published: Jul 12, 2024

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