# How to interface custom camera sensor
If your camera sensor’s connector matches the RB3 Gen 2 board, you can use it directly. See *Design Package, RB5/RB5GEN2/RB3GEN2 Navigation Mezzanine* ([DP25-PV086-43](https://www.qualcomm.com/search?query=DP25-PV086-43#q=DP25-PV086-43&tab=all)) for connector details.
**Vision mezzanine camera connectors**
Otherwise, create an interface PCB to convert the pinout from the Vision mezzanine to match your camera sensor signals. The example below assumes a “fisheye camera” to be tested with RB3 Gen 2. Two different flex cables (Flex\_A and Flex\_B) would also be needed.
**Vision mezzanine with interface PCB**
A custom-vision-mezzanine board may also be designed to host more than one camera connector. See *Design Package, RB5 Generic Mezz Card Schematic and Layout, IOT* ([DP25-63340-1](https://www.qualcomm.com/search?query=DP25-63340-1#q=DP25-63340-1&tab=all)).
## Connectors on RB3 Gen 2
The CAM1 and CAM2 connectors on the interposer (*see below*) are C/D-PHY. The connectors on the [Vision Mezzanine](https://docs.qualcomm.com/doc/80-70015-251/topic/custom-camera-sensor.html#vision-mezz-connectors) are D-PHY only.
**Interposer camera connectors**
The following images show details for the CAM1 and CAM2 connectors on the interposer.
## Vision Mezzanine pinouts
The following table lists the pinout locations on the Vision Mezzanine.
|
RB5 4 Lane MIPI CSI Connectors |
RB5 4 Lane MIPI CSI Connectors |
RB5 4 Lane MIPI CSI Connectors |
RB5 4 Lane MIPI CSI Connectors |
RB5 4 Lane MIPI CSI Connectors |
RB5 4 Lane MIPI CSI Connectors |
| --- | --- | --- | --- | --- | --- |
| Pin | CAM0A | CAM1 | CAM2 | CAM3 | Notes |
| 1 | Strobe (GPIO) | Strobe (GPIO) | Strobe (GPIO) | Strobe (GPIO) | strobe not typically used by most modules |
| 2 | Spare (GPIO) | Spare (GPIO) | Spare (GPIO), Optionally SPI\_CLK | Spare (GPIO) | spare not typically used by most modules |
| 3 | 2V8 | 2V8 | 2V8 | 2V8 or 5V | |
| 4 | GND | GND | Optionally SPI\_MOSI | GND | |
| 5 | Reset (GPIO) | Reset (GPIO) | Reset (GPIO) | Reset (GPIO) | Key GPIO |
| 6 | GND | GND | GND, For CAM2, this pin can be remapped to a 32kHz SLEEP\_CLK. GND is the default. | GND | |
| 7 | CSI\_D2\_P | CSI\_D2\_P | CSI\_D2\_P | CSI\_D2\_P | |
| 8 | CSI\_D2\_M | CSI\_D2\_M | CSI\_D2\_M | CSI\_D2\_M | |
| 9 | GND | GND | GND | GND | |
| 10 | CSI\_D0\_P | CSI\_D0\_P | CSI\_D0\_P | CSI\_D0\_P | |
| 11 | CSI\_D0\_M | CSI\_D0\_M | CSI\_D0\_M | CSI\_D0\_M | |
| 12 | GND | GND | GND | GND | |
| 13 | CSI\_D3\_P | CSI\_D3\_P | CSI\_D3\_P | CSI\_D3\_P | |
| 14 | CSI\_D3\_M | CSI\_D3\_M | CSI\_D3\_M | CSI\_D3\_M | |
| 15 | CAM\_PWR\_SWITCH | CAM\_PWR\_SWITCH | CAM\_PWR\_SWITCH | CAM\_PWR\_SWITCH | Controls 1V1 or 1V2 selection on pin 30. Pull low to GND for 1.1V, pull high to 1V8 rail on the flex for 1V2. |
| 16 | 0R to GND | 0R to GND | 0R to GND | CAM\_PWR\_SWITCH2 | CAM3 Only: Pull low to GND for normal operation (1V1/1V2, 1V8, 2V8). Pull high to Pin 28 for 5V on all three power pins. |
| 17 | CSI\_D1\_M | CSI\_D1\_M | CSI\_D1\_M | CSI\_D1\_M | |
| 18 | CSI\_D1\_P | CSI\_D1\_P | CSI\_D1\_P | CSI\_D1\_P | |
| 19 | GND | GND | GND | GND | |
| 20 | CSI\_C\_M | CSI\_C\_M | CSI\_C\_M | CSI\_C\_M | |
| 21 | CSI\_C\_P | CSI\_C\_P | CSI\_C\_P | CSI\_C\_P | |
| 22 | GND | GND | GND | GND | |
| 23 | MCLK | MCLK | MCLK | MCLK | Key GPIO |
| 24 | GND | GND | GND | GND | |
| 25 | SCL | SCL | SCL | SCL | Key GPIO |
| 26 | SDA | SDA | SDA | SDA | Key GPIO |
| 27 | PWDN/Sync to CAM0B | PWDN | Optionally SPI\_CS | PWDN | PWDN not typically used by most modules |
| 28 | 1V8 | 1V8 | 1V8 | 1V8 or 5V | |
| 29 | GND | GND | Optionally SPI\_MISO | GND | |
| 30 | 1V1 or 1V2 | 1V1 or 1V2 | 1V1 or 1V2 | 1V2 or 5V | |
| - General Notes:
- Only Camera interfaces with 4 D-PHY lanes are shown. QC software only uses RST and MCLK. The other GPIO pins can be used for other purposes as they are not nominally routed to anything in the software. CAM0A and CAM0B can be synchronized via pin 27. Optional SPI bus on CAM2 is connected to the apps processor block, not the DSP block. | - General Notes:
- Only Camera interfaces with 4 D-PHY lanes are shown. QC software only uses RST and MCLK. The other GPIO pins can be used for other purposes as they are not nominally routed to anything in the software. CAM0A and CAM0B can be synchronized via pin 27. Optional SPI bus on CAM2 is connected to the apps processor block, not the DSP block. | - General Notes:
- Only Camera interfaces with 4 D-PHY lanes are shown. QC software only uses RST and MCLK. The other GPIO pins can be used for other purposes as they are not nominally routed to anything in the software. CAM0A and CAM0B can be synchronized via pin 27. Optional SPI bus on CAM2 is connected to the apps processor block, not the DSP block. | - General Notes:
- Only Camera interfaces with 4 D-PHY lanes are shown. QC software only uses RST and MCLK. The other GPIO pins can be used for other purposes as they are not nominally routed to anything in the software. CAM0A and CAM0B can be synchronized via pin 27. Optional SPI bus on CAM2 is connected to the apps processor block, not the DSP block. | - General Notes:
- Only Camera interfaces with 4 D-PHY lanes are shown. QC software only uses RST and MCLK. The other GPIO pins can be used for other purposes as they are not nominally routed to anything in the software. CAM0A and CAM0B can be synchronized via pin 27. Optional SPI bus on CAM2 is connected to the apps processor block, not the DSP block. | - General Notes:
- Only Camera interfaces with 4 D-PHY lanes are shown. QC software only uses RST and MCLK. The other GPIO pins can be used for other purposes as they are not nominally routed to anything in the software. CAM0A and CAM0B can be synchronized via pin 27. Optional SPI bus on CAM2 is connected to the apps processor block, not the DSP block. |
**RB3 Gen 2**
Last Published: Feb 07, 2025
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Source: [https://docs.qualcomm.com/doc/80-70015-251/topic/custom-camera-sensor.html](https://docs.qualcomm.com/doc/80-70015-251/topic/custom-camera-sensor.html)