# 架构

Tab QCS6490/QCS5430
Tab QCS9100/QCS9075

下图显示了在 RB3 Gen 2 开发套件上通过以太网进行数据通信所涉及的架构及其组件。

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RB3 Gen 2 开发套件上的以太网架构

下表描述了以太网架构的组件。

| 组件 | 说明 |
| --- | --- |
| 应用处理器子系统 (APSS) | 在基于 Linux 的操作系统上运行。 |
| 以太网驱动程序 | <ul class="simple"><br><li><p>Linux 内核中的软件驱动程序。</p></li><br><li><p>通过有线以太网接口提供数据连接。</p></li><br></ul> |
| PHY 驱动程序 | <ul class="simple"><br><li><p>专用于管理以太网物理层的底层驱动程序。</p></li><br><li><p>实现处理 PHY 生命周期（从初始化至链路建立）所需的软件状态机。</p></li><br><li><p>与底层管理数据输入/输出 (MDIO) 交互以访问 PHY 寄存器，并执行检测活动 PHY 和/或已链接 PHY 等操作。</p></li><br></ul> |
| 以太网硬件（RB3 Gen 2 开发套件） | <ul class="simple"><br><li><p>QEP 和 AQR PHY 均已在 <a href="https://docs.qualcomm.com/bundle/publicresource/topics/80-70015-251/rb3_mainboard_connectors.html" rel="noopener noreferrer" target="_blank" class="xref cursorpointer" onclick="Window.BookmapComponent.navigateExternalFile('https://docs.qualcomm.com/bundle/publicresource/topics/80-70015-251/rb3_mainboard_connectors.html')">RB3 Gen 2 开发套件上进行了验证。</a></p></li><br><li><p>默认情况下，SGMII 接口上提供 2.5 GbE 的 QEP PHY。它在 1 x QEP8121 IX 连接器上启用并进行了验证。</p></li><br><li><p>默认情况下，具有 1 GbE 的 USB2ETH 接口可用，并在 RJ45 连接器上进行了验证。</p></li><br><li><p>适用于 10 GbE 的 AQR PHY 是可选的，开发套件中可能不提供。如果可用，则在 1 x AQR113C IX 连接器上进行了验证。</p></li><br></ul><br><br>Note<br><br><br>后文中的示例输出基于对 QEP8121 PHY、USB2ETH 和 AQR113C PHY 的验证。<br><br><ul class="simple"><br><li><p>请参阅<span class="xref std std-ref">调通备用硬件启用</span>，以便调通 Qualcomm 提供的配置以外的硬件配置。</p></li><br><li><p>关于如何配置 USB2ETH 的信息，请参阅<a href="https://docs.qualcomm.com/bundle/publicresource/topics/80-70017-254/how_to.html#configure-ethernet-with-rj45-port" rel="noopener noreferrer" target="_blank" class="xref cursorpointer" onclick="Window.BookmapComponent.navigateExternalFile('https://docs.qualcomm.com/bundle/publicresource/topics/80-70017-254/how_to.html#configure-ethernet-with-rj45-port')">配置带 RJ45 的以太网</a></p></li><br></ul> |

下图显示了标准架构和 DPDK 架构，以及 IQ-9 Beta EVK 上通过以太网进行数据通信所涉及的组件。

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</svg>

IQ-9 Beta EVK 上的以太网架构

下表描述了以太网架构的组件。

| 组件 | 说明 |
| --- | --- |
| 应用处理器子系统 (APSS) | 在基于 Linux 的操作系统上运行。 |
| 以太网驱动程序 | <ul class="simple"><br><li><p>Linux 内核中的软件驱动程序。</p></li><br><li><p>通过有线以太网接口提供数据连接。</p></li><br></ul> |
| PHY 驱动程序 | <ul class="simple"><br><li><p>专用于管理以太网物理层的底层驱动程序。</p></li><br><li><p>实现处理 PHY 生命周期（从初始化至链路建立）所需的软件状态机。</p></li><br><li><p>与底层管理数据输入/输出 (MDIO) 交互以访问 PHY 寄存器，并执行检测活动 PHY 和/或已链接 PHY 等操作。</p></li><br></ul> |
| 以太网硬件（IQ-9 Beta EVK） | <ul class="simple"><br><li><p>AQR PHY 在 IQ-9 Beta EVK 上经过验证。</p></li><br><li><p>默认情况下使用 2 个适用于 2.5 GbE 的 AQR115 PHY。</p></li><br><li><p>两个 AQR115 PHY 均启用了 RJ45 接口。</p></li><br><li><p><a href="https://docs.qualcomm.com/doc/80-70017-26SC/topic/features.html#dpdk"><span class="std std-ref">DPDK</span></a> 在 QCS9100 上受支持，并且仅适用于 <a href="https://www.intel.com/content/www/us/en/products/sku/88209/intel-ethernet-converged-network-adapter-x550t2/specifications.html" rel="noopener noreferrer" target="_blank" class="xref cursorpointer" onclick="Window.BookmapComponent.navigateExternalFile('https://www.intel.com/content/www/us/en/products/sku/88209/intel-ethernet-converged-network-adapter-x550t2/specifications.html')">Intel® Ethernet Converged Network Adapter X550-T2</a>。</p></li><br></ul><br><br>Note<br><br><br>Intel® Ethernet Converged Network Adapter X550-T2 是可选项，IQ-9 Beta EVK 上可能不提供。 |

Last Published: Jan 24, 2025

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