# Buses

A bus facilitates data transfer among various system components. The DT
properties allow for the configuration of the Qualcomm Universal
Peripheral (QUP) v3 serial interface device nodes.

QUP v3 supports interintegrated circuit (I^2^C), serial peripheral
interface (SPI), and universal asynchronous receiver-transmitter (UART)
serial engines. The DT properties include the active and sleep settings
for these serial engines.

For more information on QUP v3 and its peripheral interfaces, see
[Overview of peripheral
devices](https://docs.qualcomm.com/bundle/publicresource/topics/80-70017-8/overview-of-wired-interfaces.html).

The serial engine protocol and active configurations can be applied when
the firmware is loaded onto the serial engine.

The following files can be configured at the Linux host PC:

- `boot_images/boot/Settings/Soc/<chipset>/Core/Buses/qup_common/<chipset>-qupv3-pinctrl.dtsi`
- `boot_images/boot/Settings/Soc/<chipset>/Core/Buses/qup_common/<chipset>-qupv3.dtsi`

In `&top_qup k _se n`, **k** represents the QUP number and **n**
represents the serial engine number. The table lists the DT properties:

Table : Bus DT properties

| Property name | Property description | Data type | Possible values/value range | Device behavior |
| --- | --- | --- | --- | --- |
| status = “disabled”; | Status control to enable/disable serial interfaces supported for QUP v3 serial engine (I2C/SPI/UART) protocols. | String | <ul class="simple"><br><li><p>Okay</p></li><br><li><p>Disabled</p></li><br></ul> | Enables or disables the serial engine. |
| &top\_qup**k**\_se**n**\_i2c\_active | GPIOs active settings for I2C serial engines. | UNIT32-array | Reference to a node label. | Sets active GPIO configurations for the I2C protocol. |
| &top\_qup**k**\_se**n**\_i2c\_sleep | GPIOs sleep settings for I2C. | UNIT32-array | Reference to a node label. | Sets sleep GPIO configurations for the I2C protocol. |
| &top\_qup**k**\_se**n**\_spi\_active | GPIOs active settings for SPI. | UNIT32-array | Reference to a node label. | Sets active GPIO configurations for the SPI protocol. |
| &top\_qupk**k**\_se**n**\_spi\_sleep | GPIOs sleep settings for SPI. | UNIT32-array | Reference to a node label. | Sets sleep GPIO configurations for the SPI protocol. |
| &top\_qup**k**\_se**n**\_uart\_active | GPIOs active settings for UART. | UNIT32-array | Reference to a node label. | Sets active GPIO configurations for the UART protocol. |
| &top\_qup**k**\_se**n**\_uart\_sleep | GPIOs sleep settings for UART. | UNIT32-array | Reference to a node label. | Sets sleep GPIO configurations for the UART protocol. |

## Sample configuration

TOP\_QUP\_0{}
/*TOP\_QUP\_0\_SE\_0 Instance \*/TOP\_QUP\_0\_SE\_0{status = “disabled”; /* status to enable/disable SE0 Node [\*](https://docs.qualcomm.com/doc/80-70017-4/topic/buses.html#id1)/
pinctrl-0  = &lt;&top\_qup0\_se0\_i2c\_active&gt;;
pinctrl-1  = &lt;&top\_qup0\_se0\_i2c\_sleep&gt;;
pinctrl-2  = &lt;&top\_qup0\_se0\_spi\_active&gt;;
pinctrl-3  = &lt;&top\_qup0\_se0\_spi\_sleep&gt;;
pinctrl-4  = &lt;&top\_qup0\_se0\_uart\_active&gt;;
pinctrl-5  = &lt;&top\_qup0\_se0\_uart\_sleep&gt;;

Last Published: Dec 30, 2024

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