# Buses

A bus facilitates data transfer among various system components. You can use the DT properties to configure the Qualcomm Universal Peripheral (QUP) v3 serial interface device nodes.

QUP v3 supports inter-integrated circuit (I^2^C), serial peripheral
interface (SPI), and universal asynchronous receiver-transmitter (UART)
serial engines. The DT properties include the active and sleep settings
for these serial engines.

For more information about QUP v3 and it’s peripheral interfaces, see
[Overview of peripheral
interfaces](https://docs.qualcomm.com/doc/80-70030-8/topic/overview-of-wired-interfaces.html).

You can apply the serial engine protocol and active configurations when the firmware loads onto the serial engine.

You can configure the following Linux host files:

- `boot_images/boot/Settings/Soc/<chipset>/Core/Buses/qup_common/<chipset>-qupv3-pinctrl.dtsi`
- `boot_images/boot/Settings/Soc/<chipset>/Core/Buses/qup_common/<chipset>-qupv3.dtsi`

In `&top_qup k _se n`, **k** represents the QUP number and **n**
represents the serial engine number. The table lists the DT properties:

Table : Bus DT properties

| Property name | Property description | Data type | Possible values/value range | Device behavior |
| --- | --- | --- | --- | --- |
| `status = "disabled";` | Status control to enable/disable serial interfaces supported for QUP v3 serial engine (I^2^C/SPI/UART) protocols. | String | <ul class="simple"><br><li><p>Okay</p></li><br><li><p>Disabled</p></li><br></ul> | Enables or disables the serial engine. |
| `&top_qup\ **k**\_se\ **n**\_i2c_active` | GPIOs active settings for I^2^C serial engines. | UINT32-array | Reference to a node label. | Sets active GPIO configurations for the I^2^C protocol. |
| `&top_qup\ **k**\_se\ **n**\_i2c_sleep` | GPIOs sleep settings for I^2^C. | UINT32-array | Reference to a node label. | Sets sleep GPIO configurations for the I^2^C protocol. |
| `&top_qup\ **k**\_se\ **n**\_spi_active` | GPIOs active settings for SPI. | UINT32-array | Reference to a node label. | Sets active GPIO configurations for the SPI protocol. |
| `&top_qup\ **k**\_se\ **n**\_spi_sleep` | GPIOs sleep settings for SPI. | UINT32-array | Reference to a node label. | Sets sleep GPIO configurations for the SPI protocol. |
| `&top_qup\ **k**\_se\ **n**\_uart_active` | GPIOs active settings for UART. | UINT32-array | Reference to a node label. | Sets active GPIO configurations for the UART protocol. |
| `&top_qup\ **k**\_se\ **n**\_uart_sleep` | GPIOs sleep settings for UART. | UINT32-array | Reference to a node label. | Sets sleep GPIO configurations for the UART protocol. |

## Sample configuration

TOP_QUP_0{}
    /*TOP_QUP_0_SE_0 Instance */
    TOP_QUP_0_SE_0{
    status = "disabled"; /* status to enable/disable SE0 Node */
    pinctrl-0  = <&top_qup0_se0_i2c_active>;
    pinctrl-1  = <&top_qup0_se0_i2c_sleep>;
    pinctrl-2  = <&top_qup0_se0_spi_active>;
    pinctrl-3  = <&top_qup0_se0_spi_sleep>;
    pinctrl-4  = <&top_qup0_se0_uart_active>;
    pinctrl-5  = <&top_qup0_se0_uart_sleep>;
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Last Published: Jul 20, 2026

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