# GPIO functions - Top-level mode multiplexer (TLMM)

The hardware controls the multiplexing of General-Purpose Input/Output
(GPIO) and alternate functions through the top-level mode multiplexer
(TLMM). You can configure the GPIOs during the boot process using the DT
properties for TLMM.

You can edit the following file paths to update the properties on the
Linux host computer:

- `/boot_images/boot/Settings/Soc/<Chipset>/Core/SocInfra/TLMM/<Chipset>-pinctrl.dtsi`
- `/boot_images/boot/Settings/Soc/<Chipset>/Core/SocInfra/TLMM/tlmm.dtsi`

The table lists the properties that describe how to configure the
default value of a GPIO based on the requirements of the Qualcomm
reference device.

Table : TLMM DT properties

| Property name | Property description | Data type | Possible values/value range | Device behavior |
| --- | --- | --- | --- | --- |
| QCOM, sleep-config | GPIO configuration settings as defined in `<Chipset>-pinctrl.dtsi`. The configurations are applied on device bootup. | UINT32 | Pin direction:<br><br><br><br>> <br>> <br>> <ul class="simple"><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_INPUT</span></code> – 0x1</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_OUTPUT</span></code> – 0x2</p></li><br>> </ul><br><br><br><br>Pin pull configuration:<br><br><br><br>> <br>> <br>> <ul class="simple"><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_PULL_DOWN</span></code> – 0x4</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_PULL_UP</span></code> – 0x8</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_NO_PULL</span></code> – 0x10</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_KEEPER</span></code> – 0x20</p></li><br>> </ul><br><br><br><br>Pin output:<br><br><br><br>> <br>> <br>> <ul class="simple"><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_OUT_LOW</span></code> – 0x40</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_OUT_HIGH</span></code> – 0x80</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_PRG_YES</span></code> – 0x100</p></li><br>> <li><p><code class="docutils literal notranslate"><span class="pre">GPIO_PRG_NO</span></code> – 0x000</p></li><br>> </ul> | <ul><br><li><p>The default value is <code class="docutils literal notranslate"><span class="pre">GPIO_INPUT</span></code>.</p><ul class="simple"><br><li><p>GPIO_INPUT: Allows the state of an input pin to be read.</p></li><br><li><p>GPIO_OUTPUT: Controls the state of an output pin.</p></li><br></ul><br></li><br><li><p>The default value is <code class="docutils literal notranslate"><span class="pre">GPIO_PULL_DOWN</span></code>.</p><ul class="simple"><br><li><p>GPIO_PULL_DOWN: Logic 0, consider as connected to Ground.</p></li><br><li><p>GPIO_PULL_UP: Logic 1, connected to Vdd supply.</p></li><br><li><p>GPIO_NO_PULL: Floating/High Impedance state.</p></li><br><li><p>GPIO_KEEPER: Maintain the previous state of the GPIO. When an SoC enters the deepest power-saving mode, this configuration is applied.</p></li><br></ul><br></li><br><li><p>The default value is <code class="docutils literal notranslate"><span class="pre">GPIO_OUT_LOW</span></code>.</p><br><p><code class="docutils literal notranslate"><span class="pre">GPIO_OUT_HIGH</span></code>: Logic high, consider as connected to <code class="docutils literal notranslate"><span class="pre">Vdd</span></code>.</p><br></li><br><li><p>The default value is <code class="docutils literal notranslate"><span class="pre">GPIO_PRG_NO</span></code>.</p><br><p>GPIO_PRG_YES: Ensures that any unused GPIOs remain in a low-power state after bootup.</p><br></li><br></ul><br><br>For example, `(GPIO_INPUT | GPIO_PULL_DOWN | GPIO_OUT_LOW | GPIO_PRG_NO) /* PIN 10 */`. |
| Compatible | Compatible property contains a read-only string that points to the compatible chipset. | String | – | For example, `compatible = "qcom,<chipset>-pinctrl"`. |
| reg | Represents the read-only GPIO base address and size. | UINT32 | \_ | In a `reg` property tuple, the first index contains the base address, and the second index contains the size. For example, `reg = <0xf100000 0x100000>;`. |
| ngpios | Number of read-only GPIO pins in chipset. | UINT32 | – | For example, `ngpios = <175>;`. |
| width | Each GPIO pin has its own set of read-only control registers. Width indicates pin to pin register offset. | – | – | For example, `width = <0x1000>;`. |
| id | Hardware instance of read-only GPIO pad ID. | UINT32 | – | For example, `id = <0x0>;`. |
| version | GPIO read-only driver version. Driver 1.0 refers as 0x1. | UINT32 | – | For example, `version = <0x1>;`. |
| gpio-controller | Identifier to represent the read-only connected device as a GPIO device. | String | – | – |
| phandles for pin configurations | Mux configuration that is used to configure the alternative functionality of GPIOs. For more information, see [Pin descriptions](https://docs.qualcomm.com/bundle/80-23889-1/resource/80-23889-1_REV_AM_QCS6490_QCS5430_Data_Sheet.pdf). | – | `sdc4_data_1: sdc4_data_1 { mux = <13 3>; };` | On bootup, the GPIO configures to alternate functionality of GPIO.<br><br><br>For example, `sdc4_data_1: sdc4_data_1 { mux = <13 3> };`.<br><br><br>In this example, 13 refers to the GPIO number and 3 indicates the alternate function selection. |

Last Published: Jul 20, 2026

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