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# Enable UFS device feature using kernel configuration The following table lists the default values of the kernel configuration to enable UFS device. UFS device kernel configuration | Configuration | Enabled by default (yes/no) | Description | | --- | --- | --- | | `CONFIG_UFS_FAULT_INJECTION` | No | Injects the failure command for debugging. | | `CONFIG_SCSI_UFSHCD` | Yes | Enables the UFS host control driver in the kernel. | | `CONFIG_SCSI_UFSHCD_PLATFORM` | Yes | Supports the UFS controller from the platform bus. | | `CONFIG_SCSI_UFS_QCOM` | Yes | Enables a Qualcomm-specific addition to access the PHY configuration and vendor-specific registers. | | `CONFIG_PHY_QCOM_QMP` | Yes | Supports UFS device QMP PHY driver. | | `CONFIG_SCSI_UFS_BSG` | Yes | Enables UFS device BSG device node. | | `CONFIG_SCSI_UFS_CRYPTO` | Yes | Supports UFS device crypto engine. | # Configure UFS Linux kernel device tree The SoC DTSI node specifies register address space, clocks, interrupts, and reset information. The platform DTSI node specifies power supply, voltage, and current levels. The `Ufs_mem_hc` node that describes the on-chip UFS device host controller is typically within the SoC DTSI file. For example, `/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi`. For `Ufs_mem_hc` node in Dragonwing IQ-9075, see `/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sa8775p.dtsi`. Note These parameters are only for information purposes. Don’t change them. | Property | Description | | --- | --- | | `Compatible` | Qualcomm SoCs must contain strings such as `qcom`, `ufshc`. | | `Interrupts` | Interrupt mapping for UFS host controller IRQ. | | `Reg` | UFS host registers address mapping. | | `Phys` | `phandle` to UFS device PHY node. | | `lanes-per-direction` | Specify the number of lanes available per direction. Either 1 or 2. | | `clock-names` | List of clock input name strings. | | `Clocks` | List of `phandle` and clock specifier pairs. | | `freq-table-hz` | Array of <minimum maximum> operating frequencies stored in the same order as the clocks property. | | `reset-gpios` | A `phandle` and GPIO specifier denoting the GPIO that is connected. | | `Resets` | Reset node register. | The `Ufs_mem_phy` node describes the on-chip UFS device PHY hardware and is typically within the SoC DTSI file. For example, `/sources/kernel/kernel_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi` file. | Property | Description | | --- | --- | | `Compatible` | Specify compatible string such as `qcom`, `qmp-ufs-phy`. | | `#phy-cells` | Set the property to 0. | | `Reg` | Should contain PHY register address space. | | `reg-names` |

Indicates various resources passed to driver (through the reg property) by name.

The required reg-names is phy_mem.

| | `lanes-per-direction` | Number of lanes available per direction; either 1 or 2. | | `clock-names` | List of clock input name strings. | | `clocks` | List of phandle and clock specifier pairs. | | `vdda-phy-supply` | `phandle` to main PHY supply for analog domain. | | `vdda-pll-supply` | `phandle` to PHY PLL and Power-Gen block power supply. | | `Resets` | Specifies the PHY reset in the UFS device controller. | For more information about DTS parameters, see `/kernel_platform/msm-kernel/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml`. # Modify UFS device power management states To optimize power management, modify the UFS device power management states as required. However, altering the states can cause changes in power consumption. Note For more information about how to run SSH, see the [Use SSH](https://docs.qualcomm.com/bundle/publicresource/topics/80-80021-254/how_to.html) section. UFS device power management states | State | Description | | --- | --- | | Auto-hibern8 (AH8) |

AH8 automatically transitions the PHY link to the Hibernate state after 150 ms of idle time. This value is adjustable.

To determine the AH8 idle duration value (in microseconds), run the following SSH command on the host computer.
```
cat /sys/devices/platform/soc@0/1d84000.ufshc/auto_hibern8
```

This value can be decreased to reduce power consumption.

| | Clock gating |

When UFS device clocks are scaled up to maximum frequency due to the use case, clocks are gated after 50 ms of idle duration.

If clocks are scaled down to optimal frequency, clocks are gated after 10 ms of idle duration. To check clock gating enabled/disabled status, run the following SSH command on the host computer.
```
cat /sys/devices/platform/soc@0/1d84000.ufshc/clkgate_enable
```

Clock gating is enabled by default.

To debug UFS device issues related to clock gate or ungate and to disable the clock gating, run the following SSH command on the host computer.

>
>
> echo 0 > /sys/devices/platform/soc@0/1d84000.ufshc/clkgate_enable
> Copy to clipboard | | Clock scaling |

After the UFS device load exceeds the upthreshold value, the clock frequency is set to the maximum frequency with clock scale up.

Clock scale-down occurs when the load is lower than the threshold. The UFS device operations determines its load. To check the clock scaling status, run the following SSH command on the host computer.

>
>
> cat /sys/devices/platform/soc@0/1d84000.ufshc/clkscale_enable
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Clock scaling is enabled by default.

Disabling clock scaling can result in increased power consumption. To debug any issue related to clock scaling, run the following SSH command on the host computer.
```
echo 0 > /sys/devices/platform/soc@0/1d84000.ufshc/clkscale_enable
```

| | Runtime suspend or resume |

UFS device enters the runtime suspend state after 3 seconds of inactivity.

Runtime resume state occurs with the next UFS device operation. This state is enabled by default and is not configurable.

| | System suspend or resume |

UFS device enters the system suspend with the suspend event.

UFS device resume state occurs with the system resume event.

This state is enabled by default and is not configurable.

| Last Published: Mar 12, 2026 [Previous Topic Configure storage features](https://docs.qualcomm.com/bundle/publicresource/80-80021-6/topics/configuration.md) [Next Topic Enable SDHCI using kernel configuration](https://docs.qualcomm.com/bundle/publicresource/80-80021-6/topics/linux-device-tree.md)