# Configure battery overcurrent and undervoltage alarms The Qualcomm PMIC battery current limit (BCL) hardware monitor driver enables real-time detection of battery overcurrent (discharge) and undervoltage conditions. Integrated directly to the Qualcomm PMICs, this driver plays a critical role in safeguarding the battery and overall system by responding to damaging electrical events. The BCL hardware monitors battery voltage and current using dedicated sensing channels with configurable threshold values. It supports multiple alarm levels, each associated with an independent interrupt line. Table: BCL alarm features | **Alarms** | **Threshold levels** | **Interrupt line** | | --- | --- | --- | | Level 0 (LVL0) | Maximum/Minimum threshold | Mapped to `hwmon min/max` | | Level 1 (LVL1) | Critical threshold | Mapped to `hwmon lcrit/crit` | The BCL hardware operates in two distinct modes: Table: BCL alarm features | **BCL modes** | **Description** | | --- | --- | | BCL in Battery PMIC | Supports both undervoltage and overcurrent monitoring | | BCL in Core PMIC | Supports only undervoltage monitoring | When the driver is loaded, it detects the sensors present on the system and creates corresponding `sysfs` attributes under `/sys/class/hwmon/hwmon/`, where `` is an index assigned based on the presence and order of other `hwmon` devices in the system. **Battery PMIC attributes** The following attributes are supported for BCL in Battery PMIC (for example, PM7250B): Table: Supported BCL attributes in Battery PMIC | **PMIC name** | **Perm** | **Description** | | --- | --- | --- | | `curr1_input` | Read-only (RO) | Current in milliamperes (mA) | | `curr1_label` | RO | Current sensor label | | `curr1_max` | Read/Write (RW) | Level 0 current threshold in mA | | `curr1_max_alarm` | RO | Level 0 high current alarm status | | `curr1_crit` | RW | Level 1 current threshold in mA | | `curr1_crit_alarm` | RO | Level 1 high current alarm status | | `in0_input` | RO | Voltage in millivolts (mV) | | `in0_label` | RO | Voltage sensor label | | `in0_min` | RW | Level 0 low voltage threshold in mV | | `in0_min_alarm` | RO | Level 0 low voltage alarm status | | `in0_lcrit` | RW | Level 1 low voltage threshold in mV | | `in0_lcrit_alarm` | RO | Level 1 low voltage alarm status | Note - Alarm attributes are automatically updated when thresholds are exceeded - Threshold values can be configured at runtime through the RW attributes Following are the examples of `sysfs` structure for Battery PMIC: -rw-r--r-- 1 root root 4096 Jan 1 00:05 curr1_crit -r--r--r-- 1 root root 4096 Jan 1 00:05 curr1_crit_alarm -r--r--r-- 1 root root 4096 Jan 1 00:05 curr1_input -r--r--r-- 1 root root 4096 Jan 1 00:05 curr1_label -rw-r--r-- 1 root root 4096 Jan 1 00:05 curr1_max -r--r--r-- 1 root root 4096 Jan 1 00:05 curr1_max_alarm lrwxrwxrwx 1 root root 0 Jan 1 00:05 device -> ../../../c440000.spmi:pmic@8:bcl@1d00 -r--r--r-- 1 root root 4096 Jan 1 00:05 in0_input -r--r--r-- 1 root root 4096 Jan 1 00:05 in0_label -rw-r--r-- 1 root root 4096 Jan 1 00:05 in0_lcrit -r--r--r-- 1 root root 4096 Jan 1 00:05 in0_lcrit_alarm -rw-r--r-- 1 root root 4096 Jan 1 00:05 in0_min -r--r--r-- 1 root root 4096 Jan 1 00:05 in0_min_alarm -r--r--r-- 1 root root 4096 Jan 1 00:05 name Copy to clipboard **Core PMIC attributes** The following attributes are supported for BCL in Core PMIC (for example, PM8350C): Table: Supported BCL attributes in Core PMIC | **PMIC name** | **Perm** | **Description** | | --- | --- | --- | | `in0_label` | RO | Voltage sensor label | | `in0_min` | RW | Level 0 low voltage threshold in mV | | `in0_min_alarm` | RO | Level 0 low voltage alarm status | | `in0_lcrit` | RW | Level 1 low voltage threshold in mV | | `in0_lcrit_alarm` | RO | Level 1 low voltage alarm status | Note - Alarm attributes are automatically updated when thresholds are exceeded - Threshold values can be configured at runtime through the RW attributes The following are the examples of `sysfs` structure for Core PMIC: -r--r--r-- 1 root root 4096 Jan 1 00:03 in0_label -rw-r--r-- 1 root root 4096 Jan 1 00:03 in0_lcrit -r--r--r-- 1 root root 4096 Jan 1 00:03 in0_lcrit_alarm -rw-r--r-- 1 root root 4096 Jan 1 00:03 in0_min -r--r--r-- 1 root root 4096 Jan 1 00:03 in0_min_alarm -r--r--r-- 1 root root 4096 Jan 1 00:03 name lrwxrwxrwx 1 root root 0 Jan 1 00:03 of_node -> Copy to clipboard To know more about Qualcomm PMIC BCL, see [Patch series of Qualcomm PMIC BCL](https://lore.kernel.org/all/20260206-qcom-bcl-hwmon-v1-0-7b426f0b77a1@oss.qualcomm.com/) . ## Next steps > > > - [Configure a thermal zone](https://docs.qualcomm.com/doc/80-80022-30/topic/customize.html#thermal-zone) > - [Regulate temperature with fan controller](https://docs.qualcomm.com/doc/80-80022-30/topic/fan-controller.html#fan-controller) > - [Configure ThermalD](https://docs.qualcomm.com/doc/80-80022-30/topic/thermalD.html#thermald) Last Published: May 06, 2026 [Previous Topic Optimize performance with thermal tuning](https://docs.qualcomm.com/bundle/publicresource/80-80022-30/topics/thermal-tuning.md) [Next Topic Configure a thermal zone](https://docs.qualcomm.com/bundle/publicresource/80-80022-30/topics/customize.md)