# Overview of peripheral interfaces Source: [https://docs.qualcomm.com/doc/80-80022-8/topic/overview-of-wired-interfaces.html](https://docs.qualcomm.com/doc/80-80022-8/topic/overview-of-wired-interfaces.html) The Qualcomm® Linux® interfaces guide describes both the low-speed and high-speed input/output (I/O) peripheral interface subsystems used in the System-on-Chip (SoC). - The low-speed I/O interfaces operate at a lower frequency than the high-speed interfaces in the SoC. The Qualcomm universal peripheral (QUP) v3 serial engine is a hardware core that supports the following low-speed peripheral interfaces: - Universal asynchronous receiver/transmitter ([UART](https://docs.qualcomm.com/doc/80-80022-8/topic/uart.html)) - Serial peripheral interface ([SPI](https://docs.qualcomm.com/doc/80-80022-8/topic/spi.html)) - Interintegrated circuit ([I2C](https://docs.qualcomm.com/doc/80-80022-8/topic/i2c.html)) - Improved interintegrated circuit ([I3C](https://docs.qualcomm.com/doc/80-80022-8/topic/i3c.html)) These low-speed interfaces communicate with low-speed peripherals, such as sensor interface devices, Bluetooth® wireless technology devices, display or touch interface devices. - The high-speed I/O interfaces include the following peripheral interfaces: - Peripheral component interconnect express ([PCIe](https://docs.qualcomm.com/doc/80-80022-8/topic/pcie.html)) - Universal serial bus ([USB](https://docs.qualcomm.com/doc/80-80022-8/topic/usb.html)) The high-speed I/O interfaces are used to connect to high-speed devices, such as solid-state drives, network cards, external graphics cards. ## Peripheral interfaces software stack The following figure shows the software stack for peripheral interfaces. Figure : Peripheral interfaces software stack high level (high-level view) **Application to QUP GENI hardware (high-level Linux flow)** In Linux, applications communicate with peripherals through standard user‑space interfaces provided by the kernel, such as `/dev` nodes or subsystem APIs. The flow works as follows: 1. Application layer - An application issues a request using a standard user‑space interface. - The request enters the kernel through a system call. 2. Kernel core framework - The kernel routes the request to the relevant subsystem, such as: - I2C - SPI - I3C - TTY - The subsystem performs the following functions: - Provides protocol‑aware abstractions - Manages synchronization and concurrency - Integrates power‑management hooks - Offers a uniform programming interface to clients 3. Protocol controller driver - The core framework calls the protocol controller driver. - The driver translates framework‑level operations into hardware‑specific commands. 4. QUPv3 GENI Serial Engine (Qualcomm platforms) - The controller driver programs the QUPv3 GENI serial engine. - GENI implements the selected protocol (I2C, SPI, I3C, or UART) using: - Configured transfer modes - Protocol firmware 5. GENI hardware execution - Performs register‑level operations. - Moves data between the system and the external device. Throughout this process, the kernel framework retains control over: - Driver and device lifecycle management - Concurrency handling - Power state coordination across the stack The following figure shows the Linux flow from application to QUP-GENI hardware. Figure : Peripheral interfaces software stack high level (low-level view) ## QUP v3 Qualcomm uses QUP v3, a highly flexible and programmable hardware to support a wide range of serial interfaces. For more information about QUP v3, see the following resources: - [QUP v3 overview](https://docs.qualcomm.com/doc/80-80022-8/topic/references.html#introduction-to-qup-v3) - [Supported transfer modes in QUP v3](https://docs.qualcomm.com/doc/80-80022-8/topic/references.html#qup-v3-supported-transfer-modes) - [QUP v3 access control customization](https://docs.qualcomm.com/doc/80-80022-8/topic/references.html#customize-access-control-of-qup) - [QUP v3 firmware status verification](https://docs.qualcomm.com/doc/80-80022-8/topic/references.html#verify-qup-firmware-status) Note: - The source code for boot and aDSP subsystems is available to licensed developers with authorized access. - See [Hardware SoCs](https://docs.qualcomm.com/bundle/publicresource/topics/80-80022-115/soc.html) that are supported on Qualcomm Linux. This guide is your primary resource for information about enabling low-speed and high-speed I/O interfaces and making configuration changes. Note: Across this guide, `` refers to QCS6490, QCS5430, Qualcomm Dragonwing™ IQ-9075, Qualcomm Dragonwing™ IQ-8275, or Qualcomm Dragonwing™ IQ-615. For example, for arch/arm64/boot/dts/qcom/<chipset>.dts, the corresponding device tree source (DTS) file is at [https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts](https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts) or [https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sa8775p.dtsi](https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sa8775p.dtsi) or [https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git/tree/arch/arm64/boot/dts/qcom/qcs615.dtsi?h=arm64-for-6.16](https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git/tree/arch/arm64/boot/dts/qcom/qcs615.dtsi?h=arm64-for-6.16). - **[QCS6490 and QCS5430 interfaces overview](https://docs.qualcomm.com/doc/80-80022-8/topic/qcs6490-and-qcs5430-interface-overview.html)** - **[Dragonwing IQ-9075 interface overview](https://docs.qualcomm.com/doc/80-80022-8/topic/qcs9075-interface-overview.html)** - **[Dragonwing IQ-8275 interface overview](https://docs.qualcomm.com/doc/80-80022-8/topic/qcs8275-interface-overview.html)** - **[Dragonwing IQ-615 interface overview](https://docs.qualcomm.com/doc/80-80022-8/topic/iq-615-interface-overview.html)** Last Published: May 07, 2026 [Previous Topic Interfaces documentation](https://docs.qualcomm.com/bundle/publicresource/80-80022-8/topics/interface-documentation.md) [Next Topic QCS6490 and QCS5430 interfaces overview](https://docs.qualcomm.com/bundle/publicresource/80-80022-8/topics/qcs6490-and-qcs5430-interface-overview.md)