# Qualcomm universal peripheral (QUP)

Source: [https://docs.qualcomm.com/doc/80-88500-1/topic/16_Qualcomm_universal_peripheral__QUP_.html](https://docs.qualcomm.com/doc/80-88500-1/topic/16_Qualcomm_universal_peripheral__QUP_.html)

The Qualcomm universal peripheral (QUP) v3 is a programmable module that supports a wide range of serial interfaces, such as UART, SPI, I^2^C, and I3C. The QUP v3 supports access from multiple hardware entities in the system. Each entity has its own execution environment, separated address space, and an interrupt line. The interaction between the QUP v3 and the hardware entities occurs through system memory using the general-purpose interface (GPI) software.

A single QUP v3 module provides up to eight serial interfaces using its internal serial engines (SEs). The Qualcomm^®^ Robotics RB5 device contains 28 QUPs: 20 QUPs for GPIO and 8 QUPs for the sensor low-power island (SLPI).

The following table shows the configuration of 20 QUPs for GPIO:

| BLSP instance | REG ADDR, size | GPIO# | BLSP assignment | BLSP assignment | BLSP assignment | Protocol used | Mode |
| --- | --- | --- | --- | --- | --- | --- | --- |
| BLSP instance | REG ADDR, size | GPIO# | SPI | UART | I^2^C | QRB5165 |  |
| QUP SE 0 (I3C) | 0x980000, 0x4000 | 28 | MOSI | CTS | SDA | SPI to CAN MOSI | GSI |
| QUP SE 0 (I3C) | 0x980000, 0x4000 | 29 | MISO | RFR | SCL | SPI to CAN MISO | GSI |
| QUP SE 0 (I3C) | 0x980000, 0x4000 | 30 | CLK | Tx | – | SPI to CAN CLK | GSI |
| QUP SE 0 (I3C) | 0x980000, 0x4000 | 31 | CSn | Rx | – | SPI to CAN CSn | GSI |
| QUP SE 1 (I3C) | 0x984000, 0x4000 | 4 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 1 (I3C) | 0x984000, 0x4000 | 5 | MISO | RFR | SCL | – | FIFO |
| QUP SE 1 (I3C) | 0x984000, 0x4000 | 6 | Clock | Tx | – | – | FIFO |
| QUP SE 1 (I3C) | 0x984000, 0x4000 | 7 | CSn | Rx | – | – | FIFO |
| QUP SE 2 | 0x988000, 0x4000 | 115 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 2 | 0x988000, 0x4000 | 116 | MISO | RFR | SCL | – | FIFO |
| QUP SE 2 | 0x988000, 0x4000 | 117 | CLK | Tx | – | – | FIFO |
| QUP SE 2 | 0x988000, 0x4000 | 118 | CSn | Rx | – | – | FIFO |
| QUP SE 3 | 0x98c000, 0x4000 | 119 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 3 | 0x98c000, 0x4000 | 120 | MISO | RFR | SCL | – | FIFO |
| QUP SE 3 | 0x98c000, 0x4000 | 121 | CLK | Tx | – | – | FIFO |
| QUP SE 3 | 0x98c000, 0x4000 | 122 | CSn | Rx | – | – | FIFO |
| QUP SE 4 | 0x990000, 0x4000 | 8 | MOSI | CTS | SDA | I^2^C | FIFO |
| QUP SE 4 | 0x990000, 0x4000 | 9 | MISO | RFR | SCL | I^2^C | FIFO |
| QUP SE 4 | 0x990000, 0x4000 | 10 | CLK | Tx | – | – | FIFO |
| QUP SE 4 | 0x990000, 0x4000 | 11 | CSn | Rx | – | – | FIFO |
| QUP SE 5 | 0x994000, 0x4000 | 12 | MOSI | CTS | SDA | I^2^C (LT9611 and USB hub) | FIFO |
| QUP SE 5 | 0x994000, 0x4000 | 13 | MISO | RFR | SCL | I^2^C (LT9611 and USB hub) | FIFO |
| QUP SE 5 | 0x994000, 0x4000 | 14 | CLK | Tx | – | – | FIFO |
| QUP SE 5 | 0x994000, 0x4000 | 15 | CS\_N | Rx | – | – | FIFO |
| QUP SE 6 | 0x998000, 0x4000 | 16 | MOSI | CTS | SDA | Bluetooth^®^ UART #0 CTS | FIFO |
| QUP SE 6 | 0x998000, 0x4000 | 17 | MISO | RFR | SCL | Bluetooth UART #0 RFR | FIFO |
| QUP SE 6 | 0x998000, 0x4000 | 18 | CLK | Tx | – | Bluetooth UART #0 Tx | FIFO |
| QUP SE 6 | 0x998000, 0x4000 | 19 | CS\_N | Rx | – | Bluetooth UART #0 Rx | FIFO |
| QUP SE 7 | 0x99c000, 0x4000 | 20 | MOSI | CTS | SDA | – | – |
| QUP SE 7 | 0x99c000, 0x4000 | 21 | MISO | RFR | SCL | – | – |
| QUP SE 7 | 0x99c000, 0x4000 | 22 | CLK | Tx | – | – | – |
| QUP SE 7 | 0x99c000, 0x4000 | 23 | CS\_N | Rx | – | – | – |
| QUP SE 8 (I3C) | 0xa80000, 0x4000 | 24 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 8 (I3C) | 0xa80000, 0x4000 | 25 | MISO | RFR | SCL | – | FIFO |
| QUP SE 8 (I3C) | 0xa80000, 0x4000 | 26 | CLK | Tx | – | – | FIFO |
| QUP SE 8 (I3C) | 0xa80000, 0x4000 | 27 | CS\_N | Rx | – | – | FIFO |
| QUP SE 9 | 0xa84000,0x4000 | 125 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 9 | 0xa84000,0x4000 | 126 | MISO | RFR | SCL | – | FIFO |
| QUP SE 9 | 0xa84000,0x4000 | 127 | CLK | Tx | – | – | FIFO |
| QUP SE 9 | 0xa84000,0x4000 | 128 | CS\_N | Rx | – | – | FIFO |
| QUP SE 10 | 0xa88000, 0x4000 | 129 | MOSI | CTS | SDA | – | – |
| QUP SE 10 | 0xa88000, 0x4000 | 130 | MISO | RFR | SCL | – | – |
| QUP SE 10 | 0xa88000, 0x4000 | 131 | CLK | Tx | – | – | – |
| QUP SE 10 | 0xa88000, 0x4000 | 132 | CS\_N | Rx | – | – | – |
| QUP SE 11 | 0xa8c000, 0x4000 | 60 | MOSI | CTS | SDA | – | – |
| QUP SE 11 | 0xa8c000, 0x4000 | 61 | MISO | RFR | SCL | – | – |
| QUP SE 11 | 0xa8c000, 0x4000 | 62 | CLK | Tx | – | – | – |
| QUP SE 11 | 0xa8c000, 0x4000 | 63 | CS\_N | Rx | – | – | – |
| QUP SE 12 | 0xa90000, 0x4000 | 32 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 12 | 0xa90000, 0x4000 | 33 | MISO | RFR | SCL | – | FIFO |
| QUP SE 12 | 0xa90000, 0x4000 | 34 | CLK | Tx | – | Debug UART | FIFO |
| QUP SE 12 | 0xa90000, 0x4000 | 35 | CS\_N | Rx | – | Debug UART | FIFO |
| QUP SE 13 | 0xa94000, 0x4000 | 36 | MOSI | CTS | SDA | UART | FIFO |
| QUP SE 13 | 0xa94000, 0x4000 | 37 | MISO | RFR | SCL | UART | FIFO |
| QUP SE 13 | 0xa94000, 0x4000 | 38 | CLK | Tx | – | UART | FIFO |
| QUP SE 13 | 0xa94000, 0x4000 | 39 | CS\_N | Rx | – | UART | FIFO |
| QUP SE 14 (I3C) | 0x880000, 0x4000 | 40 | MOSI | CTS | SDA | SPI | FIFO |
| QUP SE 14 (I3C) | 0x880000, 0x4000 | 41 | MISO | RFR | SCL | SPI | FIFO |
| QUP SE 14 (I3C) | 0x880000, 0x4000 | 42 | CLK | Tx | – | SPI | FIFO |
| QUP SE 14 (I3C) | 0x880000, 0x4000 | 43 | CS\_N | Rx | – | SPI | FIFO |
| QUP SE 15 | 0x884000, 0x4000 | 44 | MOSI | CTS | SDA | I^2^C SDA | GSI |
| QUP SE 15 | 0x884000, 0x4000 | 45 | MISO | RFR | SCL | I^2^C SCL | GSI |
| QUP SE 15 | 0x884000, 0x4000 | 46 | CLK | Tx | – | – | GSI |
| QUP SE 15 | 0x884000, 0x4000 | 47 | CS\_N | Rx | – | – | GSI |
| QUP SE 16 | 0x888000, 0x4000 | 48 | MOSI | CTS | SDA | – | FIFO |
| QUP SE 16 | 0x888000, 0x4000 | 49 | MISO | RFR | SCL | – | FIFO |
| QUP SE 16 | 0x888000, 0x4000 | 50 | CLK | Tx | – | – | FIFO |
| QUP SE 16 | 0x888000, 0x4000 | 51 | CS\_N | Rx | – | – | FIFO |
| QUP SE 17 | 0x88c000, 0x4000 | 52 | MOSI | CTS | SDA | SPI | GSI |
| QUP SE 17 | 0x88c000, 0x4000 | 53 | MISO | RFR | SCL | SPI | GSI |
| QUP SE 17 | 0x88c000, 0x4000 | 54 | CLK | Tx | – | SPI | GSI |
| QUP SE 17 | 0x88c000, 0x4000 | 55 | CS\_N | Rx | – | SPI | GSI |
| QUP SE 18 | 0x890000, 0x4000 | 56 | MOSI | CTS | SDA | – | – |
| QUP SE 18 | 0x890000, 0x4000 | 57 | MISO | RFR | SCL | – | – |
| QUP SE 18 | 0x890000, 0x4000 | 58 | CLK | Tx | – | – | – |
| QUP SE 18 | 0x890000, 0x4000 | 59 | CS\_N | Rx | – | – | – |
| QUP SE 19 | 0x894000, 0x4000 | 0 | MOSI | CTS | SDA | – | – |
| QUP SE 19 | 0x894000, 0x4000 | 1 | MISO | RFR | SCL | – | – |
| QUP SE 19 | 0x894000, 0x4000 | 2 | CLK | Tx | – | – | – |
| QUP SE 19 | 0x894000, 0x4000 | 3 | CS\_N | Rx | – | – | – |
|  |  |  |  |  |  |  |  |
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The following table shows the QUP configuration of the Qualcomm^®^ Snapdragon™ Sensors Core (SSC) on the Qualcomm Robotics RB5 device:

| SSC QUP lane to GPIO mapping | SSC QUP lane to GPIO mapping | SSC QUP lane to GPIO mapping | SSC QUP lane to GPIO mapping | SSC QUP lane to GPIO mapping | SSC QUP lane to GPIO mapping |
| --- | --- | --- | --- | --- | --- |
| SSC QUP | L0 | L1 | L2 | L3 | L4 |
| SSC\_QUP\_2 | GPIO\_164 | GPIO\_165 | GPIO\_166 | GPIO\_167 | – |

- **[Verify QUP firmware readiness](https://docs.qualcomm.com/doc/80-88500-1/topic/17_Check_QUP_firmware_readiness.html)**
- **[Customize access control for QUPs](https://docs.qualcomm.com/doc/80-88500-1/topic/18_Customize_access_control_for_QUPs.html)**
- **[UART in QUP](https://docs.qualcomm.com/doc/80-88500-1/topic/29_UART_in_QUP_v3.html)**
- **[SPI in QUP](https://docs.qualcomm.com/doc/80-88500-1/topic/30_SPI_in_QUP_v3.html)**
- **[I2C in QUP](https://docs.qualcomm.com/doc/80-88500-1/topic/41_I2C_in_QUP_v3.html)**
- **[QUPs in HLOS](https://docs.qualcomm.com/doc/80-88500-1/topic/53_QUPs_in_HLOS.html)**
- **[QUPs in TrustZone](https://docs.qualcomm.com/doc/80-88500-1/topic/54_QUPs_in_TrustZone.html#QUPs_in_TrustZone_54)**
- **[Debug sensor core](https://docs.qualcomm.com/doc/80-88500-1/topic/57_Debug_sensors_core.html)**

Last Published: Aug 18, 2023

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