# Add delay between SPI\_CS asserting pin and SPI\_CLK

Source: [https://docs.qualcomm.com/doc/80-88500-1/topic/32_Add_delay_time_between_SPI_CS_asserting_pin_and_SPI_CLK.html](https://docs.qualcomm.com/doc/80-88500-1/topic/32_Add_delay_time_between_SPI_CS_asserting_pin_and_SPI_CLK.html)

## Before you begin
Determine the duration of delay
      required between the `SPI_CS asserting` pin turning high and the enabling of
        `SPI_CLK`.

## About this task

To add the delay duration between `SPI_CS asserting` pin and
          `SPI_CLK`, do the following:

## Procedure

1. Include the header file include/Linux/spi/spi-geni-qcom.h.
2. Populate the data structure `spi_geni_qcom_ctrl_data` for both the SPI
          clock cycles. 
        
struct spi_geni_qcom_ctrl_data
        { 
         u32 spi_cs_clk_delay; 
         u32 spi_inter_words_delay; 
         };Copy to clipboard
3. Assign this data structure to the `controller_data  void * pointer` in
          `struct spi_device{}`.

**Parent Topic:** SPI in QUP

Last Published: Aug 18, 2023

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