# Debug BCM (RPMh hardware block)

Source: [https://docs.qualcomm.com/doc/80-88500-3/topic/debugging_bcm_rpmh_hardware_block.html](https://docs.qualcomm.com/doc/80-88500-3/topic/debugging_bcm_rpmh_hardware_block.html)

The bus clock manager (BCM) handles shared clock, power domains, and memory controller hints.
      The vote units are domain-specific. 
- Bandwidth
- Latency
- Other

## Resources

- System bus clock and domains
    - System `NoCand` aggregation NoCs
    - Memory NoC
    - Multimedia NoC
    - Configuration NoC
- Other shared clock resources
    - Qualcomm universal peripheral (QUP) v3
    - IPA
    - Crypto

## Debug scenarios

The CMM script checks the following when it parses for each resource (for example, BCM or virtual clock domain (VCD)).

- General status
- Vote from each client
- Internal state

The following are the example debug scenarios:

- BCM is stuck – check BCM state for the VCD
- BCM aggregated state is not expected
    - Check aggregated state for the VCD
    - Check BCM vote tables for which VCD is driving the votes

## Dump script

The `BCMDump.cmm [<output dir>]` script dumps information for each VCD and BCM instance. If the output file not specified, it dumps the output on the TRACE32 area.

The following is the list of VCDs.

| MC | 0 |
| :---: | :---: |
| SHUB | 1 |
| SHRM | 2 |
| SNoC | 3 |
| MMNoC | 4 |
| CNoC | 5 |
| Crypto | 6 |
| IPA | 7 |
| QUP | 8 |
| DDR\_SS | 10 |
| Active client vector | 11 |
| Unused | 9, 12–15 |

The following is the dump script.

    BCM Front End:
    VCD0: AGG_BW: 0x1533 FINAL_CP: 0x8 AGG_CP 0x8
    ...
    BCM SNDs:
    SND0: SEL_CP: 0x0
    ...
    BCM Back End:
    VCD0: CLK_DEST_STATE: 0x8 COMBINED_CP: 0x8 SW_CP_SNAP: 0x0 WRITTEN_CP: 0x8 CURR_CP: 0x8
    ...
    BCM Back End Sequencers:
    VCD0: IDLE: 0x1 CURR_PC: 0x3E
    ...
    Vote Table for DRV ID: 0
    Vote Table for DRV ID: 1
    Vote Table for DRV ID: 2
    BCM0: VALID: 0x1 VOTE_X: 0x0 VOTE_Y: 0x1533
    BCM3: VALID: 0x1 VOTE_X: 0x0 VOTE_Y: 0x8
    ...Copy to clipboard

## BCM front end and back end

The BCM front end contains information about the status of the following VCDs:

- Aggregated bandwidth value (AGG\_BW)
- Final selected clock plan (FINAL\_CP) and aggregation of SND CP and aggregated CP (AGG\_CP); AGG\_CP selection is based on AGG\_BW
- Script:

        VCD0: AGG_BW: 0x1533 FINAL_CP: 0x8 AGG_CP 0x8
        VCD1: AGG_BW: 0x1900 FINAL_CP: 0x5 AGG_CP 0x5
        ...Copy to clipboard

Sel\_CP is a BCM special node CP selection, based on the latency vote and current voted load.

    BCM SNDs:
    SND0: SEL_CP: 0x0
    SND1: SEL_CP: 0x0
    ...Copy to clipboard

The following are the states in the BCM back end, according to the VCD status:

- CLK\_DEST\_STATE – next-selected CP
- COMBINED\_CP – combined software and hardware-selected CP
- SW\_CP\_SNAP – software override CP selection (uncommon)
- WRITTEN\_CP – current CP written out of BCM
- CURR\_CP – current and acknowledged CP

The following is the script for the BCM back end.

    VCD0: CLK_DEST_STATE: 0x8 COMBINED_CP: 0x8 SW_CP_SNAP: 0x0 WRITTEN_CP: 0x8 CURR_CP: 0x8
    VCD1: CLK_DEST_STATE: 0x5 COMBINED_CP: 0x5 SW_CP_SNAP: 0x0 WRITTEN_CP: 0x5 CURR_CP: 0x5
    ...Copy to clipboard

The following list provides the back-end sequencer status:

- Idle
- 0 × 1 = not busy
- CURR\_PC
- Single instruction past the last run instruction

The following is the script for the back-end sequencer status:

    VCD0: IDLE: 0x1 CURR_PC: 0x3E
    VCD1: IDLE: 0x1 CURR_PC: 0x3E
    ...Copy to clipboard

## Vote table

The following list provides the BCM vote status per DRV:

- VALID – vote validity
- VOTE\_X – resource-dependent, but it is usually AB
- VOTE\_Y – resource-dependent, but it is usually IB

The following is the script to identify BCM vote status.

    Vote Table for DRV ID: 0
    Vote Table for DRV ID: 1
    Vote Table for DRV ID: 2
    BCM0: VALID: 0x1 VOTE_X: 0x0 VOTE_Y: 0x1533
    BCM3: VALID: 0x1 VOTE_X: 0x0 VOTE_Y: 0x8Copy to clipboard

**Parent Topic:** [RPMh debugging](https://docs.qualcomm.com/doc/80-88500-3/topic/81_RPMh_hardening_and_debugging_.html)

Last Published: Sep 26, 2023

[Previous Topic
Debug ARC (RPMh hardware block)](https://docs.qualcomm.com/bundle/publicresource/80-88500-3/topics/debugging_rpmh_hardware_block_arc.md) [Next Topic
Debug PDC (RPMh hardware block)](https://docs.qualcomm.com/bundle/publicresource/80-88500-3/topics/debugging_pdc_rpmh_hardware_block.md)