# Device tree configuration of SPI, UART, and I2C

Source: [https://docs.qualcomm.com/doc/80-88500-4/topic/105_Device_tree_configuration.html](https://docs.qualcomm.com/doc/80-88500-4/topic/105_Device_tree_configuration.html)

All the 20 instances of I2C and SPI, and 4 instances of UART are defined in the
      src/kernel/MSM-5.4/arch/arm64/boot/dts/vendor/qcom/kona-qupv3.dtsi
    file.

The status field for the required instances must be marked ok.

Example:

    qupv3_se0_i2c: i2c@XX0000 {
                  ……
                  ……
                  ……    status = “ok";           };
    Copy to clipboard

The QUPAC\_Access file in TZ at
        \trustzone\_images\core\settings\buses\qup\_accesscontrol\qupv3\config\8250\QUPAC\_Access.c
      must be modified in accordance with DTSI to select the required protocol.

Table : Device drivers

| Protocol | Driver path |
| --- | --- |
| UART | /kernel/drivers/tty/serial/msm\_geni\_serial.c |
| SPI | /kernel/drivers/spi/spi-geni-qcom.c |
| I2C | /kernel/drivers/i2c/busses/i2c-qcom-geni.c |

**Parent Topic:** [Bus protocols](https://docs.qualcomm.com/doc/80-88500-4/topic/103_Bus_protocols.html)

Last Published: Aug 18, 2023

[Previous Topic
QUP pin configuration](https://docs.qualcomm.com/bundle/publicresource/80-88500-4/topics/104_QUP_GPIO_assignment.md) [Next Topic
USB](https://docs.qualcomm.com/bundle/publicresource/80-88500-4/topics/106_USB.md)