# GPIO

Source: [https://docs.qualcomm.com/doc/80-88500-4/topic/18_Pin_I_O.html](https://docs.qualcomm.com/doc/80-88500-4/topic/18_Pin_I_O.html)

The QRB5165 SoC includes 180 general purpose input/output (GPIO) pins that can be
    configured to perform a variety of functions. The function of each GPIO pin is specified by the
    content of the corresponding GPIO configuration hardware register.

The software elements of the device abstraction layer (DAL) and hardware abstraction layer (HAL)
      control the content of the GPIO configuration hardware registers.

The GPIO customizations for customer development platforms are useful for initial development of
      the hardware application specific integrated circuit (ASIC) and understanding the software.
      This information can be used to configure the GPIOs.

- **[GPIO pad configuration](https://docs.qualcomm.com/doc/80-88500-4/topic/19_Hardware_overview.html)**  

The GPIO functionality has a corresponding pad configuration. A GPIO pin can be     configured as a general input, output, or one of several alternate functions.
- **[GPIO software driver code overview](https://docs.qualcomm.com/doc/80-88500-4/topic/21_Software_overview.html)**  

The GPIO (TLMM) driver is built on top of the hardware abstraction layer (HAL)     framework. This HAL software layer is placed between the hardware and the driver code. It is     designed to insulate the driver code from specific details of the underlying hardware and     provide portability with easy maintenance.
- **[GPIO hardware abstraction layer](https://docs.qualcomm.com/doc/80-88500-4/topic/22_GPIO_HAL_and_DAL.html)**  

The hardware abstraction layer (HAL) is implemented in the software to conceal the     differences in the hardware from the operating system. HAL provides a consistent interface for     software applications that interact with the hardware peripherals.
- **[GPIO DAL driver](https://docs.qualcomm.com/doc/80-88500-4/topic/25_GPIO_DAL_driver.html)**  

The device abstraction layer (DAL) provides an interface to the top-level multiplexer mode (TLMM) driver. The TLMM driver provides an interface for other driver-layer modules to interact with the TLMM hardware block. This interface is the TLMM DAL interface.
- **[GPIO configuration in XBL](https://docs.qualcomm.com/doc/80-88500-4/topic/30_Customize_GPIO_in_XBL.html)**  

The GPIO configuration is completed based on the loading of the TLMM     driver.
- **[GPIO interrupt driver](https://docs.qualcomm.com/doc/80-88500-4/topic/31_GPIO_interrupt_driver.html)**  

Each GPIO can act as an interrupt source. The GPIO interrupt driver provides facility     for configuring the trigger type of a GPIO interrupt and enabling or disabling the GPIO     interrupt.

**Parent Topic:** [System](https://docs.qualcomm.com/doc/80-88500-4/topic/7_System.html)

Last Published: Aug 18, 2023

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