# Resource power manager hardening
Source: [https://docs.qualcomm.com/doc/80-88500-4/topic/45_RPMh.html](https://docs.qualcomm.com/doc/80-88500-4/topic/45_RPMh.html)
The resource power manager hardening (RPMh) is a hardware-based solution with software
assistance. With the hardware-accelerated transitions, RPMh achieves significant improvement in
transition latency.
The power and clocks for any shared resources that must be managed on a fine-grained dynamic
basis are managed either directly in the hardware or by the RPM. For example, clocks and power
for shared system buses should be managed either directly in hardware or by RPM.
RPMh solution provides the following benefits:
- Reduces existing transition timelines by making the systems at least 3 to 10 times
faster
- Improves days-of-use (DOU) by two-and-a-half percent
- Uses always-on processor (AOP) to facilitate debugging
Figure : RPMh architecture
| Architecture type | RPMh | Functionality |
| --- | --- | --- |
| Local | Solver (sensor and display only) (SLVR) | Sleep mode decision |
| Local | Resource state coordinator (RSC) | Subsystem resource-controlled
Sleep and awake states |
| Local | Power domain controller (PDC) | Subsystem sleep and wake-up including interrupt management |
| Global | Aggregated resource controller (ARC) | Shared voltage operating point control |
| Global | Bus clock manager (BCM) | Bus and memory clock control |
| Global | Voltage regulator manager (VRM) | Regulator, crystal oscillator (XO) buffer, and crystal control |
| Global | Power control bus (PCB) | Resource and power-controlled message passing |
| Global | AOP | Complex aggregation or dependency handling, and workarounds |
| | | |
| | | |
| | | |
| | | |
Direct resource voter (DRV) – RPMh-based masters:
- Applications (application processor)
- TZ
- Hypervisor
- HLOS
- LPASS
- Sensor
- Secure processor
- AOP
- GPU
- Display
DRV caters to resource dependencies for digital rails. For example, MX >= CX
Resources must vote using the address of the corresponding accelerators.
The CmdDB driver supports resource name to address mapping for an accelerator. CmdDB is in
the DDR-shared memory, and each subsystem has CmdDB APIs for the required information.
Table : Resource voters
| Resource | RPMh-based |
| --- | --- |
| CX, MX | ARC-handled resource |
| XO clock | ARC-handled resource |
| GFX | ARC-handled resource |
| Modem subsystem (MSS) | ARC-handled resource |
| Shared clocks (NoC, DDR) | BCM-handled resource |
| PMIC resources (SMPS, LDO) | VRM-handled resource |
Table : RPMh tasks
| Task | RPMh |
| --- | --- |
| Immediate request for a resource | Write to RSC TSC register and send packet to AOP (RPMh driver in each
subsystem) |
| Shut down or wake-up request | Subsystem RSC > subsystem PDC |
| Wakeup-capable interrupt support | PDC interrupt controller |
| Active or sleep set information | Stored at the subsystem end (RPMh driver in each subsystem) |
| Railway driver | PDC of the subsystem receives the packet and routes it to ARC
Hardware-based ARC aggregation and handling |
| core power reduction (CPR) driver | Hardware-based CPR interrupt handling |
| Clock or bus driver | Hardware-based BCM aggregation and handling
(RSC > PDC > BCM) |
| PMIC driver | Hardware-based VRM aggregation and handling
RSC > PDC > VRM) |
| DDR low-power modes | Hardware-based DDR\_AUX notifications to SHRM |
| Latest state of resource | Hardware accelerator register configuration
(ARC, CPRF, BCM, and VRM) |
| Vdd minimization | Hardware-based ARC aggregation and handling |
| Always-on subsystem (AOSS) sleep | AOP software handling |
- **[Regulator management](https://docs.qualcomm.com/doc/80-88500-4/topic/46_Regulator_management.html)**
The regulator control can take place through vote on digital voltage domain, vote on regulator, and core power reduction (CPR) micro adjustments.
- **[Frequency management](https://docs.qualcomm.com/doc/80-88500-4/topic/47_Frequency_management.html)**
The frequency control is done through bandwidth vote and memory controller.
- **[Sleep management](https://docs.qualcomm.com/doc/80-88500-4/topic/48_Sleep_management.html)**
The RPMh sleep management is done through the sleep enter and sleep exit workflows.
- **[SoC sleep](https://docs.qualcomm.com/doc/80-88500-4/topic/49_SoC_sleep.html)**
The SoC resource sleep states are independent. In RPMh, there are no sleep modes.
**Parent Topic:** [Power](https://docs.qualcomm.com/doc/80-88500-4/topic/38_Power.html)
Last Published: Aug 18, 2023
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