# Limits management hardening
Source: [https://docs.qualcomm.com/doc/80-88500-4/topic/55_Limits_management_hardening.html](https://docs.qualcomm.com/doc/80-88500-4/topic/55_Limits_management_hardening.html)
The limits management hardening (LMH) is a hardware-based protection circuit.
LMH adds to the device reliability and robustness by doing the
following:
- Managing the peak current consumed by the CPU subsystem within the specified capability of the
PMIC supply rail
- Providing fast thermal management response if any CPUs are overheated; this applies to both
power and performance clusters
LMH dynamic clock voltage scaling hardening (DCVSh) enables the CPU rail voltage to be scaled
lower at the hardware level based on the CPU clock frequency
As the LMH DCVSh kernel driver is deprecated, the HLOS (thermal core framework) no longer votes
for frequency changes to the LMH, but instead interacts directly with the CPUFreq driver.
Table : LMH feature summary
| Feature | CPU | GPU |
| --- | --- | --- |
| Peak current management | Yes
Applies only to Kryo Gold cluster | No |
| Thermal management | Yes
- Junction temperature management using the SS algorithm
- Applies to both clusters
| No
Thermal management is still handled by the thermal core software |
| Battery current limiting | Yes | Yes |
| VDD restriction | Yes | Yes |
**Parent Topic:** [Software thermal management](https://docs.qualcomm.com/doc/80-88500-4/topic/52_Software_thermal_management.html)
Last Published: Aug 18, 2023
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