# PCB layout guidelines

Source: [https://docs.qualcomm.com/doc/80-PV086-5P/topic/pcb-layout-guidelines.html](https://docs.qualcomm.com/doc/80-PV086-5P/topic/pcb-layout-guidelines.html)

- **[PCB floor plan recommendation (C-shape)](https://docs.qualcomm.com/doc/80-PV086-5P/topic/PCB-floor-plan-recommendation-%28C-shape%29.html)**
- **[PCB floor plan recommendation (H-shape)](https://docs.qualcomm.com/doc/80-PV086-5P/topic/PCB-floor-plan-recommendation-%28H-shape%29.html)**
- **[Landside capacitor (LSC) keepout area routing rules](https://docs.qualcomm.com/doc/80-PV086-5P/topic/LSC-keepout-area-routing-rules.html)**
- **[CXO and SLEEP_CLK routing](https://docs.qualcomm.com/doc/80-PV086-5P/topic/CXO-and-SLEEP_CLK-routing.html)**
- **[SS-USB and HS-USB with PHY layout guidelines](https://docs.qualcomm.com/doc/80-PV086-5P/topic/SS-USB-and-HS-USB-with-PHY-layout-guidelines.html)**
- **[HS-USB DP/DM line lengths](https://docs.qualcomm.com/doc/80-PV086-5P/topic/hs-usb-dp-dm-line-lengths.html)**
- **[USB 3.1/DisplayPort routing constraints](https://docs.qualcomm.com/doc/80-PV086-5P/topic/usb3dot1-displayport-routing-constraints.html)**
- **[USB 2.0 routing constraints](https://docs.qualcomm.com/doc/80-PV086-5P/topic/usb-2dot0-routing-constraints.html)**
- **[MIPI_CSI D-PHY routing constraints (up to 2.5 Gbps)](https://docs.qualcomm.com/doc/80-PV086-5P/topic/mipi-csi-d-phy-routing-constraints-up-to-2dot5-Gbps.html)**
- **[MIPI_DSI D-PHY routing constraints (up to 2.5 Gbps)](https://docs.qualcomm.com/doc/80-PV086-5P/topic/mipi-dsi-dphy-routing-constraints.html)**
- **[C-PHY (DSI and CSI) routing constraints](https://docs.qualcomm.com/doc/80-PV086-5P/topic/C-PHY%20%28DSI%20and%20CSI%29%20routing%20constraints.html)**
- **[PCIe layout guidelines](https://docs.qualcomm.com/doc/80-PV086-5P/topic/PCIe%20layout%20guidelines.html)**
- **[SDC2 external SD card routing constraints](https://docs.qualcomm.com/doc/80-PV086-5P/topic/SDC2%20external%20SD%20card%20routing%20constraints.html)**
- **[UFS routing constraints](https://docs.qualcomm.com/doc/80-PV086-5P/topic/UFS%20routing%20constraints.html)**
- **[SPMI layout rules](https://docs.qualcomm.com/doc/80-PV086-5P/topic/SPMI%20layout%20rules.html)**

**Parent Topic:** [Design guidelines](https://docs.qualcomm.com/doc/80-PV086-5P/topic/design-layout-guidelines.html)

Last Published: Jul 07, 2023

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