# Part reliability

Source: [https://docs.qualcomm.com/doc/80-WL743-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-WL743-1/topic/part-reliability.html)

## Reliability qualifications summary

Source: [https://docs.qualcomm.com/doc/80-WL743-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-WL743-1/topic/part-reliability.html)

Table : Silicon reliability results

| Tests, standards, and conditions | Sample size | Result |
| --- | :---: | :---: |
| **HTOL in FIT (ƛ) failure in billion device hours**<br><br><br>                            <br>HTOL: JESD22-A108<br><br><br>                            <br>(Total samples from two wafer lots) | 77 x 2 lots | Pass<br><br><br>                            <br>FIT &lt; 50 |
| **Mean time to failure (MTTF) t = 1/ ƛ in million hours**<br><br><br>                            <br>(Total samples from two wafer lots) | 77 x 2 lots | Pass<br><br><br>                            <br>&gt;20 |
| **ESD – human-body model (HBM) rating**<br><br><br>                            <br>JS-001-2017<br><br><br>                            <br>(Total samples from one wafer lot) | 3 | Pass +/-2 KV |
| **ESD – charged-device model (CDM) rating**<br><br><br>                            <br>JS-002-2018<br><br><br>                            <br>(Total samples from one wafer lot) | 3 | Pass +/-500 V |
| **Latch-up (I-test): EIA/JESD78**<br><br><br>                            <br>Trigger current: ±200 mA<br><br><br>                            <br>(Total samples from one wafer lot) | 3 | Pass |
| **Latch-up (Vsupply overvoltage): EIA/JESD78**<br><br><br>                            <br>Trigger voltage: Each VDD pin, stress at 1.5 x V<sub class="ph sub">ddmax</sub> per<br>                                device<br><br><br>                            <br>(Total samples from one wafer lot) | 3 | Pass |

Table : Package reliability results

| Tests, standards, and conditions | SPIL sample size | TFME sample size | Result |
| --- | :---: | :---: | :---: |
| **Moisture resistance test (MRT):** J-STD-020/JESD22-A113<br><br><br>                            <br>Pre-bake 125°C, 24 hours<br><br><br>                            <br>Moisture soak: 30°C &60% RH for 192 hours<br><br><br>                            <br>3 cycles IR reflow at 260°C | 231 x 1 lot | 231 x 1 lot | Pass |
| **Temperature cycle:** JESD22-A104<br><br><br>                            <br>Temperature: -65°C to 150°C; number of cycles: 1000<br><br><br>                            <br>Preconditioning: J-STD-020/JESD22-A113<br><br><br>                            <br>MSL3, reflow temperature: 260°C | 77 x 1 lot | 77 x 1 lot | Pass |
| **Unbiased highly accelerated stress test**: JESD22-A118<br><br><br>                            <br>130°C/85% RH and 192 hour duration<br><br><br>                            <br>Preconditioning: J-STD-020/JESD22-A113<br><br><br>                            <br>MSL3, reflow temperature: 260°C | 77 x 1 lot | 77 x 1 lot | Pass |
| **Biased highly accelerated stress test:** JESD22-A110<br><br><br>                            <br>130°C/85% RH and 96 hour duration<br><br><br>                            <br>Preconditioning: J-STD-020/JESD22-A113<br><br><br>                            <br>MSL3, reflow temperature: 260°C | 77 x 1 lot | 77 x 1 lot | Pass |
| **High-temperature storage life:** JESD22-A103<br><br><br>                            <br>Temperature 150°C and 1000 hours duration | 77 x 1 lot | 77 x 1 lot | Pass |

## Device characteristics

Source: [https://docs.qualcomm.com/doc/80-WL743-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-WL743-1/topic/part-reliability.html)

Table : Device characteristics

| Category | Definition |
| --- | --- |
| Device name | <ul class="ul" id="device-characteristics__ul_lvz_fyk_jzb"><br>                                    <li class="li"><span class="ph">QCC743</span></li><br><br>                                    <li class="li"><span class="ph">QCC744</span></li><br><br>                                </ul> |
| Package type | <ul class="ul" id="device-characteristics__ul_zrp_gyk_jzb"><br>                                    <li class="li">40-pin QFN (<span class="ph">QCC743</span>)</li><br><br>                                    <li class="li">56-pin QFN<span class="ph"> (<span class="ph">QCC744</span>)</span></li><br><br>                                </ul> |
| Package size | <ul class="ul" id="device-characteristics__ul_dgy_5yk_jzb"><br>                                    <li class="li">5 mm x 5 mm x 0.9 mm<br>                                            (<span class="ph">QCC743</span>)</li><br><br>                                    <li class="li">7 mm x 7 mm x 0.9 mm (<span class="ph">QCC744</span>)</li><br><br>                                </ul> |
| Fab process | 40 nm |
| Fab location | UMC |
| Assembly sites | <ul class="ul" id="device-characteristics__ul_sj4_ksh_pzb"><br>                                    <li class="li">SPIL, Suzhou</li><br><br>                                    <li class="li">TFME</li><br><br>                                </ul> |

Last Published: Apr 22, 2026

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