# Program images

Source: [https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html](https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html)

Program images include PBL, SBL, and APP images. See the following sections for details about the function, format, and runtime memory		status of each program image.

## PBL image

Source: [https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html](https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html)

The PBL image is in the PBL region of the RRAM, as shown in QCC730 memory and image structure.

	
Qualcomm owns the PBL image and programs it to the PBL region. Customers can't modify it.

	
### Function
				
The PBL image performs the following tasks:

		
- Handle different boot cases
- Choose SBL image from FDT
- Authenticate SBL image
- Load SBL image

	
### Image structure
				
Although the PBL image is locked and can't be modified after the chip leaves the factory,  a patch for the PBL image is allowed. The			patch file is built into the SBL image as an independent segment.

## SBL image

Source: [https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html](https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html)

The SBL image is stored in the SBL region of the RRAM. For more information, see QCC730 memory and image structure.

	
### Function
				
The SBL image performs the following tasks:

- Choose APP images according to the FDT
- Load APP images

	
### Image structure
				
QCC730 only supports SBL images that are in executable and linking format (ELF). Based on the content, an SBL image mainly includes several segments as shown in the following			figure.

		
Figure : SBL image structure						<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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- **Hash segment**: This segment includes information for the image signature and hash value of each segment.
- **Code/data segment**: These segments include sections of SBL TXT, data, and basic service set (BSS) section.
- **PBL patch segment**: This segment includes the patch for PBL.

	
### Memory layout for SBL
				
SBL runs in the RAM, which has a 64 KB space (`0x80000 to 0x8FFFF`) reserved for SBL.

		
Figure : SBL memory layout						<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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## APP image

Source: [https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html](https://docs.qualcomm.com/doc/80-Y8730-5/topic/program_images.html)

An APP bin image contains the final programs that run in RRAM, which has 1347 KB space (`0x222400` to `0x372FFF`) for APP.

	
### Function
				
An APP mainly includes functions such as WLAN, peripheral, and system.

	
### Image structure
				
Figure : APP image structure						<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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An APP bin image includes the following segments according to the content:

- **RRAM code segment**: These segments include sections of APP TXT running on RRAM.
- **RAM data segment**: These segments include sections of APP data and BSS on RAM.
- **BDF/REGDB/CALDB segment**: This segment includes the WLAN BDF, REGDB, and CALDB.

	
### Memory layout for APP image
				
When an APP image runs, each segment of the image is loaded to the corresponding memory address according to its virtual address.

		
The code and data segments executed in RAM is loaded from flash to RAM, and the code executed in RRAM and				REGDB/CALDB are loaded to RRAM.

		
The following diagram illustrates the layout of each memory in detail.

		
Figure : Memory layout for APP						<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<g>	<title>app_memory_layout</title>	<g id="shape105-1" transform="translate(0.375,-0.375)">		<title>Sheet.105</title>		<rect x="0" y="0.75001" width="436.125" height="454.125" rx="7.2" ry="7.2" class="st1"></rect>	</g>	<g id="shape1-3" transform="translate(32.818,-22.9803)">		<title>Sheet.1</title>		<desc>RRAM</desc>		<rect x="0" y="431.731" width="120.959" height="23.1443" class="st2"></rect>		<text x="40.98" y="447.2" class="st3">RRAM</text>		</g>	<g id="shape8-6" transform="translate(26.047,-51.0537)">		<title>Sheet.8</title>		<rect x="0" y="145.929" width="137.262" height="308.946" class="st4"></rect>	</g>	<g id="shape15-8" transform="translate(34.1985,-55.9279)">		<title>Sheet.15</title>		<desc>APP</desc>		<rect x="0" y="431.731" width="120.959" height="23.1443" class="st2"></rect>		<text x="47.11" y="447.2" class="st3">APP</text>		</g>	<g id="shape62-11" transform="translate(283.645,-22.9803)">		<title>Sheet.62</title>		<desc>RAM</desc>		<rect x="0" y="431.731" width="109.963" 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ISR table</desc>		<rect x="0" y="431.731" width="132.478" height="23.1443" class="st2"></rect>		<text x="21.82" y="447.2" class="st3">RAM ISR table</text>		</g>	<g id="shape121-44" transform="translate(26.047,-156.856)">		<title>Sheet.121</title>		<desc>RAM data segment</desc>		<rect x="0" y="431.731" width="137.252" height="23.1443" class="st2"></rect>		<text x="10.12" y="447.2" class="st3">RAM data segment</text>		</g>	<g id="shape122-47" transform="translate(270,-380.25)">		<title>Separator.122</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape123-50" transform="translate(270,-343.929)">		<title>Separator.123</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape124-53" transform="translate(270,-271.286)">		<title>Separator.124</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape125-56" transform="translate(270,-234.964)">		<title>Separator.125</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape126-59" transform="translate(270,-198.643)">		<title>Separator.126</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape127-62" transform="translate(270,-162.321)">		<title>Separator.127</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape128-65" transform="translate(270,-126)">		<title>Separator.128</title>		<path d="M0 454.87 L137.25 454.87" class="st5"></path>	</g>	<g id="shape129-68" transform="translate(272.388,-312.428)">		<title>Sheet.129</title>		<desc>Kernel segment</desc>		<rect x="0" y="431.731" width="132.478" height="23.1443" class="st2"></rect>		<text x="17.47" y="447.2" class="st3">Kernel segment</text>		</g>	<g id="shape130-71" transform="translate(272.388,-276.428)">		<title>Sheet.130</title>		<desc>Hardware pktmem</desc>		<rect x="0" y="431.731" width="132.478" height="23.1443" class="st2"></rect>		<text x="9.88" y="447.2" class="st3">Hardware pktmem</text>		</g>	<g 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Last Published: Apr 27, 2026

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