# Mechanical information
Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html)
This topic provides IC mechanical information including dimensions, markings, ordering information, and thermal characteristics.
## Device physical dimensions
Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html)
The QCS6490 and QCS5430 chipsets are available in the 1287 PSP that includes dedicated ground pins for improved grounding,
mechanical strength, and thermal continuity. It has 1287 pins, with a pitch of 0.35 mm. Pin A1
is located by an indicator mark on the top of the package, and by the ball pattern when viewed
from below. The following figure shows a simplified version of the package outline
drawing.
Click the [Package Outline Drawing PSP1287, 14.0 × 12.0 × 0.91 mm, M530, S164 (NT90-18083-1)](https://docs.qualcomm.com/bundle/NT90-18083-1/resource/NT90-18083-1.pdf) to download the drawing.
Figure : 1287 PSP outline drawing
## Part marking
Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html)
The markings located on the top side of the chip are presented here.
Figure : QCS6490 device marking (top view, not to scale)
| Line | Marking | Description |
| --- | --- | --- |
| C1 | Qualcomm | Qualcomm name |
| P1 | PRODUCT | Qualcomm Technologies, Inc. (QTI) product name
|
| | Blank or random | Optional information |
| T1 | ● | Pin 1 or pin A1 indicator |
| T1 | FAYWWXXX | F = supply source code
F = F (TSMC)
A = assembly site code
A = E (ASE, Taiwan)
A = H (JCET STATS ChipPAC, Korea)
A = K (SPIL, Taiwan)
Y = single/last digit of the year
WW = two-digit work week of year specified by Y
XXX = traceability number |
| | | |
## Device ordering information
The short description is used to order QTI products, and is present on both the
customer label and in this document. The short description includes the product name,
configuration code, package type, product revision code, source code, and feature code/program
ID of the part.
This device can be ordered using the identification code as shown in the following table:
| Device ID code | AAA-AAAA | -P | -TTTTTT | NNNN | A | +FF | -EE | -RR | -S | -BB or -PID[^1^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fntarg_1_device-ordering-information) |
| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- |
| Symbol definition | Product name | Configuration code | Package type | Number of pins | Package variable | Additional package information | Shipping package | Product revision | Source code | Feature code |
| Example | QCS-6490 | -1 | -PSP | 1287 | | | -TR | -00 | -0 | -AA |
| Example | QCS-5430 | -1 | -PSP | 1287 | | | -TR | -00 | -0 | -AA |
| | | | | | | | | | | |
[^1^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fnsrc_1_device-ordering-information) The feature code (BB) and the program ID (PID) are mutually
exclusive. A product may have one of them or none of them, but it will never have
both. If there is no feature code/program ID, this field is blank, and the short
description ends after the source configuration code (S).
For example:
- QCS-6490-1-PSP1287-TR-00-0-AA
- QCS-5430-1-PSP1287-TR-00-0-AA
Note: The shipping package is either TR (tape and reel) or MT (matrix
tray).
For availability and information to order QTI products, contact the Qualcomm
sales team.
The following table summarizes the device identification details for all samples:
| Device | Sample type | Variant (PRR-BB) [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fntarg_2_device-ordering-information) | Hardware revision number[^3^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fntarg_3_device-ordering-information) | FEATURE\_ID [^4^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fntarg_4_device-ordering-information) | Hardware version | Source configuration code (S)[^5^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fntarg_5_device-ordering-information) | Comments | Comments | Sample date |
| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- |
| QCS6490 | ES | 100-AA | 0x0 0198 0E1 | 0x0 | v1.0 | 0 | CPU 1 × 2.7 GHz, 3 × 2.4 GHz, 4 × 1.9 GHz; with GPS support; Tj = 95°C | CPU 1 × 2.7 GHz, 3 × 2.4 GHz, 4 × 1.9 GHz; with GPS support; Tj = 95°C | 4/7/2021 |
| QCS6490 | CS The CS date code is:
Feature pack 1: CPU 2 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
Feature pack 2: CPU 4 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
|
Feature pack 1: CPU 2 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
Feature pack 2: CPU 4 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
| 10/30/2023 |
| QCS5430 | CS The CS date code is:
SPIL: 351
| 300-AA | 0x0 020 F 0E1 | 0x2 | v1.0 | 0 |
Feature pack 1: CPU 2 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
Feature pack 2: CPU 1 × 2.2 GHz, CPU 3 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
Feature pack 2.5 and 3 6: CPU 1 × 2.38 GHz, CPU 3 × 2.4 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
|
Feature pack 1: CPU 2 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
Feature pack 2: CPU 1 × 2.2 GHz, CPU 3 × 2.13 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
Feature pack 2.5 and 3 6: CPU 1 × 2.38 GHz, CPU 3 × 2.4 GHz, 4 × 1.8 GHz; with GPS support; Tj = 105°C
| 12/15/2023 |
[^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fnsrc_2_device-ordering-information) P = product configuration code; RR = product revision code;
BB = feature code that identifies an IC’s specific feature set, which
distinguishes it from other versions or variants. Feature sets are detailed in the
comments column.
[^3^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fnsrc_3_device-ordering-information) For more information on JTAG\_ID, see [Table : QFPROM_CORR_PTE_ROW0_LSB](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#gsh1612798352300__table_N1016D_N10017_N10001).
[^4^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fnsrc_4_device-ordering-information) For more information on FEATURE\_ID, see [Table : QFPROM_CORR_PTE_ROW0_LSB](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#gsh1612798352300__table_N1016D_N10017_N10001). The FEATURE\_ID combined
with the hardware revision number (JTAG\_ID) defines unique product variants. This
information is shown for situations where other device identification information
(such as device marking information) is not easily accessible.
[^5^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fnsrc_5_device-ordering-information) S is the source configuration code that
identifies all of the qualified die fabrication-source combinations available when
the particular sample type was shipped. The S values are defined in [Table : Source configuration code](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#gsh1612798352300__table_aks_zxl_bkb).
^6^ Software enablement for feature packs 2.5 and 3 is under
progress.
| S value | Die | F value = F |
| --- | --- | --- |
| 0 | Digital | TSMC |
| Other columns and rows will be added in future revisions of this document, if needed. | Other columns and rows will be added in future revisions of this document, if needed. | Other columns and rows will be added in future revisions of this document, if needed. |
Table : QFPROM_CORR_PTE_ROW0_LSB
| Bit location | Name | Description |
| :---: | :---: | --- |
| bits [27:20] | FEATURE\_ID | These bits are used for defining various feature variants. |
| bits [19:0] | JTAG\_ID | These bits map to bits [31:12] of the hardware revision number. |
The device identification register allows the user to determine the device’s manufacturer,
part number, and version via the test access port (TAP). The 32‑bit device identification
register is read through the JTAG interface and is summarized in the following table.
Table : Device identification register
| Bit location | Description | Value [^7^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fntarg_7_device-ordering-information) |
| --- | --- | --- |
| bits [31:28] | Version data
(may change with a sample type) | 0x0 |
| bits [27:12] | Part number
(changes with a sample type) | 01CC |
| bits [11:1] | Manufacturer identity code
(administered by JEDEC) | 070
(QTI code) |
| bit [0] | Device identification register start bit | Always = 1 |
[^7^](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#fnsrc_7_device-ordering-information) The hardware revision numbers for all sample types are provided in [Table : Device identification details](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html#gsh1612798352300__table_hwg_5vl_bkb).
## Thermal characteristics
Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html](https://docs.qualcomm.com/doc/80-23889-1/topic/mechanical-information.html)
Rather than provide thermal resistance values ӨJC and ӨJA, validated
thermal package models are provided through the Qualcomm.com website. Designers can extract
thermal resistance values by conducting their own thermal simulations.
Click [QCM6490 Package Thermal Model Icepak
(HS11-20659-5HW)](https://docs.qualcomm.com/bundle/HS11-20659-5HW/resource/HS11-20659-5HW.zip) and the [QCM6490 Package Thermal Model FloTHERM
(HS11-20659-6HW)](https://docs.qualcomm.com/bundle/HS11-20659-6HW/resource/HS11-20659-6HW.zip) to download the package thermal models.
Note:
The same Icepak and FloTHERM package thermal models are applicable to QCS6490 and QCS5430 chipsets.
Last Published: Sep 23, 2025
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