# Part reliability Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html) This topic provides the reliability data, including a definition of the qualification samples and a summary of qualification test results. ## Reliability qualification summary Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html) The following table provides the reliability evaluation report for QCS6490 and QCS5430 for the foundry source TSMC‑F15. Table : Silicon reliability results | Tests, standards, and conditions | Sample size | Result | | --- | :---: | :---: | | **ELFR in DPPM**



HTOL: JESD22-A108-A



(Total samples from 3 different wafer lots) | 333 | Pass | | **HTOL in FIT (** **l** **) failure in billion device hours** HTOL: JESD22-A108-A



(Total samples from 3 different wafer lots) | 333 | Pass | | **Mean time to failure (MTTF) t =** **1** **/** **l in million hours**



(Total samples from 3 different wafer lots) | 333 | > 20 | | **ESD – human-body model (HBM) rating**



JS001-2017



(Total samples from 1 wafer lot) | 21 | Pass



±1 kV | | **ESD – charged-device model (CDM) rating**



JS-002-2014



(Total samples from 1 wafer lot) | 6 | Pass



± 250 V | | **Latch-up (I-test)**: EIA/JESD78E



Trigger current: ±100 mA; temperature: 85°C



(Total samples from 1 wafer lot) | 6 | Pass



Class II, Level A | | **Latch-up (Vsupply overvoltage)**: EIA/JESD78E



Trigger voltage: Each VDD pin, stress at 1.5 × Vddmax per device specification; temperature: 85°C



(Total samples from 1 wafer lot) | 6 | Pass



Class II, Level a | The following table provides the package reliability results for QCS6490 and QCS5430. Table : Package reliability results | Tests, standards, and conditions | ASE sample size | SPIL sample size | SCK sample size | Results | | :---: | :---: | :---: | :---: | :---: | | **Moisture resistance test (MRT)**: J-STD-020C



MSL3, reflow at 260 +0/-5°C



(Total samples from 3 different assembly lots) | 2205 | 2205 | 2250 | Pass | | **Temperature cycle:** JESD22-A104



Temperature: -55°C to 125°C; number of cycles: 1000



Soak time at minimum/maximum temperature: 8–10 minutes



Cycle rate: 2 cycles per hour (cph)



Preconditioning: JESD22-A113-H



MSL3, reflow temperature: 260 +0/-5°C



(Total samples from 3 different assembly lots) | 765 | 765 | 765 | Pass | | **Unbiased highly accelerated stress test**: JESD22-A118



130°C/85% RH and 96‑hour duration



Preconditioning: JESD22-A113-H



MSL3, reflow temperature: 260 +0/-5°C



(Total samples from 3 different assembly lots) | 715 | 715 | 715 | Pass | | **Biased highly accelerated stress test**: JESD22-A110



130°C/85% RH and 96‑hour duration



Preconditioning: JESD22-A113-H



MSL3, reflow temperature: 260 +0/-5°C



(Total samples from 3 different assembly lots) | 360



Pass | 360 | 351 | Pass | | **High-temperature storage life**: JESD22-A103



Temperature 150°C, 500, 1000 hours



(Total samples from 3 different assembly lots) | 765 | 765 | 765 | Pass | | **Flammability**



Note: Flammability test – not required



UL-STD-94 | – | – | – | Note [^1^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#fntarg_1_reliability-evaluation-summary) | | **Physical dimensions**: JESD22-B100-A



Case outline drawing: QTI internal document



(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass | | **Die shear**



MIL-STD-883E, Method 2019



(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#concept.dita_77d8420b-5f99-4843-a1f9-7ac9c5024b11__fn_lhy_dgk_tpb) | | **Solder bump shear**



(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#concept.dita_77d8420b-5f99-4843-a1f9-7ac9c5024b11__fn_lhy_dgk_tpb) | | **Solder ball shear**: JESD22-B117



(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass [^2^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#concept.dita_77d8420b-5f99-4843-a1f9-7ac9c5024b11__fn_lhy_dgk_tpb) | | Internal/external visual



(Total samples from 3 different assembly lots at each SAT) | 30 | 30 | 30 | Pass | [^1^](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html#fnsrc_1_reliability-evaluation-summary) Qualcomm Technologies, Inc. (QTI) ICs are exempt from the flammability requirements due to their sizes per UL/EN 60950-1, as long as they are mounted on materials rated V-1 or better. Most PWBs onto which QTI ICs are mounted, are rated V-0 (better than V-1). ^2^ Data is based on other previously qualified PSP packages that are similar to this configuration. ## Qualification sample description Source: [https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html](https://docs.qualcomm.com/doc/80-23889-1/topic/part-reliability.html) The following table provides details of the category and definition of the device. Table : Device characteristics | Category | Definition | | :---: | :---: | | Device name | QCS6490 and QCS5430 | | Package type | 1287 PSP | | Package body size | 14.0 × 12.0 × 0.91 mm | | Ball count | 1287 | | Ball composition | SAC125/Ni | | Fab process | 6 nm | | Supply sources (fab sites) | TSMC | | Assembly sites | ASE, Taiwan; JCET STATS ChipPAC, Korea; SPIL, Taiwan | | Solder ball pitch | 0.35 mm | Last Published: Sep 23, 2025 [Previous Topic PCB mounting guidelines](https://docs.qualcomm.com/bundle/publicresource/80-23889-1/topics/pcb-mounting-guidelines.md) [Next Topic Samples and known issues](https://docs.qualcomm.com/bundle/publicresource/80-23889-1/topics/samples-and-known-issues.md)