# Architecture
Source: [https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html)
The workflow of the primary components within the hardware and the software architecture
of the Linux display subsystem and the SDM architecture are explained here.
## Display hardware architecture
Source: [https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html)
The hardware architecture includes components for source and destination processing,
layer mixing, compression, and display interfaces. The following figure shows the
display hardware architecture:
Figure : DPU hardware architecture
The display hardware architecture is explained in the following table:
Table : Display hardware architecture components
| Component | Description |
| --- | --- |
| Bus interface | Fetches data from memory for processing |
| Source surface processing |
- Reads RGB and YUV surfaces from games and video
applications
- Performs format conversion and quality improvements for
source
|
| Blending | Blends and mixes source surface together |
| Destination surface processing | Converts, corrects, and adjusts the data based on panel
characteristics |
| Compression | Reduces bandwidth and power consumption by sending compressed
display buffers to the display |
| Display interface | Generates timings for the connected display peripherals |
Detailed information on the display hardware architecture is available to users who have
full access to the proprietary software shipped with Qualcomm Linux. For more
information, see the [Qualcomm Linux Display Guide - Addendum](https://docs.qualcomm.com/bundle/resource/topics/80-70014-18A/architecture.html).
## Display software architecture
Source: [https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html)
The display subsystem consists of Wayland, a display server protocol, and its
compositors, such as Weston. Wayland uses a client-server model. The client application
interacts with the Wayland server and the SDM, which handles the buffer management,
composition, and display. The following figure shows the display software
architecture:
Figure : Display software architecture block diagram
The display software architecture is explained in the following table:
Table : Display software architecture components
| Component | Description |
| --- | --- |
| Wayland sink | The Wayland sink plug-in communicates with the Weston subsystem
to render the display. |
| Wayland compositor (Weston) | A display server using the Wayland protocol is called a Wayland
compositor. The wayland compositor is a system-level compositor,
which handles the composition and rendering requirements and runs as
a separate process in the system. The reference implementation of a
Wayland compositor is called Weston. |
| SDM | SDM software framework manages Qualcomm Adreno DPU hardware
resources. SDM selects the optimal composition strategy for each
connected display and allocates display processor hardware resources
for the layer stack received from the client. |
| LibDRM | Libdrm library provides APIs for accessing the Direct Rendering
Manager (DRM) I/O control (IOCTL). |
| DRM/KMS framework | The DRM/KMS framework offers kernel and userland level interface,
with the help of libdrm/libkms libraries to get access to the
related hardware features, configuration, and hardware
acceleration. |
| Adreno DPU driver | The Adreno DPU driver manages all the pixel data paths to
different panel interfaces |
| Adreno DPU | The Adreno DPU is a hardware accelerated engine that performs the
image processing and interfacing with minimal power
consumption. |
### SDM architecture
Source: [https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html)
The Snapdragon Display Manager (SDM) is an OS-agnostic software framework that manages
the Qualcomm®Adreno DPU™ hardware resources and selects the best composition strategy
for each connected display.
The SDM features and its components are currently available for users who have full
access to the proprietary software shipped with Qualcomm Linux. For more information,
see the [Qualcomm Linux Display Guide - Addendum](https://docs.qualcomm.com/bundle/resource/topics/80-70014-18A/architecture.html).
### DRM/KMS Adreno DPU driver architecture
Source: [https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html)
The DRM/KMS Linux kernel framework and related drivers are used to access the display
hardware block.
The DRM/KMS driver framework and the driver implementation details are currently
available for users who have full access to the proprietary software shipped with
Qualcomm Linux. For more information, see the [Qualcomm Linux Display Guide - Addendum](https://docs.qualcomm.com/bundle/resource/topics/80-70014-18A/architecture.html).
### Display peripheral interfaces
Source: [https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html](https://docs.qualcomm.com/doc/80-70014-18/topic/architecture.html)
The display interface comprises of the following: MIPI DSI controller, the DP controller,
and the eDP controller.
The interfaces and their key attributes are currently available for users who have full
access to the proprietary software shipped with Qualcomm Linux. For more information,
see the [Qualcomm Linux Display Guide - Addendum](https://docs.qualcomm.com/bundle/resource/topics/80-70014-18A/architecture.html).
Last Published: Jul 16, 2024
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