# Bring up
Source: [https://docs.qualcomm.com/doc/80-70014-26/topic/bring_up.html](https://docs.qualcomm.com/doc/80-70014-26/topic/bring_up.html)
### About this task
Before you bring up Ethernet functionality, ensure that the QPS615 MAC driver is
enabled. Compile the TC956X\_PCIE\_ETH time macro available at
drivers/net/ethernet/toshiba/Kconfig to enable kernel
configuration. This configuration is enabled by default in the base build.
You can run the following command to verify whether kernel configuration is
enabled:
zcat /proc/config.gz | grep TC956X_PCIE_ETHCopy to clipboard
To bring up hardware configurations other than the configuration provided by
Qualcomm, see [Bring up alternate hardware enablement](https://docs.qualcomm.com/doc/80-70014-26/topic/bring_up.html#attach_other_ethernet_phy_components).
To bring up Ethernet functionality, do the following:
### Procedure
1. Assign a MAC address by running the following command:
ifconfig hw ether Copy to clipboard
Sample command output is as follows:
ifconfig enP15sof0 hw ether EC:21:E5:10:4F:EA
ifconfig
enP1p5s0f0 Link encap:Ethernet HWaddr EC:21:E5:10:4F:EA
inet addr:169.254.227.235 Bcast:169.254.255.255 Mask:255.255.0.0
inet6 addr: fe80::533c:8ed6:557:3860/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:19 errors:0 dropped:0 overruns:0 frame:0
TX packets:36 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:3416 (3.3 KiB) TX bytes:5559 (5.4 KiB)
Interrupt:249
Copy to clipboard
Note: This MAC address is valid only for the current boot
cycle. On rebooting the device, the MAC address is updated with the address
from persistent storage as described in [Verify preconfigured MAC address](https://docs.qualcomm.com/doc/80-70014-26/topic/get_started.html#configure_and_store_mac_address).
2. When the device is connected to a public network, the DHCP server connected to
the network assigns the IP address automatically. No specific configuration is
required.
Alternatively, you can assign a static IP address by running the following
command:
ifconfig Copy to clipboard
Sample command output is as follows:
ifconfig enP1p5s0f0 169.254.227.235
ifconfig
enP1p5s0f0 Link encap:Ethernet HWaddr F2:D0:DB:1B:C4:A7
inet addr:169.254.227.235 Bcast:169.254.255.255 Mask:255.255.0.0
inet6 addr: fe80::533c:8ed6:557:3860/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:19 errors:0 dropped:0 overruns:0 frame:0
TX packets:36 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:3416 (3.3 KiB) TX bytes:5559 (5.4 KiB)
Interrupt:249
Copy to clipboard
Note: This IP address is valid only for the current boot
cycle. On rebooting the device, the IP address is not retained.
3. Configure the MTU size for the data packets over the Ethernet interface by
running the following command:
ifconfig mtu upCopy to clipboard
Sample command output is as follows:
ifconfig enP1p5s0f0 mtu 1500 up
ifconfig
enP1p5s0f0 Link encap:Ethernet HWaddr F2:D0:DB:1B:C4:A7
inet addr:169.254.227.235 Bcast:169.254.255.255 Mask:255.255.0.0
inet6 addr: fe80::533c:8ed6:557:3860/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:19 errors:0 dropped:0 overruns:0 frame:0
TX packets:36 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:3416 (3.3 KiB) TX bytes:5559 (5.4 KiB)
Interrupt:249
Copy to clipboard
## Bring up alternate hardware enablement
Source: [https://docs.qualcomm.com/doc/80-70014-26/topic/bring_up.html](https://docs.qualcomm.com/doc/80-70014-26/topic/bring_up.html)
You can attach MAC/PHY components other than the hardware configuration provided by
Qualcomm and bring them up.
Note: You must obtain the MAC/PHY driver and firmware from the
respective vendor. Qualcomm is not responsible for these configuration changes.
To replace QPS615 with other PCIe based MAC/PHY, see [PCIe software support for QPS615 switch](https://docs.qualcomm.com/bundle/publicresource/topics/80-70014-8/pcie.html#sub$pcie-software-support-feature-for-qps615).
### Keep QPS615 PCIe and replace QEP8121/AQR113C
You can keep QPS615 PCIe and replace QEP8121/AQR113C with other PHY components. Based
on the attached PHY recommendations, update all the parameters in the
arch/arm64/boot/dts/qcom/qcs6490-addons-rb3gen2.dtsi file
and compile the software.
Sample for QEP PHY is as follows:
qep_vreg: qep_vreg { compatible = "regulator-fixed"; regulator-name = "qep_vreg"; gpio = <&pm7325_gpios 8 0>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; enable-active-high;};
qps615_eth1,qps615_eth1@pcie1_rp { reg = <0x100 0x0 0x0 0x0 0x0>; pinctrl-names = "default"; pinctrl-0 = <&napa_intn_wol_sig>; qcom,phy-rst-gpio = <1>; interrupts-extended = <&tlmm 101 IRQ_TYPE_EDGE_FALLING>; interrupt-names = "wol_irq"; phy-supply = <&qep_vreg>; qcom,phy-rst-delay-us = <20000>; #address-cells = <1>; #size-cells = <1>;
Copy to clipboard
After flashing the modified software, the QPS615 driver scans the physical devices
connected to it and matches the device tree information in the
qcs6490-addons-rb3gen2.dtsi file.
Note: A PHY may fail to load due to mismatch between the
configuration in the .dtsi file and actual recommendations for
the PHY. In such cases, you must update the configuration in the
.dtsi file accordingly.
### AQR PHY enablement
Though AQR PHY for 10 GbE is optional, it is validated on reference RB3 Gen 2
platform. The PHY driver must be loaded and installed on every new build, whereas
the firmware must be flashed to the hardware only once.
For example, Qualcomm tested the following PHY firmware version with AQR:
- Marvell firmware:
AQR-G4\_v5.6.1-QR\_Marvell\_NoSwap\_XFI\_ID44874\_VER1836.cld
Each vendor has their own method of flashing the firmware. For Marvell PHY AQR113,
Marvell-proprietary Flashburn tool is recommended.
To detect the AQR driver, update the AQR PHY parameters in the
arch/arm64/boot/dts/qcom/qcs6490-addons-rb3gen2.dtsi file
and compile the software.
Sample for AQR PHY is as follows:
aqr_vreg: aqr_vreg { compatible = "regulator-fixed"; regulator-name = "aqr_vreg"; gpio = <&pm7250b_gpios 4 0>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; enable-active-high;};
qps615_eth0,qps615_eth0@pcie1_rp { reg = <0x0 0x0 0x0 0x0 0x0>; pinctrl-names = "default"; pinctrl-0 = <&aqr_intn_wol_sig>; qcom,phy-rst-gpio = <0>; interrupts-extended = <&tlmm 141 IRQ_TYPE_EDGE_FALLING>; interrupt-names = "wol_irq"; phy-supply = <&aqr_vreg>; qcom,phy-rst-delay-us = <221000>; #address-cells = <1>; #size-cells = <1>; };
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Last Published: Jul 11, 2024
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