# Tools Source: [https://docs.qualcomm.com/doc/80-70014-26/topic/tools.html](https://docs.qualcomm.com/doc/80-70014-26/topic/tools.html) You can use the following tools to perform certain basic Ethernet operations such as configuring addresses, viewing the status of links, monitoring connections, and debugging connection failures. | Tool | Description | | --- | --- | | `ethtool` command | Displays and modifies the parameters of network interface controllers
(NICs) and their associated device driver software from application
programs running in the user space. | | `ifconfig` command | | | `netstat` command | | | tcpdump | Analyzes the network traffic by intercepting and displaying packets
that are created or received by a network interface. | | Routing table | | ### ethtool Sample output of `ethtool` command to check the status of a link is as follows: ethtool enP1p5s0f0 Settings for enP1p5s0f0: Supported ports: [ ] Supported link modes: 100baseT/Half 100baseT/Full 1000baseT/Full 10000baseT/Full 1000baseKX/Full 10000baseKX4/Full 10000baseKR/Full 2500baseT/Full 5000baseT/Full Supported pause frame use: Symmetric Receive-only Supports auto-negotiation: Yes Supported FEC modes: Not reported Advertised link modes: 100baseT/Half 100baseT/Full 1000baseT/Full 10000baseT/Full 1000baseKX/Full 10000baseKX4/Full 10000baseKR/Full 2500baseT/Full 5000baseT/Full Advertised pause frame use: Symmetric Receive-only Advertised auto-negotiation: Yes Advertised FEC modes: Not reported Link partner advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 2500baseT/Full Link partner advertised pause frame use: Symmetric Receive-only Link partner advertised auto-negotiation: Yes Link partner advertised FEC modes: Not reported Speed: 2500Mb/s Duplex: Full Auto-negotiation: on Port: Twisted Pair PHYAD: 0 Transceiver: external MDI-X: Unknown Supports Wake-on: d Wake-on: d Current message level: 0x0000003f (63) drv probe link timer ifdown ifup Link detected: yes ethtool enP1p5s0f1 Settings for enP1p5s0f1: Supported ports: [ ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 2500baseT/Full Supported pause frame use: Symmetric Receive-only Supports auto-negotiation: Yes Supported FEC modes: Not reported Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 2500baseT/Full Advertised pause frame use: Symmetric Receive-only Advertised auto-negotiation: Yes Advertised FEC modes: Not reported Link partner advertised link modes: 100baseT/Half 100baseT/Full 1000baseT/Full 2500baseT/Full Link partner advertised pause frame use: Symmetric Receive-only Link partner advertised auto-negotiation: Yes Link partner advertised FEC modes: Not reported Speed: 2500Mb/s Duplex: Full Auto-negotiation: on master-slave cfg: preferred slave master-slave status: slave Port: Twisted Pair PHYAD: 28 Transceiver: external MDI-X: off (auto) Supports Wake-on: g Wake-on: d Current message level: 0x0000003f (63) drv probe link timer ifdown ifup Link detected: yes Copy to clipboard Sample output of `ethtool` command to check the statistics of NIC packet is as follows: ethtool -S enP1p5s0f0 NIC statistics: mmc_tx_octetcount_gb: 10234 mmc_tx_framecount_gb: 84 mmc_tx_broadcastframe_g: 52 mmc_tx_multicastframe_g: 32 mmc_tx_64_octets_gb: 41 mmc_tx_65_to_127_octets_gb: 23 mmc_tx_128_to_255_octets_gb: 6 mmc_tx_256_to_511_octets_gb: 14 mmc_tx_512_to_1023_octets_gb: 0 mmc_tx_1024_to_max_octets_gb: 0 mmc_tx_unicast_gb: 0 mmc_tx_multicast_gb: 32 mmc_tx_broadcast_gb: 52 mmc_tx_underflow_error: 0 mmc_tx_singlecol_g: 0 mmc_tx_multicol_g: 0 mmc_tx_deferred: 0 mmc_tx_latecol: 0 mmc_tx_exesscol: 0 mmc_tx_carrier_error: 0 mmc_tx_octetcount_g: 10234 mmc_tx_framecount_g: 84 mmc_tx_excessdef: 0 mmc_tx_pause_frame: 0 mmc_tx_vlan_frame_g: 0 mmc_tx_lpi_tran_cntr: 0 mmc_rx_lpi_tran_cntr: 0 mmc_rx_framecount_gb: 25 mmc_rx_octetcount_gb: 5394 mmc_rx_octetcount_g: 5394 mmc_rx_broadcastframe_g: 15 mmc_rx_multicastframe_g: 10 mmc_rx_crc_error: 0 mmc_rx_align_error: 0 mmc_rx_run_error: 0 mmc_rx_jabber_error: 0 mmc_rx_undersize_g: 0 mmc_rx_oversize_g: 0 mmc_rx_64_octets_gb: 5 mmc_rx_65_to_127_octets_gb: 4 mmc_rx_128_to_255_octets_gb: 5 mmc_rx_256_to_511_octets_gb: 11 mmc_rx_512_to_1023_octets_gb: 0 mmc_rx_1024_to_max_octets_gb: 0 mmc_rx_unicast_g: 0 mmc_rx_length_error: 0 mmc_rx_autofrangetype: 0 mmc_rx_pause_frames: 0 mmc_rx_fifo_overflow: 0 mmc_rx_vlan_frames_gb: 0 mmc_rx_watchdog_error: 0 mmc_rx_ipc_intr_mask: 0 mmc_rx_ipc_intr: 0 mmc_rx_ipv4_gd: 0 mmc_rx_ipv4_hderr: 0 mmc_rx_ipv4_nopay: 0 mmc_rx_ipv4_frag: 0 mmc_rx_ipv4_udsbl: 0 mmc_rx_ipv4_gd_octets: 0 mmc_rx_ipv4_hderr_octets: 0 mmc_rx_ipv4_nopay_octets: 0 mmc_rx_ipv4_frag_octets: 0 mmc_rx_ipv4_udsbl_octets: 0 mmc_rx_ipv6_gd_octets: 0 mmc_rx_ipv6_hderr_octets: 0 mmc_rx_ipv6_nopay_octets: 0 mmc_rx_ipv6_gd: 0 mmc_rx_ipv6_hderr: 0 mmc_rx_ipv6_nopay: 0 mmc_rx_udp_gd: 0 mmc_rx_udp_err: 0 mmc_rx_tcp_gd: 0 mmc_rx_tcp_err: 0 mmc_rx_icmp_gd: 0 mmc_rx_icmp_err: 0 mmc_rx_udp_gd_octets: 0 mmc_rx_udp_err_octets: 0 mmc_rx_tcp_gd_octets: 0 mmc_rx_tcp_err_octets: 0 mmc_rx_icmp_gd_octets: 0 mmc_rx_icmp_err_octets: 0 mmc_tx_fpe_fragment_cntr: 0 mmc_tx_hold_req_cntr: 0 mmc_rx_packet_assembly_err_cntr: 0 mmc_rx_packet_smd_err_cntr: 0 mmc_rx_packet_assembly_ok_cntr: 0 mmc_rx_fpe_fragment_cntr: 0 tx_underflow: 0 tx_carrier: 0 tx_losscarrier: 0 vlan_tag: 0 tx_deferred: 0 tx_vlan: 0 tx_jabber: 0 tx_frame_flushed: 0 tx_payload_error: 0 tx_ip_header_error: 0 rx_desc: 0 sa_filter_fail: 0 overflow_error: 0 ipc_csum_error: 0 rx_collision: 0 rx_crc_errors: 0 dribbling_bit: 0 rx_length: 0 rx_mii: 0 rx_multicast: 0 rx_gmac_overflow: 0 rx_watchdog: 0 da_rx_filter_fail: 0 sa_rx_filter_fail: 0 rx_missed_cntr: 0 rx_overflow_cntr: 0 rx_vlan: 0 rx_split_hdr_pkt_n: 0 tx_undeflow_irq: 0 tx_process_stopped_irq[0]: 0 tx_process_stopped_irq[1]: 0 tx_process_stopped_irq[2]: 0 tx_process_stopped_irq[3]: 0 tx_process_stopped_irq[4]: 0 tx_process_stopped_irq[5]: 0 tx_process_stopped_irq[6]: 0 tx_process_stopped_irq[7]: 0 tx_jabber_irq: 0 rx_overflow_irq: 0 rx_buf_unav_irq[0]: 0 rx_buf_unav_irq[1]: 0 rx_buf_unav_irq[2]: 0 rx_buf_unav_irq[3]: 0 rx_buf_unav_irq[4]: 0 rx_buf_unav_irq[5]: 0 rx_buf_unav_irq[6]: 0 rx_buf_unav_irq[7]: 0 rx_process_stopped_irq: 0 rx_watchdog_irq: 0 tx_early_irq: 0 fatal_bus_error_irq[0]: 0 fatal_bus_error_irq[1]: 0 fatal_bus_error_irq[2]: 0 fatal_bus_error_irq[3]: 0 fatal_bus_error_irq[4]: 0 fatal_bus_error_irq[5]: 0 fatal_bus_error_irq[6]: 0 fatal_bus_error_irq[7]: 0 rx_early_irq: 0 threshold: 1 tx_pkt_n[0]: 84 tx_pkt_n[1]: 0 tx_pkt_n[2]: 0 tx_pkt_n[3]: 0 tx_pkt_n[4]: 0 tx_pkt_n[5]: 0 tx_pkt_n[6]: 0 tx_pkt_n[7]: 0 tx_pkt_errors_n[0]: 0 tx_pkt_errors_n[1]: 0 tx_pkt_errors_n[2]: 0 tx_pkt_errors_n[3]: 0 tx_pkt_errors_n[4]: 0 tx_pkt_errors_n[5]: 0 tx_pkt_errors_n[6]: 0 tx_pkt_errors_n[7]: 0 rx_pkt_n[0]: 25 rx_pkt_n[1]: 0 rx_pkt_n[2]: 0 rx_pkt_n[3]: 0 rx_pkt_n[4]: 0 rx_pkt_n[5]: 0 rx_pkt_n[6]: 0 rx_pkt_n[7]: 0 normal_irq_n[0]: 19 normal_irq_n[1]: 0 normal_irq_n[2]: 0 normal_irq_n[3]: 19 normal_irq_n[4]: 19 normal_irq_n[5]: 19 normal_irq_n[6]: 19 normal_irq_n[7]: 19 rx_normal_irq_n[0]: 17 rx_normal_irq_n[1]: 0 rx_normal_irq_n[2]: 0 rx_normal_irq_n[3]: 0 rx_normal_irq_n[4]: 0 rx_normal_irq_n[5]: 0 rx_normal_irq_n[6]: 0 rx_normal_irq_n[7]: 0 napi_poll_tx[0]: 21 napi_poll_tx[1]: 0 napi_poll_tx[2]: 0 napi_poll_tx[3]: 0 napi_poll_tx[4]: 0 napi_poll_tx[5]: 0 napi_poll_tx[6]: 0 napi_poll_tx[7]: 0 napi_poll_rx[0]: 17 napi_poll_rx[1]: 0 napi_poll_rx[2]: 0 napi_poll_rx[3]: 0 napi_poll_rx[4]: 0 napi_poll_rx[5]: 0 napi_poll_rx[6]: 0 napi_poll_rx[7]: 0 tx_normal_irq_n[0]: 18 tx_normal_irq_n[1]: 0 tx_normal_irq_n[2]: 0 tx_normal_irq_n[3]: 0 tx_normal_irq_n[4]: 0 tx_normal_irq_n[5]: 0 tx_normal_irq_n[6]: 0 tx_normal_irq_n[7]: 0 tx_clean[0]: 21 tx_clean[1]: 0 tx_clean[2]: 0 tx_clean[3]: 0 tx_clean[4]: 0 tx_clean[5]: 0 tx_clean[6]: 0 tx_clean[7]: 0 tx_set_ic_bit: 1 irq_receive_pmt_irq_n: 0 mmc_tx_irq_n: 0 mmc_rx_irq_n: 0 mmc_rx_csum_offload_irq_n: 0 irq_tx_path_in_lpi_mode_n: 0 irq_tx_path_exit_lpi_mode_n: 0 irq_rx_path_in_lpi_mode_n: 0 irq_rx_path_exit_lpi_mode_n: 0 phy_eee_wakeup_error_n: 0 ip_hdr_err: 0 ip_payload_err: 0 ip_csum_bypassed: 0 ipv4_pkt_rcvd: 0 ipv6_pkt_rcvd: 0 no_ptp_rx_msg_type_ext: 0 ptp_rx_msg_type_sync: 0 ptp_rx_msg_type_follow_up: 0 ptp_rx_msg_type_delay_req: 0 ptp_rx_msg_type_delay_resp: 0 ptp_rx_msg_type_pdelay_req: 0 ptp_rx_msg_type_pdelay_resp: 0 ptp_rx_msg_type_pdelay_follow_up: 0 ptp_rx_msg_type_announce: 0 ptp_rx_msg_type_management: 0 ptp_rx_msg_pkt_reserved_type: 0 ptp_frame_type: 0 ptp_ver: 0 timestamp_dropped: 0 av_pkt_rcvd: 0 av_tagged_pkt_rcvd: 0 vlan_tag_priority_val: 0 l3_filter_match: 0 l4_filter_match: 0 l3_l4_filter_no_match: 0 irq_pcs_ane_n: 0 irq_pcs_link_n: 0 irq_rgmii_n: 0 mtl_tx_status_fifo_full: 0 mtl_tx_fifo_not_empty[0]: 0 mtl_tx_fifo_not_empty[1]: 0 mtl_tx_fifo_not_empty[2]: 0 mtl_tx_fifo_not_empty[3]: 0 mtl_tx_fifo_not_empty[4]: 0 mtl_tx_fifo_not_empty[5]: 0 mtl_tx_fifo_not_empty[6]: 0 mtl_tx_fifo_not_empty[7]: 0 mmtl_fifo_ctrl[0]: 0 mmtl_fifo_ctrl[1]: 0 mmtl_fifo_ctrl[3]: 0 mmtl_fifo_ctrl[4]: 0 mmtl_fifo_ctrl[5]: 0 mmtl_fifo_ctrl[6]: 0 mmtl_fifo_ctrl[7]: 0 mtl_tx_fifo_read_ctrl_write[0]: 0 mtl_tx_fifo_read_ctrl_write[1]: 0 mtl_tx_fifo_read_ctrl_write[2]: 0 mtl_tx_fifo_read_ctrl_write[3]: 0 mtl_tx_fifo_read_ctrl_write[4]: 0 mtl_tx_fifo_read_ctrl_write[5]: 0 mtl_tx_fifo_read_ctrl_write[6]: 0 mtl_tx_fifo_read_ctrl_write[7]: 0 mtl_tx_fifo_read_ctrl_wait[0]: 0 mtl_tx_fifo_read_ctrl_wait[1]: 0 mtl_tx_fifo_read_ctrl_wait[2]: 0 mtl_tx_fifo_read_ctrl_wait[3]: 0 mtl_tx_fifo_read_ctrl_wait[4]: 0 mtl_tx_fifo_read_ctrl_wait[5]: 0 mtl_tx_fifo_read_ctrl_wait[6]: 0 mtl_tx_fifo_read_ctrl_wait[7]: 0 mtl_tx_fifo_read_ctrl_read[0]: 0 mtl_tx_fifo_read_ctrl_read[1]: 0 mtl_tx_fifo_read_ctrl_read[2]: 0 mtl_tx_fifo_read_ctrl_read[3]: 0 mtl_tx_fifo_read_ctrl_read[4]: 0 mtl_tx_fifo_read_ctrl_read[5]: 0 mtl_tx_fifo_read_ctrl_read[6]: 0 mtl_tx_fifo_read_ctrl_read[7]: 0 mtl_tx_fifo_read_ctrl_idle[0]: 0 mtl_tx_fifo_read_ctrl_idle[1]: 0 mtl_tx_fifo_read_ctrl_idle[2]: 0 mtl_tx_fifo_read_ctrl_idle[3]: 0 mtl_tx_fifo_read_ctrl_idle[4]: 0 mtl_tx_fifo_read_ctrl_idle[5]: 0 mtl_tx_fifo_read_ctrl_idle[6]: 0 mtl_tx_fifo_read_ctrl_idle[7]: 0 mac_tx_in_pause[0]: 0 mac_tx_in_pause[1]: 0 mac_tx_in_pause[2]: 0 mac_tx_in_pause[3]: 0 mac_tx_in_pause[4]: 0 mac_tx_in_pause[5]: 0 mac_tx_in_pause[6]: 0 mac_tx_in_pause[7]: 0 mac_tx_frame_ctrl_xfer: 0 mac_tx_frame_ctrl_idle: 0 mac_tx_frame_ctrl_wait: 0 mac_tx_frame_ctrl_pause: 0 mac_gmii_tx_proto_engine: 0 mtl_rx_fifo_fill_level_full[0]: 0 mtl_rx_fifo_fill_level_full[1]: 0 mtl_rx_fifo_fill_level_full[2]: 0 mtl_rx_fifo_fill_level_full[3]: 0 mtl_rx_fifo_fill_level_full[4]: 0 mtl_rx_fifo_fill_level_full[5]: 0 mtl_rx_fifo_fill_level_full[6]: 0 mtl_rx_fifo_fill_level_full[7]: 0 mtl_rx_fifo_fill_above_thresh[0]: 0 mtl_rx_fifo_fill_above_thresh[1]: 0 mtl_rx_fifo_fill_above_thresh[2]: 0 mtl_rx_fifo_fill_above_thresh[3]: 0 mtl_rx_fifo_fill_above_thresh[4]: 0 mtl_rx_fifo_fill_above_thresh[5]: 0 mtl_rx_fifo_fill_above_thresh[6]: 0 mtl_rx_fifo_fill_above_thresh[7]: 0 mtl_rx_fifo_fill_below_thresh[0]: 0 mtl_rx_fifo_fill_below_thresh[1]: 0 mtl_rx_fifo_fill_below_thresh[2]: 0 mtl_rx_fifo_fill_below_thresh[3]: 0 mtl_rx_fifo_fill_below_thresh[4]: 0 mtl_rx_fifo_fill_below_thresh[5]: 0 mtl_rx_fifo_fill_below_thresh[6]: 0 mtl_rx_fifo_fill_below_thresh[7]: 0 mtl_rx_fifo_fill_level_empty[0]: 0 mtl_rx_fifo_fill_level_empty[1]: 0 mtl_rx_fifo_fill_level_empty[2]: 0 mtl_rx_fifo_fill_level_empty[3]: 0 mtl_rx_fifo_fill_level_empty[4]: 0 mtl_rx_fifo_fill_level_empty[5]: 0 mtl_rx_fifo_fill_level_empty[6]: 0 mtl_rx_fifo_fill_level_empty[7]: 0 mtl_rx_fifo_read_ctrl_flush[0]: 0 mtl_rx_fifo_read_ctrl_flush[1]: 0 mtl_rx_fifo_read_ctrl_flush[2]: 0 mtl_rx_fifo_read_ctrl_flush[3]: 0 mtl_rx_fifo_read_ctrl_flush[4]: 0 mtl_rx_fifo_read_ctrl_flush[5]: 0 mtl_rx_fifo_read_ctrl_flush[6]: 0 mtl_rx_fifo_read_ctrl_flush[7]: 0 mtl_rx_fifo_read_ctrl_read[0]: 0 mtl_rx_fifo_read_ctrl_read[1]: 0 mtl_rx_fifo_read_ctrl_read[2]: 0 mtl_rx_fifo_read_ctrl_read[3]: 0 mtl_rx_fifo_read_ctrl_read[4]: 0 mtl_rx_fifo_read_ctrl_read[5]: 0 mtl_rx_fifo_read_ctrl_read[6]: 0 mtl_rx_fifo_read_ctrl_read[7]: 0 mtl_rx_fifo_read_ctrl_status[0]: 0 mtl_rx_fifo_read_ctrl_status[1]: 0 mtl_rx_fifo_read_ctrl_status[2]: 0 mtl_rx_fifo_read_ctrl_status[3]: 0 mtl_rx_fifo_read_ctrl_status[4]: 0 mtl_rx_fifo_read_ctrl_status[5]: 0 mtl_rx_fifo_read_ctrl_status[6]: 0 mtl_rx_fifo_read_ctrl_status[7]: 0 mtl_rx_fifo_read_ctrl_idle[0]: 0 mtl_rx_fifo_read_ctrl_idle[1]: 0 mtl_rx_fifo_read_ctrl_idle[2]: 0 mtl_rx_fifo_read_ctrl_idle[3]: 0 mtl_rx_fifo_read_ctrl_idle[4]: 0 mtl_rx_fifo_read_ctrl_idle[5]: 0 mtl_rx_fifo_read_ctrl_idle[6]: 0 mtl_rx_fifo_read_ctrl_idle[7]: 0 mtl_rx_fifo_ctrl_active[0]: 0 mtl_rx_fifo_ctrl_active[1]: 0 mtl_rx_fifo_ctrl_active[2]: 0 mtl_rx_fifo_ctrl_active[3]: 0 mtl_rx_fifo_ctrl_active[4]: 0 mtl_rx_fifo_ctrl_active[5]: 0 mtl_rx_fifo_ctrl_active[6]: 0 mtl_rx_fifo_ctrl_active[7]: 0 mac_rx_frame_ctrl_fifo: 0 mac_gmii_rx_proto_engine: 0 tx_tso_frames[0]: 0 tx_tso_frames[1]: 0 tx_tso_frames[2]: 0 tx_tso_frames[3]: 0 tx_tso_frames[4]: 0 tx_tso_frames[5]: 0 tx_tso_frames[6]: 0 tx_tso_frames[7]: 0 tx_tso_nfrags[0]: 0 tx_tso_nfrags[1]: 0 tx_tso_nfrags[2]: 0 tx_tso_nfrags[3]: 0 tx_tso_nfrags[4]: 0 tx_tso_nfrags[5]: 0 tx_tso_nfrags[6]: 0 tx_tso_nfrags[7]: 0 txch_status[0]: 4 txch_status[1]: 0 txch_status[2]: 0 txch_status[3]: 0 txch_status[4]: 0 txch_status[5]: 0 txch_status[6]: 0 txch_status[7]: 0 txch_control[0]: 1052673 txch_control[1]: 4096 txch_control[2]: 0 txch_control[3]: 0 txch_control[4]: 1048577 txch_control[5]: 269484033 txch_control[6]: 269484033 txch_control[7]: 269484033 txch_desc_list_haddr[0]: 16 txch_desc_list_haddr[1]: 0 txch_desc_list_haddr[2]: 0 txch_desc_list_haddr[3]: 0 txch_desc_list_haddr[4]: 16 txch_desc_list_haddr[5]: 16 txch_desc_list_haddr[6]: 16 txch_desc_list_haddr[7]: 16 txch_desc_list_laddr[0]: 4282212352 txch_desc_list_laddr[1]: 0 txch_desc_list_laddr[2]: 0 txch_desc_list_laddr[3]: 0 txch_desc_list_laddr[4]: 4282204160 txch_desc_list_laddr[5]: 4282187776 txch_desc_list_laddr[6]: 4282171392 txch_desc_list_laddr[7]: 4282155008 txch_desc_ring_len[0]: 511 txch_desc_ring_len[1]: 0 txch_desc_ring_len[2]: 0 txch_desc_ring_len[3]: 0 txch_desc_ring_len[4]: 511 txch_desc_ring_len[5]: 511 txch_desc_ring_len[6]: 511 txch_desc_ring_len[7]: 511 txch_desc_curr_haddr[0]: 0 txch_desc_curr_haddr[1]: 0 txch_desc_curr_haddr[2]: 0 txch_desc_curr_haddr[3]: 0 txch_desc_curr_haddr[4]: 0 txch_desc_curr_haddr[5]: 0 txch_desc_curr_haddr[6]: 0 txch_desc_curr_haddr[7]: 0 txch_desc_curr_laddr[0]: 4282213696 txch_desc_curr_laddr[1]: 0 txch_desc_curr_laddr[2]: 0 txch_desc_curr_laddr[3]: 0 txch_desc_curr_laddr[4]: 4282204160 txch_desc_curr_laddr[5]: 4282187776 txch_desc_curr_laddr[6]: 4282171392 txch_desc_curr_laddr[7]: 4282155008 txch_desc_tail[0]: 4282213696 txch_desc_tail[1]: 0 txch_desc_tail[2]: 0 txch_desc_tail[3]: 0 txch_desc_tail[4]: 4282204160 txch_desc_tail[5]: 4282187776 txch_desc_tail[6]: 4282171392 txch_desc_tail[7]: 4282155008 txch_desc_buf_haddr[0]: 16 txch_desc_buf_haddr[1]: 0 txch_desc_buf_haddr[2]: 0 txch_desc_buf_haddr[3]: 0 txch_desc_buf_haddr[4]: 0 txch_desc_buf_haddr[5]: 0 txch_desc_buf_haddr[6]: 0 txch_desc_buf_haddr[7]: 0 txch_desc_buf_laddr[0]: 4269187074 txch_desc_buf_laddr[1]: 0 txch_desc_buf_laddr[2]: 0 txch_desc_buf_laddr[3]: 0 txch_desc_buf_laddr[4]: 0 txch_desc_buf_laddr[5]: 0 txch_desc_buf_laddr[6]: 0 txch_desc_buf_laddr[7]: 0 txch_sw_cur_tx[0]: 84 txch_sw_cur_tx[1]: 0 txch_sw_cur_tx[2]: 0 txch_sw_cur_tx[3]: 0 txch_sw_cur_tx[4]: 0 txch_sw_cur_tx[5]: 0 txch_sw_cur_tx[6]: 0 txch_sw_cur_tx[7]: 0 txch_sw_dirty_tx[0]: 84 txch_sw_dirty_tx[1]: 0 txch_sw_dirty_tx[2]: 0 txch_sw_dirty_tx[3]: 0 txch_sw_dirty_tx[4]: 0 txch_sw_dirty_tx[5]: 0 txch_sw_dirty_tx[6]: 0 txch_sw_dirty_tx[7]: 0 rxch_status[0]: 4 rxch_status[1]: 0 rxch_status[2]: 0 rxch_status[3]: 0 rxch_status[4]: 0 rxch_status[5]: 0 rxch_status[6]: 0 rxch_status[7]: 0 rxch_control[0]: 1051649 rxch_control[1]: 0 rxch_control[2]: 0 rxch_control[3]: 1051649 rxch_control[4]: 1051649 rxch_control[5]: 1051649 rxch_control[6]: 1051649 rxch_control[7]: 1051649 rxch_desc_list_haddr[0]: 16 rxch_desc_list_haddr[1]: 0 rxch_desc_list_haddr[2]: 0 rxch_desc_list_haddr[3]: 16 rxch_desc_list_haddr[4]: 16 rxch_desc_list_haddr[5]: 16 rxch_desc_list_haddr[6]: 16 rxch_desc_list_haddr[7]: 16 rxch_desc_list_laddr[0]: 4282261504 rxch_desc_list_laddr[1]: 0 rxch_desc_list_laddr[2]: 0 rxch_desc_list_laddr[3]: 4282253312 rxch_desc_list_laddr[4]: 4282245120 rxch_desc_list_laddr[5]: 4282236928 rxch_desc_list_laddr[6]: 4282228736 rxch_desc_list_laddr[7]: 4282220544 rxch_desc_ring_len[0]: 511 rxch_desc_ring_len[1]: 0 rxch_desc_ring_len[2]: 0 rxch_desc_ring_len[3]: 511 rxch_desc_ring_len[4]: 511 rxch_desc_ring_len[5]: 511 rxch_desc_ring_len[6]: 511 rxch_desc_ring_len[7]: 511 rxch_desc_curr_haddr[0]: 0 rxch_desc_curr_haddr[1]: 0 rxch_desc_curr_haddr[2]: 0 rxch_desc_curr_haddr[3]: 0 rxch_desc_curr_haddr[4]: 0 rxch_desc_curr_haddr[5]: 0 rxch_desc_curr_haddr[6]: 0 rxch_desc_curr_haddr[7]: 0 rxch_desc_curr_laddr[0]: 4282262560 rxch_desc_curr_laddr[1]: 0 rxch_desc_curr_laddr[2]: 0 rxch_desc_curr_laddr[3]: 4282253568 rxch_desc_curr_laddr[4]: 4282245376 rxch_desc_curr_laddr[5]: 4282237184 rxch_desc_curr_laddr[6]: 4282228992 rxch_desc_curr_laddr[7]: 4282220800 rxch_desc_tail[0]: 4282262304 rxch_desc_tail[1]: 0 rxch_desc_tail[2]: 0 rxch_desc_tail[3]: 4282261504 rxch_desc_tail[4]: 4282253312 rxch_desc_tail[5]: 4282245120 rxch_desc_tail[6]: 4282236928 rxch_desc_tail[7]: 4282228736 rxch_desc_buf_haddr[0]: 16 rxch_desc_buf_haddr[1]: 0 rxch_desc_buf_haddr[2]: 0 rxch_desc_buf_haddr[3]: 16 rxch_desc_buf_haddr[4]: 16 rxch_desc_buf_haddr[5]: 16 rxch_desc_buf_haddr[6]: 16 rxch_desc_buf_haddr[7]: 16 rxch_desc_buf_laddr[0]: 4282097664 rxch_desc_buf_laddr[1]: 0 rxch_desc_buf_laddr[2]: 0 rxch_desc_buf_laddr[3]: 4279795712 rxch_desc_buf_laddr[4]: 4277698560 rxch_desc_buf_laddr[5]: 4275601408 rxch_desc_buf_laddr[6]: 4273504256 rxch_desc_buf_laddr[7]: 4271407104 rxch_sw_cur_rx[0]: 50 rxch_sw_cur_rx[1]: 0 rxch_sw_cur_rx[2]: 0 rxch_sw_cur_rx[3]: 0 rxch_sw_cur_rx[4]: 0 rxch_sw_cur_rx[5]: 0 rxch_sw_cur_rx[6]: 0 rxch_sw_cur_rx[7]: 0 rxch_sw_dirty_rx[0]: 50 rxch_sw_dirty_rx[1]: 0 rxch_sw_dirty_rx[2]: 0 rxch_sw_dirty_rx[3]: 0 rxch_sw_dirty_rx[4]: 0 rxch_sw_dirty_rx[5]: 0 rxch_sw_dirty_rx[6]: 0 rxch_sw_dirty_rx[7]: 0 total_interrupts: 19 lpi_intr_n: 0 pmt_intr_n: 0 event_intr_n: 0 tx_intr_n: 1 rx_intr_n: 17 xpcs_intr_n: 0 phy_intr_n: 1 sw_msi_n: 0 mtl_tx_underflow[0]: 0 mtl_tx_underflow[1]: 0 mtl_tx_underflow[3]: 0 mtl_tx_underflow[4]: 0 mtl_tx_underflow[5]: 0 mtl_tx_underflow[6]: 0 mtl_tx_underflow[7]: 0 mtl_rx_miss_pkt_cnt[0]: 0 mtl_rx_miss_pkt_cnt[1]: 0 mtl_rx_miss_pkt_cnt[3]: 0 mtl_rx_miss_pkt_cnt[4]: 0 mtl_rx_miss_pkt_cnt[5]: 0 mtl_rx_miss_pkt_cnt[6]: 0 mtl_rx_miss_pkt_cnt[7]: 0 mtl_rx_overflow_pkt_cnt[0]: 0 mtl_rx_overflow_pkt_cnt[1]: 0 mtl_rx_overflow_pkt_cnt[3]: 0 mtl_rx_overflow_pkt_cnt[4]: 0 mtl_rx_overflow_pkt_cnt[5]: 0 mtl_rx_overflow_pkt_cnt[6]: 0 mtl_rx_overflow_pkt_cnt[7]: 0 rxch_watchdog_timer[0]: 160 rxch_watchdog_timer[1]: 0 rxch_watchdog_timer[2]: 0 rxch_watchdog_timer[3]: 160 rxch_watchdog_timer[4]: 160 rxch_watchdog_timer[5]: 160 rxch_watchdog_timer[6]: 160 rxch_watchdog_timer[7]: 160 link_partner_pause_frame_cnt: 0 m3_debug_cnt0: 0 m3_debug_cnt1: 0 m3_debug_cnt2: 0 m3_debug_cnt3: 0 m3_debug_cnt4: 0 m3_debug_cnt5: 0 m3_debug_cnt6: 0 m3_debug_cnt7: 0 m3_debug_cnt8: 0 m3_debug_cnt9: 0 m3_debug_cnt10: 0 m3_watchdog_exp_cnt: 40 m3_watchdog_monitor_cnt: 16 m3_debug_cnt13: 0 m3_debug_cnt14: 0 m3_systick_cnt_upper_value: 0 m3_systick_cnt_lower_value: 87630 m3_tx_timeout_port0: 0 m3_tx_timeout_port1: 0 m3_debug_cnt19: 0 m3_tx_pcie_addr_loc_port0[0]: 0 m3_tx_pcie_addr_loc_port0[1]: 0 m3_tx_pcie_addr_loc_port0[2]: 0 m3_tx_pcie_addr_loc_port0[3]: 0 m3_tx_pcie_addr_loc_port0[4]: 0 m3_tx_pcie_addr_loc_port0[5]: 0 m3_tx_pcie_addr_loc_port0[6]: 0 m3_tx_pcie_addr_loc_port0[7]: 0 m3_tx_pcie_addr_loc_port1[0]: 0 m3_tx_pcie_addr_loc_port1[1]: 0 m3_tx_pcie_addr_loc_port1[2]: 0 m3_tx_pcie_addr_loc_port1[3]: 0 m3_tx_pcie_addr_loc_port1[4]: 0 m3_tx_pcie_addr_loc_port1[5]: 0 m3_tx_pcie_addr_loc_port1[6]: 0 m3_tx_pcie_addr_loc_port1[7]: 0 m3_rx_pcie_addr_loc_port0[0]: 0 m3_rx_pcie_addr_loc_port0[1]: 0 m3_rx_pcie_addr_loc_port0[2]: 0 m3_rx_pcie_addr_loc_port0[3]: 0 m3_rx_pcie_addr_loc_port0[4]: 0 m3_rx_pcie_addr_loc_port0[5]: 0 m3_rx_pcie_addr_loc_port0[6]: 0 m3_rx_pcie_addr_loc_port0[7]: 0 m3_rx_pcie_addr_loc_port1[0]: 0 m3_rx_pcie_addr_loc_port1[1]: 0 m3_rx_pcie_addr_loc_port1[2]: 0 m3_rx_pcie_addr_loc_port1[3]: 0 m3_rx_pcie_addr_loc_port1[4]: 0 m3_rx_pcie_addr_loc_port1[5]: 0 m3_rx_pcie_addr_loc_port1[6]: 0 m3_rx_pcie_addr_loc_port1[7]: 0 mbx_pf_sent_vf[0]: 0 mbx_pf_sent_vf[1]: 0 mbx_pf_sent_vf[2]: 0 mbx_pf_rcvd_vf[0]: 0 mbx_pf_rcvd_vf[1]: 0 mbx_pf_rcvd_vf[2]: 0 sh-5.1# ethtool -S enP1p5s0f1 NIC statistics: mmc_tx_octetcount_gb: 7924 mmc_tx_framecount_gb: 48 mmc_tx_broadcastframe_g: 16 mmc_tx_multicastframe_g: 32 mmc_tx_64_octets_gb: 5 mmc_tx_65_to_127_octets_gb: 23 mmc_tx_128_to_255_octets_gb: 6 mmc_tx_256_to_511_octets_gb: 14 mmc_tx_512_to_1023_octets_gb: 0 mmc_tx_1024_to_max_octets_gb: 0 mmc_tx_unicast_gb: 0 mmc_tx_multicast_gb: 32 mmc_tx_broadcast_gb: 16 mmc_tx_underflow_error: 0 mmc_tx_singlecol_g: 0 mmc_tx_multicol_g: 0 mmc_tx_deferred: 0 mmc_tx_latecol: 0 mmc_tx_exesscol: 0 mmc_tx_carrier_error: 0 mmc_tx_octetcount_g: 7924 mmc_tx_framecount_g: 48 mmc_tx_excessdef: 0 mmc_tx_pause_frame: 0 mmc_tx_vlan_frame_g: 0 mmc_tx_lpi_tran_cntr: 0 mmc_rx_lpi_tran_cntr: 0 mmc_rx_framecount_gb: 65 mmc_rx_octetcount_gb: 8358 mmc_rx_octetcount_g: 8358 mmc_rx_broadcastframe_g: 51 mmc_rx_multicastframe_g: 14 mmc_rx_crc_error: 0 mmc_rx_align_error: 0 mmc_rx_run_error: 0 mmc_rx_jabber_error: 0 mmc_rx_undersize_g: 0 mmc_rx_oversize_g: 0 mmc_rx_64_octets_gb: 41 mmc_rx_65_to_127_octets_gb: 6 mmc_rx_128_to_255_octets_gb: 5 mmc_rx_256_to_511_octets_gb: 13 mmc_rx_512_to_1023_octets_gb: 0 mmc_rx_1024_to_max_octets_gb: 0 mmc_rx_unicast_g: 0 mmc_rx_length_error: 0 mmc_rx_autofrangetype: 0 mmc_rx_pause_frames: 0 mmc_rx_fifo_overflow: 0 mmc_rx_vlan_frames_gb: 0 mmc_rx_watchdog_error: 0 mmc_rx_ipc_intr_mask: 0 mmc_rx_ipc_intr: 0 mmc_rx_ipv4_gd: 0 mmc_rx_ipv4_hderr: 0 mmc_rx_ipv4_nopay: 0 mmc_rx_ipv4_frag: 0 mmc_rx_ipv4_udsbl: 0 mmc_rx_ipv4_gd_octets: 0 mmc_rx_ipv4_hderr_octets: 0 mmc_rx_ipv4_nopay_octets: 0 mmc_rx_ipv4_frag_octets: 0 mmc_rx_ipv4_udsbl_octets: 0 mmc_rx_ipv6_gd_octets: 0 mmc_rx_ipv6_hderr_octets: 0 mmc_rx_ipv6_nopay_octets: 0 mmc_rx_ipv6_gd: 0 mmc_rx_ipv6_hderr: 0 mmc_rx_ipv6_nopay: 0 mmc_rx_udp_gd: 0 mmc_rx_udp_err: 0 mmc_rx_tcp_gd: 0 mmc_rx_tcp_err: 0 mmc_rx_icmp_gd: 0 mmc_rx_icmp_err: 0 mmc_rx_udp_gd_octets: 0 mmc_rx_udp_err_octets: 0 mmc_rx_tcp_gd_octets: 0 mmc_rx_tcp_err_octets: 0 mmc_rx_icmp_gd_octets: 0 mmc_rx_icmp_err_octets: 0 mmc_tx_fpe_fragment_cntr: 0 mmc_tx_hold_req_cntr: 0 mmc_rx_packet_assembly_err_cntr: 0 mmc_rx_packet_smd_err_cntr: 0 mmc_rx_packet_assembly_ok_cntr: 0 mmc_rx_fpe_fragment_cntr: 0 tx_underflow: 0 tx_carrier: 0 tx_losscarrier: 0 vlan_tag: 0 tx_deferred: 0 tx_vlan: 0 tx_jabber: 0 tx_frame_flushed: 0 tx_payload_error: 0 tx_ip_header_error: 0 rx_desc: 0 sa_filter_fail: 0 overflow_error: 0 ipc_csum_error: 0 rx_collision: 0 rx_crc_errors: 0 dribbling_bit: 0 rx_length: 0 rx_mii: 0 rx_multicast: 0 rx_gmac_overflow: 0 rx_watchdog: 0 da_rx_filter_fail: 0 sa_rx_filter_fail: 0 rx_missed_cntr: 0 rx_overflow_cntr: 0 rx_vlan: 0 rx_split_hdr_pkt_n: 0 tx_undeflow_irq: 0 tx_process_stopped_irq[0]: 0 tx_process_stopped_irq[1]: 0 tx_process_stopped_irq[2]: 0 tx_process_stopped_irq[3]: 0 tx_process_stopped_irq[4]: 0 tx_process_stopped_irq[5]: 0 tx_process_stopped_irq[6]: 0 tx_process_stopped_irq[7]: 0 tx_jabber_irq: 0 rx_overflow_irq: 0 rx_buf_unav_irq[0]: 0 rx_buf_unav_irq[1]: 0 rx_buf_unav_irq[2]: 0 rx_buf_unav_irq[3]: 0 rx_buf_unav_irq[4]: 0 rx_buf_unav_irq[5]: 0 rx_buf_unav_irq[6]: 0 rx_buf_unav_irq[7]: 0 rx_process_stopped_irq: 0 rx_watchdog_irq: 0 tx_early_irq: 0 fatal_bus_error_irq[0]: 0 fatal_bus_error_irq[1]: 0 fatal_bus_error_irq[2]: 0 fatal_bus_error_irq[3]: 0 fatal_bus_error_irq[4]: 0 fatal_bus_error_irq[5]: 0 fatal_bus_error_irq[6]: 0 fatal_bus_error_irq[7]: 0 rx_early_irq: 0 threshold: 1 tx_pkt_n[0]: 48 tx_pkt_n[1]: 0 tx_pkt_n[2]: 0 tx_pkt_n[3]: 0 tx_pkt_n[4]: 0 tx_pkt_n[5]: 0 tx_pkt_n[6]: 0 tx_pkt_n[7]: 0 tx_pkt_errors_n[0]: 0 tx_pkt_errors_n[1]: 0 tx_pkt_errors_n[2]: 0 tx_pkt_errors_n[3]: 0 tx_pkt_errors_n[4]: 0 tx_pkt_errors_n[5]: 0 tx_pkt_errors_n[6]: 0 tx_pkt_errors_n[7]: 0 rx_pkt_n[0]: 65 rx_pkt_n[1]: 0 rx_pkt_n[2]: 0 rx_pkt_n[3]: 0 rx_pkt_n[4]: 0 rx_pkt_n[5]: 0 rx_pkt_n[6]: 0 rx_pkt_n[7]: 0 normal_irq_n[0]: 62 normal_irq_n[1]: 0 normal_irq_n[2]: 0 normal_irq_n[3]: 62 normal_irq_n[4]: 62 normal_irq_n[5]: 62 normal_irq_n[6]: 62 normal_irq_n[7]: 62 rx_normal_irq_n[0]: 58 rx_normal_irq_n[1]: 0 rx_normal_irq_n[2]: 0 rx_normal_irq_n[3]: 0 rx_normal_irq_n[4]: 0 rx_normal_irq_n[5]: 0 rx_normal_irq_n[6]: 0 rx_normal_irq_n[7]: 0 napi_poll_tx[0]: 63 napi_poll_tx[1]: 0 napi_poll_tx[2]: 0 napi_poll_tx[3]: 0 napi_poll_tx[4]: 0 napi_poll_tx[5]: 0 napi_poll_tx[6]: 0 napi_poll_tx[7]: 0 napi_poll_rx[0]: 58 napi_poll_rx[1]: 0 napi_poll_rx[2]: 0 napi_poll_rx[3]: 0 napi_poll_rx[4]: 0 napi_poll_rx[5]: 0 napi_poll_rx[6]: 0 napi_poll_rx[7]: 0 tx_normal_irq_n[0]: 58 tx_normal_irq_n[1]: 0 tx_normal_irq_n[2]: 0 tx_normal_irq_n[3]: 0 tx_normal_irq_n[4]: 0 tx_normal_irq_n[5]: 0 tx_normal_irq_n[6]: 0 tx_normal_irq_n[7]: 0 tx_clean[0]: 63 tx_clean[1]: 0 tx_clean[2]: 0 tx_clean[3]: 0 tx_clean[4]: 0 tx_clean[5]: 0 tx_clean[6]: 0 tx_clean[7]: 0 tx_set_ic_bit: 0 irq_receive_pmt_irq_n: 0 mmc_tx_irq_n: 0 mmc_rx_irq_n: 0 mmc_rx_csum_offload_irq_n: 0 irq_tx_path_in_lpi_mode_n: 0 irq_tx_path_exit_lpi_mode_n: 0 irq_rx_path_in_lpi_mode_n: 0 irq_rx_path_exit_lpi_mode_n: 0 phy_eee_wakeup_error_n: 0 ip_hdr_err: 0 ip_payload_err: 0 ip_csum_bypassed: 0 ipv4_pkt_rcvd: 0 ipv6_pkt_rcvd: 0 no_ptp_rx_msg_type_ext: 0 ptp_rx_msg_type_sync: 0 ptp_rx_msg_type_follow_up: 0 ptp_rx_msg_type_delay_req: 0 ptp_rx_msg_type_delay_resp: 0 ptp_rx_msg_type_pdelay_req: 0 ptp_rx_msg_type_pdelay_resp: 0 ptp_rx_msg_type_pdelay_follow_up: 0 ptp_rx_msg_type_announce: 0 ptp_rx_msg_type_management: 0 ptp_rx_msg_pkt_reserved_type: 0 ptp_frame_type: 0 ptp_ver: 0 timestamp_dropped: 0 av_pkt_rcvd: 0 av_tagged_pkt_rcvd: 0 vlan_tag_priority_val: 0 l3_filter_match: 0 l4_filter_match: 0 l3_l4_filter_no_match: 0 irq_pcs_ane_n: 0 irq_pcs_link_n: 0 irq_rgmii_n: 0 mtl_tx_status_fifo_full: 0 mtl_tx_fifo_not_empty[0]: 0 mtl_tx_fifo_not_empty[1]: 0 mtl_tx_fifo_not_empty[2]: 0 mtl_tx_fifo_not_empty[3]: 0 mtl_tx_fifo_not_empty[4]: 0 mtl_tx_fifo_not_empty[5]: 0 mtl_tx_fifo_not_empty[6]: 0 mtl_tx_fifo_not_empty[7]: 0 mmtl_fifo_ctrl[0]: 0 mmtl_fifo_ctrl[1]: 0 mmtl_fifo_ctrl[3]: 0 mmtl_fifo_ctrl[4]: 0 mmtl_fifo_ctrl[5]: 0 mmtl_fifo_ctrl[6]: 0 mmtl_fifo_ctrl[7]: 0 mtl_tx_fifo_read_ctrl_write[0]: 0 mtl_tx_fifo_read_ctrl_write[1]: 0 mtl_tx_fifo_read_ctrl_write[2]: 0 mtl_tx_fifo_read_ctrl_write[3]: 0 mtl_tx_fifo_read_ctrl_write[4]: 0 mtl_tx_fifo_read_ctrl_write[5]: 0 mtl_tx_fifo_read_ctrl_write[6]: 0 mtl_tx_fifo_read_ctrl_write[7]: 0 mtl_tx_fifo_read_ctrl_wait[0]: 0 mtl_tx_fifo_read_ctrl_wait[1]: 0 mtl_tx_fifo_read_ctrl_wait[2]: 0 mtl_tx_fifo_read_ctrl_wait[3]: 0 mtl_tx_fifo_read_ctrl_wait[4]: 0 mtl_tx_fifo_read_ctrl_wait[5]: 0 mtl_tx_fifo_read_ctrl_wait[6]: 0 mtl_tx_fifo_read_ctrl_wait[7]: 0 mtl_tx_fifo_read_ctrl_read[0]: 0 mtl_tx_fifo_read_ctrl_read[1]: 0 mtl_tx_fifo_read_ctrl_read[2]: 0 mtl_tx_fifo_read_ctrl_read[3]: 0 mtl_tx_fifo_read_ctrl_read[4]: 0 mtl_tx_fifo_read_ctrl_read[5]: 0 mtl_tx_fifo_read_ctrl_read[6]: 0 mtl_tx_fifo_read_ctrl_read[7]: 0 mtl_tx_fifo_read_ctrl_idle[0]: 0 mtl_tx_fifo_read_ctrl_idle[1]: 0 mtl_tx_fifo_read_ctrl_idle[2]: 0 mtl_tx_fifo_read_ctrl_idle[3]: 0 mtl_tx_fifo_read_ctrl_idle[4]: 0 mtl_tx_fifo_read_ctrl_idle[5]: 0 mtl_tx_fifo_read_ctrl_idle[6]: 0 mtl_tx_fifo_read_ctrl_idle[7]: 0 mac_tx_in_pause[0]: 0 mac_tx_in_pause[1]: 0 mac_tx_in_pause[2]: 0 mac_tx_in_pause[3]: 0 mac_tx_in_pause[4]: 0 mac_tx_in_pause[5]: 0 mac_tx_in_pause[6]: 0 mac_tx_in_pause[7]: 0 mac_tx_frame_ctrl_xfer: 0 mac_tx_frame_ctrl_idle: 0 mac_tx_frame_ctrl_wait: 0 mac_tx_frame_ctrl_pause: 0 mac_gmii_tx_proto_engine: 0 mtl_rx_fifo_fill_level_full[0]: 0 mtl_rx_fifo_fill_level_full[1]: 0 mtl_rx_fifo_fill_level_full[2]: 0 mtl_rx_fifo_fill_level_full[3]: 0 mtl_rx_fifo_fill_level_full[4]: 0 mtl_rx_fifo_fill_level_full[5]: 0 mtl_rx_fifo_fill_level_full[6]: 0 mtl_rx_fifo_fill_level_full[7]: 0 mtl_rx_fifo_fill_above_thresh[0]: 0 mtl_rx_fifo_fill_above_thresh[1]: 0 mtl_rx_fifo_fill_above_thresh[2]: 0 mtl_rx_fifo_fill_above_thresh[3]: 0 mtl_rx_fifo_fill_above_thresh[4]: 0 mtl_rx_fifo_fill_above_thresh[5]: 0 mtl_rx_fifo_fill_above_thresh[6]: 0 mtl_rx_fifo_fill_above_thresh[7]: 0 mtl_rx_fifo_fill_below_thresh[0]: 0 mtl_rx_fifo_fill_below_thresh[1]: 0 mtl_rx_fifo_fill_below_thresh[2]: 0 mtl_rx_fifo_fill_below_thresh[3]: 0 mtl_rx_fifo_fill_below_thresh[4]: 0 mtl_rx_fifo_fill_below_thresh[5]: 0 mtl_rx_fifo_fill_below_thresh[6]: 0 mtl_rx_fifo_fill_below_thresh[7]: 0 mtl_rx_fifo_fill_level_empty[0]: 0 mtl_rx_fifo_fill_level_empty[1]: 0 mtl_rx_fifo_fill_level_empty[2]: 0 mtl_rx_fifo_fill_level_empty[3]: 0 mtl_rx_fifo_fill_level_empty[4]: 0 mtl_rx_fifo_fill_level_empty[5]: 0 mtl_rx_fifo_fill_level_empty[6]: 0 mtl_rx_fifo_fill_level_empty[7]: 0 mtl_rx_fifo_read_ctrl_flush[0]: 0 mtl_rx_fifo_read_ctrl_flush[1]: 0 mtl_rx_fifo_read_ctrl_flush[2]: 0 mtl_rx_fifo_read_ctrl_flush[3]: 0 mtl_rx_fifo_read_ctrl_flush[4]: 0 mtl_rx_fifo_read_ctrl_flush[5]: 0 mtl_rx_fifo_read_ctrl_flush[6]: 0 mtl_rx_fifo_read_ctrl_flush[7]: 0 mtl_rx_fifo_read_ctrl_read[0]: 0 mtl_rx_fifo_read_ctrl_read[1]: 0 mtl_rx_fifo_read_ctrl_read[2]: 0 mtl_rx_fifo_read_ctrl_read[3]: 0 mtl_rx_fifo_read_ctrl_read[4]: 0 mtl_rx_fifo_read_ctrl_read[5]: 0 mtl_rx_fifo_read_ctrl_read[6]: 0 mtl_rx_fifo_read_ctrl_read[7]: 0 mtl_rx_fifo_read_ctrl_status[0]: 0 mtl_rx_fifo_read_ctrl_status[1]: 0 mtl_rx_fifo_read_ctrl_status[2]: 0 mtl_rx_fifo_read_ctrl_status[3]: 0 mtl_rx_fifo_read_ctrl_status[4]: 0 mtl_rx_fifo_read_ctrl_status[5]: 0 mtl_rx_fifo_read_ctrl_status[6]: 0 mtl_rx_fifo_read_ctrl_status[7]: 0 mtl_rx_fifo_read_ctrl_idle[0]: 0 mtl_rx_fifo_read_ctrl_idle[1]: 0 mtl_rx_fifo_read_ctrl_idle[2]: 0 mtl_rx_fifo_read_ctrl_idle[3]: 0 mtl_rx_fifo_read_ctrl_idle[4]: 0 mtl_rx_fifo_read_ctrl_idle[5]: 0 mtl_rx_fifo_read_ctrl_idle[6]: 0 mtl_rx_fifo_read_ctrl_idle[7]: 0 mtl_rx_fifo_ctrl_active[0]: 0 mtl_rx_fifo_ctrl_active[1]: 0 mtl_rx_fifo_ctrl_active[2]: 0 mtl_rx_fifo_ctrl_active[3]: 0 mtl_rx_fifo_ctrl_active[4]: 0 mtl_rx_fifo_ctrl_active[5]: 0 mtl_rx_fifo_ctrl_active[6]: 0 mtl_rx_fifo_ctrl_active[7]: 0 mac_rx_frame_ctrl_fifo: 0 mac_gmii_rx_proto_engine: 0 tx_tso_frames[0]: 0 tx_tso_frames[1]: 0 tx_tso_frames[2]: 0 tx_tso_frames[3]: 0 tx_tso_frames[4]: 0 tx_tso_frames[5]: 0 tx_tso_frames[6]: 0 tx_tso_frames[7]: 0 tx_tso_nfrags[0]: 0 tx_tso_nfrags[1]: 0 tx_tso_nfrags[2]: 0 tx_tso_nfrags[3]: 0 tx_tso_nfrags[4]: 0 tx_tso_nfrags[5]: 0 tx_tso_nfrags[6]: 0 tx_tso_nfrags[7]: 0 txch_status[0]: 4 txch_status[1]: 0 txch_status[2]: 0 txch_status[3]: 0 txch_status[4]: 0 txch_status[5]: 0 txch_status[6]: 0 txch_status[7]: 0 txch_control[0]: 1052673 txch_control[1]: 4096 txch_control[2]: 0 txch_control[3]: 0 txch_control[4]: 1048577 txch_control[5]: 269484033 txch_control[6]: 269484033 txch_control[7]: 269484033 txch_desc_list_haddr[0]: 16 txch_desc_list_haddr[1]: 0 txch_desc_list_haddr[2]: 0 txch_desc_list_haddr[3]: 0 txch_desc_list_haddr[4]: 16 txch_desc_list_haddr[5]: 16 txch_desc_list_haddr[6]: 16 txch_desc_list_haddr[7]: 16 txch_desc_list_laddr[0]: 4294909952 txch_desc_list_laddr[1]: 0 txch_desc_list_laddr[2]: 0 txch_desc_list_laddr[3]: 0 txch_desc_list_laddr[4]: 4294901760 txch_desc_list_laddr[5]: 4294885376 txch_desc_list_laddr[6]: 4294868992 txch_desc_list_laddr[7]: 4294852608 txch_desc_ring_len[0]: 511 txch_desc_ring_len[1]: 0 txch_desc_ring_len[2]: 0 txch_desc_ring_len[3]: 0 txch_desc_ring_len[4]: 511 txch_desc_ring_len[5]: 511 txch_desc_ring_len[6]: 511 txch_desc_ring_len[7]: 511 txch_desc_curr_haddr[0]: 0 txch_desc_curr_haddr[1]: 0 txch_desc_curr_haddr[2]: 0 txch_desc_curr_haddr[3]: 0 txch_desc_curr_haddr[4]: 0 txch_desc_curr_haddr[5]: 0 txch_desc_curr_haddr[6]: 0 txch_desc_curr_haddr[7]: 0 txch_desc_curr_laddr[0]: 4294910720 txch_desc_curr_laddr[1]: 0 txch_desc_curr_laddr[2]: 0 txch_desc_curr_laddr[3]: 0 txch_desc_curr_laddr[4]: 4294901760 txch_desc_curr_laddr[5]: 4294885376 txch_desc_curr_laddr[6]: 4294868992 txch_desc_curr_laddr[7]: 4294852608 txch_desc_tail[0]: 4294910720 txch_desc_tail[1]: 0 txch_desc_tail[2]: 0 txch_desc_tail[3]: 0 txch_desc_tail[4]: 4294901760 txch_desc_tail[5]: 4294885376 txch_desc_tail[6]: 4294868992 txch_desc_tail[7]: 4294852608 txch_desc_buf_haddr[0]: 16 txch_desc_buf_haddr[1]: 0 txch_desc_buf_haddr[2]: 0 txch_desc_buf_haddr[3]: 0 txch_desc_buf_haddr[4]: 0 txch_desc_buf_haddr[5]: 0 txch_desc_buf_haddr[6]: 0 txch_desc_buf_haddr[7]: 0 txch_desc_buf_laddr[0]: 4269193218 txch_desc_buf_laddr[1]: 0 txch_desc_buf_laddr[2]: 0 txch_desc_buf_laddr[3]: 0 txch_desc_buf_laddr[4]: 0 txch_desc_buf_laddr[5]: 0 txch_desc_buf_laddr[6]: 0 txch_desc_buf_laddr[7]: 0 txch_sw_cur_tx[0]: 48 txch_sw_cur_tx[1]: 0 txch_sw_cur_tx[2]: 0 txch_sw_cur_tx[3]: 0 txch_sw_cur_tx[4]: 0 txch_sw_cur_tx[5]: 0 txch_sw_cur_tx[6]: 0 txch_sw_cur_tx[7]: 0 txch_sw_dirty_tx[0]: 48 txch_sw_dirty_tx[1]: 0 txch_sw_dirty_tx[2]: 0 txch_sw_dirty_tx[3]: 0 txch_sw_dirty_tx[4]: 0 txch_sw_dirty_tx[5]: 0 txch_sw_dirty_tx[6]: 0 txch_sw_dirty_tx[7]: 0 rxch_status[0]: 4 rxch_status[1]: 0 rxch_status[2]: 0 rxch_status[3]: 0 rxch_status[4]: 0 rxch_status[5]: 0 rxch_status[6]: 0 rxch_status[7]: 0 rxch_control[0]: 1051649 rxch_control[1]: 0 rxch_control[2]: 0 rxch_control[3]: 1051649 rxch_control[4]: 1051649 rxch_control[5]: 1051649 rxch_control[6]: 1051649 rxch_control[7]: 1051649 rxch_desc_list_haddr[0]: 16 rxch_desc_list_haddr[1]: 0 rxch_desc_list_haddr[2]: 0 rxch_desc_list_haddr[3]: 16 rxch_desc_list_haddr[4]: 16 rxch_desc_list_haddr[5]: 16 rxch_desc_list_haddr[6]: 16 rxch_desc_list_haddr[7]: 16 rxch_desc_list_laddr[0]: 4294959104 rxch_desc_list_laddr[1]: 0 rxch_desc_list_laddr[2]: 0 rxch_desc_list_laddr[3]: 4294950912 rxch_desc_list_laddr[4]: 4294942720 rxch_desc_list_laddr[5]: 4294934528 rxch_desc_list_laddr[6]: 4294926336 rxch_desc_list_laddr[7]: 4294918144 rxch_desc_ring_len[0]: 511 rxch_desc_ring_len[1]: 0 rxch_desc_ring_len[2]: 0 rxch_desc_ring_len[3]: 511 rxch_desc_ring_len[4]: 511 rxch_desc_ring_len[5]: 511 rxch_desc_ring_len[6]: 511 rxch_desc_ring_len[7]: 511 rxch_desc_curr_haddr[0]: 0 rxch_desc_curr_haddr[1]: 0 rxch_desc_curr_haddr[2]: 0 rxch_desc_curr_haddr[3]: 0 rxch_desc_curr_haddr[4]: 0 rxch_desc_curr_haddr[5]: 0 rxch_desc_curr_haddr[6]: 0 rxch_desc_curr_haddr[7]: 0 rxch_desc_curr_laddr[0]: 4294961440 rxch_desc_curr_laddr[1]: 0 rxch_desc_curr_laddr[2]: 0 rxch_desc_curr_laddr[3]: 4294951168 rxch_desc_curr_laddr[4]: 4294942976 rxch_desc_curr_laddr[5]: 4294934784 rxch_desc_curr_laddr[6]: 4294926592 rxch_desc_curr_laddr[7]: 4294918400 rxch_desc_tail[0]: 4294961184 rxch_desc_tail[1]: 0 rxch_desc_tail[2]: 0 rxch_desc_tail[3]: 4294959104 rxch_desc_tail[4]: 4294950912 rxch_desc_tail[5]: 4294942720 rxch_desc_tail[6]: 4294934528 rxch_desc_tail[7]: 4294926336 rxch_desc_buf_haddr[0]: 16 rxch_desc_buf_haddr[1]: 0 rxch_desc_buf_haddr[2]: 0 rxch_desc_buf_haddr[3]: 16 rxch_desc_buf_haddr[4]: 16 rxch_desc_buf_haddr[5]: 16 rxch_desc_buf_haddr[6]: 16 rxch_desc_buf_haddr[7]: 16 rxch_desc_buf_laddr[0]: 4294074368 rxch_desc_buf_laddr[1]: 0 rxch_desc_buf_laddr[2]: 0 rxch_desc_buf_laddr[3]: 4292493312 rxch_desc_buf_laddr[4]: 4290396160 rxch_desc_buf_laddr[5]: 4288299008 rxch_desc_buf_laddr[6]: 4286201856 rxch_desc_buf_laddr[7]: 4284104704 rxch_sw_cur_rx[0]: 130 rxch_sw_cur_rx[1]: 0 rxch_sw_cur_rx[2]: 0 rxch_sw_cur_rx[3]: 0 rxch_sw_cur_rx[4]: 0 rxch_sw_cur_rx[5]: 0 rxch_sw_cur_rx[6]: 0 rxch_sw_cur_rx[7]: 0 rxch_sw_dirty_rx[0]: 130 rxch_sw_dirty_rx[1]: 0 rxch_sw_dirty_rx[2]: 0 rxch_sw_dirty_rx[3]: 0 rxch_sw_dirty_rx[4]: 0 rxch_sw_dirty_rx[5]: 0 rxch_sw_dirty_rx[6]: 0 rxch_sw_dirty_rx[7]: 0 total_interrupts: 62 lpi_intr_n: 0 pmt_intr_n: 0 event_intr_n: 0 tx_intr_n: 0 rx_intr_n: 58 xpcs_intr_n: 0 phy_intr_n: 4 sw_msi_n: 0 mtl_tx_underflow[0]: 0 mtl_tx_underflow[1]: 0 mtl_tx_underflow[3]: 0 mtl_tx_underflow[4]: 0 mtl_tx_underflow[5]: 0 mtl_tx_underflow[6]: 0 mtl_tx_underflow[7]: 0 mtl_rx_miss_pkt_cnt[0]: 0 mtl_rx_miss_pkt_cnt[1]: 0 mtl_rx_miss_pkt_cnt[3]: 0 mtl_rx_miss_pkt_cnt[4]: 0 mtl_rx_miss_pkt_cnt[5]: 0 mtl_rx_miss_pkt_cnt[6]: 0 mtl_rx_miss_pkt_cnt[7]: 0 mtl_rx_overflow_pkt_cnt[0]: 0 mtl_rx_overflow_pkt_cnt[1]: 0 mtl_rx_overflow_pkt_cnt[3]: 0 mtl_rx_overflow_pkt_cnt[4]: 0 mtl_rx_overflow_pkt_cnt[5]: 0 mtl_rx_overflow_pkt_cnt[6]: 0 mtl_rx_overflow_pkt_cnt[7]: 0 rxch_watchdog_timer[0]: 160 rxch_watchdog_timer[1]: 0 rxch_watchdog_timer[2]: 0 rxch_watchdog_timer[3]: 160 rxch_watchdog_timer[4]: 160 rxch_watchdog_timer[5]: 160 rxch_watchdog_timer[6]: 160 rxch_watchdog_timer[7]: 160 link_partner_pause_frame_cnt: 0 m3_debug_cnt0: 0 m3_debug_cnt1: 0 m3_debug_cnt2: 0 m3_debug_cnt3: 0 m3_debug_cnt4: 0 m3_debug_cnt5: 0 m3_debug_cnt6: 0 m3_debug_cnt7: 0 m3_debug_cnt8: 0 m3_debug_cnt9: 0 m3_debug_cnt10: 0 m3_watchdog_exp_cnt: 42 m3_watchdog_monitor_cnt: 16 m3_debug_cnt13: 0 m3_debug_cnt14: 0 m3_systick_cnt_upper_value: 0 m3_systick_cnt_lower_value: 92087 m3_tx_timeout_port0: 0 m3_tx_timeout_port1: 0 m3_debug_cnt19: 0 m3_tx_pcie_addr_loc_port0[0]: 0 m3_tx_pcie_addr_loc_port0[1]: 0 m3_tx_pcie_addr_loc_port0[2]: 0 m3_tx_pcie_addr_loc_port0[3]: 0 m3_tx_pcie_addr_loc_port0[4]: 0 m3_tx_pcie_addr_loc_port0[5]: 0 m3_tx_pcie_addr_loc_port0[6]: 0 m3_tx_pcie_addr_loc_port0[7]: 0 m3_tx_pcie_addr_loc_port1[0]: 0 m3_tx_pcie_addr_loc_port1[1]: 0 m3_tx_pcie_addr_loc_port1[2]: 0 m3_tx_pcie_addr_loc_port1[3]: 0 m3_tx_pcie_addr_loc_port1[4]: 0 m3_tx_pcie_addr_loc_port1[5]: 0 m3_tx_pcie_addr_loc_port1[6]: 0 m3_tx_pcie_addr_loc_port1[7]: 0 m3_rx_pcie_addr_loc_port0[0]: 0 m3_rx_pcie_addr_loc_port0[1]: 0 m3_rx_pcie_addr_loc_port0[2]: 0 m3_rx_pcie_addr_loc_port0[3]: 0 m3_rx_pcie_addr_loc_port0[4]: 0 m3_rx_pcie_addr_loc_port0[5]: 0 m3_rx_pcie_addr_loc_port0[6]: 0 m3_rx_pcie_addr_loc_port0[7]: 0 m3_rx_pcie_addr_loc_port1[0]: 0 m3_rx_pcie_addr_loc_port1[1]: 0 m3_rx_pcie_addr_loc_port1[2]: 0 m3_rx_pcie_addr_loc_port1[3]: 0 m3_rx_pcie_addr_loc_port1[4]: 0 m3_rx_pcie_addr_loc_port1[5]: 0 m3_rx_pcie_addr_loc_port1[6]: 0 m3_rx_pcie_addr_loc_port1[7]: 0 mbx_pf_sent_vf[0]: 0 mbx_pf_sent_vf[1]: 0 mbx_pf_sent_vf[2]: 0 mbx_pf_rcvd_vf[0]: 0 mbx_pf_rcvd_vf[1]: 0 mbx_pf_rcvd_vf[2]: 0Copy to clipboard ### ifconfig Sample output of `ifconfig` command to display the network interface information is as follows: ifconfig enP1p5s0f0 Link encap:Ethernet HWaddr F2:D0:DB:1B:C4:A7 inet addr:169.254.227.235 Bcast:169.254.255.255 Mask:255.255.0.0 ine t6 addr: fe80::533c:8ed6:557:3860/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:19 errors:0 dropped:0 overruns:0 frame:0 TX packets:36 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:3416 (3.3 KiB) TX bytes:5559 (5.4 KiB) Interrupt:249 enP1p5s0f1 Link encap:Ethernet HWaddr 42:0D:BE:EB:D6:25 inet addr:169.254.57.126 Bcast:169.254.255.255 Mask:255.255.0.0 inet6 addr: fe80::77b:2036:be65:dd29/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:23 errors:0 dropped:0 overruns:0 frame:0 TX packets:39 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:4059 (3.9 KiB) TX bytes:5624 (5.4 KiB) Interrupt:253 Copy to clipboard ### netstat Sample output of `netstat` command to retrieve network interface table is as follows: netstat Active Internet connections (w/o servers) Proto Recv-Q Send-Q Local Address Foreign Address State Active UNIX domain sockets (w/o servers) Proto RefCnt Flags Type State I-Node Path unix 3 [ ] STREAM CONNECTED 21526 unix 3 [ ] STREAM CONNECTED 4813 unix 3 [ ] STREAM CONNECTED 12072 unix 2 [ ] DGRAM CONNECTED 12903 unix 3 [ ] STREAM CONNECTED 16907 /run/systemd/journal/stdout unix 3 [ ] STREAM CONNECTED 4877 unix 2 [ ] DGRAM CONNECTED 14242 unix 3 [ ] STREAM CONNECTED 17522 /run/systemd/journal/stdout Copy to clipboard ### tcpdump Sample `tcpdump` command to analyze the network traffic is as follows: tcpdump -i any -s 0 -w /var/log/tcpdump.pcapCopy to clipboard ### Route tables Sample output of `ip` command to retrieve the IP routing table is as follows: ip r s default dev enP1p5s0f0 scope link src 169.254.22.123 metric 1001002 169.254.0.0/16 dev enP1p5s0f0 scope link src 169.254.22.123 metric 1002 Copy to clipboard Sample output of `netstat` command to retrieve the IP routing table is as follows: netstat -r Kernel IP routing table Destination Gateway Genmask Flags MSS Window irtt Iface default * 0.0.0.0 U 0 0 0 enP1p5s0f0 169.254.0.0 * 255.255.0.0 U 0 0 0 enP1p5s0f0 Copy to clipboard Last Published: Jul 11, 2024 [Previous Topic Architecture](https://docs.qualcomm.com/bundle/publicresource/80-70014-26/topics/architecture.md) [Next Topic Bring up](https://docs.qualcomm.com/bundle/publicresource/80-70014-26/topics/bring_up.md)