# Power states and features The power saving states, also referred to as sleep states enable you to review the power states before, during, and after running an application. The process ensures a comprehensive power sanity check of the platform. - **[SoC Power Saving states](https://docs.qualcomm.com/doc/80-70014-30/topic/socpowerstate.html)** The SoC supports multiple System Sleep states based on the requirement of resources, such as, double data rate (DDR), crystal oscillator (XO) clock, digital power supply (`Chip_CX`), and memory domains power supply (`Chip_MX`). - **[CPU power management](https://docs.qualcomm.com/doc/80-70014-30/topic/cpupowermanagement.html)** CPU power management techniques aim to reduce the CPU's power consumption during both active and idle periods by using resources efficiently. **Parent Topic:** [Power management](https://docs.qualcomm.com/doc/80-70014-30/topic/powermanagement.html) Last Published: Jul 15, 2024 [Previous Topic Architecture](https://docs.qualcomm.com/bundle/publicresource/80-70014-30/topics/architecture.md) [Next Topic SoC Power Saving states](https://docs.qualcomm.com/bundle/publicresource/80-70014-30/topics/socpowerstate.md)