# SoC Power Saving states

Source: [https://docs.qualcomm.com/doc/80-70014-30/topic/socpowerstate.html](https://docs.qualcomm.com/doc/80-70014-30/topic/socpowerstate.html)

The SoC supports multiple System Sleep states based on the requirement of resources,
        such as, double data rate (DDR), crystal oscillator (XO) clock, digital power supply
            (`Chip_CX`), and memory domains power supply
        (`Chip_MX`).

As the sleep state transitions from Active state to SoC Sleep state, the platform's power
            consumption decreases.

For example, when the platform is idle with no use cases running, it is in the SoC Sleep
            state (AOSD). This is the deepest sleep state and consumes the least power. During this
            state, the resources, such as, XO clock, memory, and power supply of digital, and memory
            domains also enter their respective sleep states.

The following table lists the supported SoC Sleep states.

Note: The SoC Power states listed in the table are for information
                only. You do not have access to enable or disable Sleep Power states.

Table : SoC Sleep Power states

| Power state | Resource states |
| --- | --- |
| Active | <ul class="ul" id="socpowerstate__ul_gxp_sn2_q1c"><br>                                    <li class="li">XO clock on</li><br><br>                                    <li class="li"><code class="ph codeph">Chip_CX</code> (Digital) and<br>                                            <code class="ph codeph">Chip_MX</code> (Memory) power domains operate<br>                                        at active voltage level</li><br><br>                                </ul> |
| DDR collapse | <ul class="ul" id="socpowerstate__ul_dy4_f42_q1c"><br>                                    <li class="li">Memory in Self-Refresh mode</li><br><br>                                    <li class="li">XO clock on</li><br><br>                                    <li class="li"><code class="ph codeph">Chip_CX</code> and <code class="ph codeph">Chip_MX</code> power<br>                                        domains are configured with active voltage</li><br><br>                                </ul> |
| XO shutdown (CXSD) | <ul class="ul" id="socpowerstate__ul_snn_n42_q1c"><br>                                    <li class="li">Memory in Self-Refresh mode</li><br><br>                                    <li class="li">XO clock off</li><br><br>                                    <li class="li"><code class="ph codeph">Chip_CX</code> power domain configured with least<br>                                        voltage</li><br><br>                                    <li class="li"><code class="ph codeph">Chip_MX</code> configured with active voltage</li><br><br>                                </ul> |
| SoC sleep (AOSD) | <ul class="ul" id="socpowerstate__ul_x35_t42_q1c"><br>                                    <li class="li">Deepest system sleep state where the system is expected to<br>                                        achieve lowest sleep power, this is the most desired state<br>                                        for power management</li><br><br>                                    <li class="li">Memory in Self-Refresh mode</li><br><br>                                    <li class="li">XO clock off</li><br><br>                                    <li class="li"><code class="ph codeph">Chip_CX</code> and <code class="ph codeph">Chip_MX</code> power<br>                                        domains configured with least voltage</li><br><br>                                </ul> |

## Check SoC Sleep state

To retrieve SoC sleep statistics run the following commands:

mount -t debugfs none /sys/kernel/debug
    Copy to clipboard

    cat /sys/kernel/debug/qcom_stats/aosdCopy to clipboard

    cat /sys/kernel/debug/qcom_stats/cxsdCopy to clipboard

Following is a sample output:

<samp class="ph systemoutput">Count: 3 </samp>

<samp class="ph systemoutput">Last Entered At: 1087943710378 </samp>

<samp class="ph systemoutput">Last Exited At: 1088442890377 </samp>

<samp class="ph systemoutput">Accumulated Duration: 6668562002</samp>

The following table explains the fields of the output:

Table : SoC Power states output fields

| Field | Explanation |
| --- | --- |
| `Count` | <ul class="ul" id="socpowerstate__ul_ec5_kjt_s1c"><br>                                        <li class="li">Indicates the number of times the SoC entered a<br>                                            particular power state</li><br><br>                                        <li class="li">Non-zero count indicates that the SoC has exercised<br>                                            sleep states</li><br><br>                                    </ul> |
| `Last Entered At` | Indicates the last sleep entry timestamp in ticks |
| `Last Exited At` | Indicates the last sleep exit timestamp in ticks |
| `Accumulated duration` | Total amount of time in sleep, represented in ticks |

Note: Ticks are based on the frequency of XO clock 19.2
                    MHz.

**Parent Topic:** [Power states and features](https://docs.qualcomm.com/doc/80-70014-30/topic/powerfeatures.html)

Last Published: Jul 15, 2024

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