# PMIC
Source: [https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html)
The power management integrated circuit (PMIC) is a specialized electronic component
that manages various power supply requirements within a device.
The PMIC oversees various power supply requirements, including:
- Battery management tasks such as charging and gauging.
- User interface components such as flash, display, and RGB color space.
- System-on-chip (SoC) infrastructure elements such as clocks, analog-to-digital
converters (ADC), and power-on (PON) functions.
Some PMIC resources can be customized in XBL through the XB\_CFG image. Configuring the
PMIC XBL DT properties ensure optimal performance and integration. These customizations
can be performed using a DT framework.
The PMIC DTSI files for the Linux host machine are at
boot\_images/boot/Settings/Soc/<Chipset>/Core/PMIC/pm.dtsi,
access.dtsi
The table lists the PMIC DT properties:
| Property name | Property description | Data type | Possible values/value range | Device behavior |
| --- | --- | --- | --- | --- |
| `s2-kpdpwr` | Enable: PMIC power key pin reset configuration. | Boolean |
| The power key is configured to reset or shut down the device when it
is asserted for a specific duration specified in
`s1-ms` and `s2-ms`
properties.
Property to allow the DT setting to take effect. If PM\_FALSE, the
default hardware settings are programmed. |
| `s2-kpdpwr` | `reset-type`: Select the reset type. | UINT8 |
PM_WARM_RESET
PM_HARD_RESET
PM_SHUTDOWN
|
- WARM_RESET is used for crash dump collection.
- HARD_RESET is used for rebooting the device.
- SHUTDOWN is used for shutting down the device
|
| `s2-kpdpwr` | `s1-ms`: Assertion time (to be chosen from the
possible values). | UINT32 |
- 0
- 32
- 56
- 80
- 128
- 184
- 272
- 408
- 608
- 904
- 1352
- 2048
- 3072
- 4480
- 6720
- 10256
| `KPDPWR_N_RESET_S1_TIMER` in ms. |
| `s2-kpdpwr` | `s2-ms`: Assertion time (to be chosen from the
possible values). | UINT32 |
- 0
- 10
- 50
- 100
- 250
- 500
- 1000
- 2000
| `KPDPWR_N_RESET_S2_TIMER` in ms. |
| `s2-kpdpwr-resin` | Enable: Configuration to update the PMIC power and Resin key
combination. | Boolean | | Both power and Resin key combinations for the duration specified in
the `s1-ms` and `s2-ms` properties.
.
The property allows the DT setting to take effect. If
`PM_FALSE`, the hardware default settings are
programmed. |
| `s2-kpdpwr-resin` | `reset-type`: Select the reset type. | UINT32 |
PM_WARM_RESET
PM_HARD_RESET
PM_SHUTDOWN
|
WARM_RESET is used for crash dump
collection.
HARD_RESET is used for rebooting the
device.
SHUTDOWN is used for shutting down the
device
|
| `s2-kpdpwr-resin` | `s1-ms`: Assertion time value must choose from
possible values. | UINT32 |
- 0
- 32
- 56
- 80
- 128
- 184
- 272
- 408
- 608
- 904
- 1352
- 2048
- 3072
- 4480
- 6720
- 10256
| `RESIN_AND_KPDPWR_RESET_S1_TIMER` in ms |
| `s2-kpdpwr-resin` | `s2-ms`: Assertion time value must choose from
possible values. | UINT32 |
- 0
- 10
- 50
- 100
- 250
- 500
- 1000
- 2000
| `RESIN_AND_KPDPWR_RESET_S2_TIMER` in ms |
| `s2-resin` | Enable: PMIC Resin key pin used as volume down key. | Boolean | | The resin key can be configured to reset or shut down the device when
it is asserted for the duration specified in the
`s1-ms` and `s2-ms`.
The property allows the DT setting to take effect. If the value is
`PM_FALSE`, the hardware default settings are
programmed. |
| `s2-resin` | `reset-type`: Select the reset type. | UINT8 |
PM_WARM_RESET
PM_HARD_RESET
PM_SHUTDOWN
|
WARM_RESET is used for crash dump
collection.
HARD_RESET is used for rebooting the
device.
SHUTDOWN is used for shutting down the
device.
|
| `s2-resin` | `s1-ms`: Assertion time value must choose from
possible values. | UINT32 |
- 0
- 32
- 56
- 80
- 128
- 184
- 272
- 408
- 608
- 904
- 1352
- 2048
- 3072
- 4480
- 6720
- 10256
| `RESIN_N_RESET_S1_TIMER` in ms |
| `s2-resin` | `s2-ms`: Assertion time value must choose from
possible values. | UINT32 |
- 0
- 10
- 50
- 100
- 250
- 500
- 1000
- 2000
| `RESIN_N_RESET_S2_TIMER` in ms |
| `s3-reset` | Enable: Configure the S3 reset. | Boolean | |
- If the device is stuck and cannot be restored with S2 reset, S3
reset does a fail-safe reset or factory reset.
- S3 reset is triggered when the key is asserted for the duration
specified in the timer value-ms.
- The property allows the DT setting to take effect. If the value
is PM_FALSE, the default hardware settings are
programmed.
|
| `s3-reset` | `s3-src`: Select the reset source. | UINT8 |
PM_PON_RESET_SOURCE_KPDPWR
PM_PON_RESET_SOURCE_RESIN
PM_PON_RESET_SOURCE_RESIN_AND_KPDPWR
PM_PON_RESET_SOURCE_RESIN_OR_KPDPWR
| S3 reset source can be the power key or the Resin key, or a
combination of both. |
| `s3-reset` | `timervalue-ms`: Assertion time value must choose from
possible values. | UINT32 |
- 0 (Immediate)
- 8
- 16
- 32
- 63
- 125
- 240
- 500
- 1000
- 2000
- 4000
- 8000
- 16000
- 32000
- 64000
- 128000
| `RESET_S3_TIMER_n` in ms |
| uvlo-config | `PMIC_INDEX`: Configure the under voltage lockout
threshold of various PMICs. | UINT8 |
PMIC_A (PMK7325)
PMIC_B (PM7325)
PMIC_C (PM7350C)
PMIC_D (PM7325B)
PMIC_E (PMR735A)
PMIC_I (PM7250B)
PMIC_K (PMG1110)
| When the input voltage of PMIC reaches the under voltage lockout
(UVLO) threshold, the device shuts down abruptly. For each PMIC present
in the Qualcomm reference device, configure the UVLO threshold. The
`pmic_index` is used to select the PMIC for which the
threshold should be changed. |
| uvlo-config | `uvlo_thresh` | UINT32 | mV | UVLO threshold in millivolts |
| uvlo-config | `uvlo_hyst` | UINT32 | mV | UVLO hysteresis in millivolts |
| uvlo-config | `uvlo_enable` | Boolean | `PM_ENABLE`
`PM_DISABLE` | The property allows the DT setting to take into effect. If `
PM_ DISABLE`, the hardware default settings are
programmed. |
| ovlo-config | `PMIC_INDEX`: Configure the over voltage lockout
threshold of various PMICs. | `PMIC_INDEX` |
PMIC_A (PMK7325)
PMIC_B (PM7325)
PMIC_C (PM7350C)
PMIC_D (PM7325B)
PMIC_E (PMR735A)
PMIC_I (PM7250B)
PMIC_K (PMG1110)
| When the input voltage of PMIC reaches the over voltage lockout
(OVLO) threshold, the device shuts down abruptly. For each PMIC present
in the Qualcomm reference device, configure the OVLO threshold. The
`pmic_index ` is used to select the PMIC for which
the threshold has to be changed. |
| ovlo-config | `ovlo_thresh` | – | mV | OVLO threshold in millivolts |
| ovlo-config | `ovlo_hyst` | – | mV | OVLO hysteresis in millivolts |
| ovlo-config | `ovlo_enable` | – | | The property allows the DT setting to take into effect. If
`PM_ DISABLE`, the hardware default settings are
programmed. |
| Long-pwrkey-dbnc-chk | `dbnc-time-ms`: The power key debounces time to check
for a valid keypress to boot up the device. | UINT32 | msec | If the power key is not pressed for the configured
`dbnc-time-ms` duration, the device shuts down in XBL
or UEFI based on the config `chk-at` during boot
up. |
| Long-pwrkey-dbnc-chk | `chk-at`: Check for keypress at the XBL or UEFI
stage. | UINT8 | 0, 1, 2 |
- 0 = Do not check
- 1 = Check-in XBL Loader stage
- 2 = Check-in XBL core (UEFI)
|
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | Verbose: Select PON log level. | UINT32 |
PM_EVENT_LOG_LEVEL_MIN
PM_EVENT_LOG_LEVEL_VERBOSE
PM_EVENT_LOG_LEVEL_RAWDATA
PM_EVENT_LOG_LEVEL_MAX
| PON log indicates the various reasons for device power-on, OFF, and
faults.
- Minimal version of PON logs printed in UART logs
- Verbose PON logs printed in UART logs
- Verbose PON logs along with raw SDAM register data printed in
UART logs
|
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_ENABLE`: Enable the LDO. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_VOLT`: Set LDO for the voltage. | UINT32 | mV | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_MODE`: Set the LDO mode. | UINT32 |
- 0: Low power
- 1: Bypass
- 3: Normal power mode
- 4: Retention mode
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_PD_CTR`: Set the pull down on the LDO. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_PIN_CTRL`: Enable pin control for the
LDO. | UINT32 |
- 0: HWEN0
- 1: HWEN1
- 2: HWEN2
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_OCP_BROADCAST`: Enable LDO OCP broadcast
so that the device can shut down during OCP. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_AHC`: Enable LDO automatic head room
control. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_LDO_SET_ULS`: Set the upper limit for the LDO
voltage. | UINT32 | mV | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_AHC_HR`: Configure the SMPS AHC reserved
head room. | UINT32 |
- 0x0: 0 mV
- 0x1: 8 mV
- 0x2: 16 mV
- 0x3: 24 mV
- 0x4: 32 mV (DEFAULT)
- 0x5: 40 mV
- 0x6: 48 mV
- 0x7: 56 mV
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_ENABLE`: Enable the SMPS. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_VOLT`: Set the SMPS for the voltage. | UINT32 | mV | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_MODE`: Set the SMPS mode. | UINT32 |
- 0: Low power
- 2: Auto mode
- 3: Normal power mode
- 4: Retention mode
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_PD_CTRL`: Set the pull down on the
SMPS. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_PIN_CTRL`: Enable Pin control for the
SMPS. | UINT32 |
- 0: HWEN0
- 1: HWEN1
- 2: HWEN2
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_OCP_BROADCAST`: Enable SMPS OCP broadcast
so that the device can shut down during OCP. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `T PM_SMPS_SET_AHC`: Enable SMPS automatic head room
control. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SMPS_SET_ULS`: Set the upper limit to the SMPS
voltage. | UINT32 | mV | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_ENABLE`: Enable GPIO. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_CFG_MODE`: Configure GPIO mode. | UINT32 |
- 0:
PM_GPIO_DIG_IN
- 1:
PM_GPIO_DIG_OUT
- 2:
PM_GPIO_DIG_IN_OUT
- 3:
PM_GPIO_ANA_PASS_THRU
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_OUTPUT_LVL`: Set the GPIO output
level. | UINT32 |
- 0: Level of pin is low
- 1: Level of pin is high
- 2 - Level of pin is Hi-Z
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_VOLT_SRC`: Select GPIO voltage source as
1.8 V or 3.6 V. | UINT32 |
- 0:
PM_GPIO_VIN0
- 1:
PM_GPIO_VIN1
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_OUT_BUFF_CONFIG`: Select GPIO output
buffer config. | UINT32 |
- 0: CMOS output.
- 1:Open drain NMOS output
- 2: Open drain PMOS output
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_OUT_SRC_CFG`: Select GPIO output source
config. | UINT32 |
- 0: Ground
- 1: Paired GPIO
- 2: Special function 1
- 3: Special function 2
- 4: Special function 3
- 5: Special function 4
- 6: D-test 1
- 7: D-test 2
- 8: D-test 3
- 9:L D-test 4
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_OUT_DRV_STR`: Select GPIO pin drive
strength. | UINT32 |
- 0: Output buffer strength low.
- 1: Output buffer strength medium.
- 2: Output buffer strength high.
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_GPIO_SET_PULL_SEL`: Select GPIO pull settings. | UINT32 |
- 0: 30 µA constant pulls up
- 1: 1.5 µA constant pulls up
- 2: 31.5 µA constant pulls up
- 3: 1.5 µA constant pulls up combined with 30 µA boost
- 4: 10 µA constant pull down
- 5: No pull
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SET_DELAY`: Add delay between any 2 API calls. | UINT32 | Delay in µS. | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_CLK_ENABLE`: Enable the clocks such as ln\_bb\_clk,
rf\_clk. | UINT32 | | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_CLK_DRV_STR`: Select the drive strength of the
clock. | UINT32 | 0-63 | Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_SPMI_CLK_DATA_CFG`: Select the SPMI drive
strength. | UINT32 |
- 0x0: LOW10PF
- 0x1: MID20PF
- 0x2: HIGH40PF
- 0x3: VERYHIGH50PF
| Configures the LDOs. See [SMPS/LDO/CLK sample code](https://docs.qualcomm.com/doc/80-70014-4/topic/pmic-developer-touchpoints.html#pmic-developer-touchpoints__section_m4y_zkw_51c) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PM_BUSID`: Select SPMI bus. | UINT32 | `PM_BUSID_0` | Must be PM\_BUSID\_0 |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PMIC_Index`: Select the PMIC. | UINT32 |
PMIC_A (PMK7325)
PMIC_B (PM7325)
PMIC_C (PM7350C)
PMIC_D (PM7325B)
PMIC_E (PMR735A)
PMIC_I (PM7250B)
PMIC_K (PMG1110)
| See `/boot_images/boot/Settings/
Include/pm_defines.h` |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | `PMIC_Peripheral`: Select the LDO, SMPS, clock, GPIO
number. | UINT32 |
PM_LDO_x
PM_SMPS_x
PM_CLK_x
PM_GPIO_x
| See:
`/boot_images/boot/Settings/Include/ pm_defines.h`
`/boot_images/boot/QcomPkg/`
Include `/api/pmic/pm/pm_gpio.h `(for GPIO enums) |
| sw-config
To modify PMIC software configuration during boot up time for various
LDOs, SMPSs, Clocks, GPIOs | API parameter argument. | UINT32 | `PM_TRUE`,` PM_FALSE`
OR
`Integer`
OR
`Enum` | See `/boot_images/boot/Settings/Include/
pm_defines.h`
`/boot_images/boot/QcomPkg/`
Include `/api/pmic/pm/pm_gpio.h` (for GPIO enums) |
| Access (access.dtsi)
To modify/enable the write access to PMIC peripheral for different
subsystems such as AOP, APSS, UEFI, TZ, MSS BUSID: Select SPMI
bus | `UINT32` | |
PM_BUSID_0 – For SPMI0 bus slave devices
PM_BUSID_1 – For SPMI1 bus slave devices
| – |
| Access (access.dtsi)
To modify/enable the write access to PMIC peripheral for different
subsystems such as AOP, APSS, UEFI, TZ, MSS BUSID: Select SPMI
bus | `SLAVEID`: Select the slave ID. | UINT32 |
- 0:
PMIC_A (PMK7325)
- 1:
PMIC_B (PM7325)
- 2:
PMIC_C (PM7350C)
- 3:
PMIC_D (PM7325B)
- 4:
PMIC_E (PMR735A)
- 8:
PMIC_I (PM7250B)
- 9:
PMIC_I (PM7250B)
| – |
| Access (access.dtsi)
To modify/enable the write access to PMIC peripheral for different
subsystems such as AOP, APSS, UEFI, TZ, MSS BUSID: Select SPMI
bus | `PERIPH (PPID)`: Select the peripheral within
PMIC. | UINT32 | PMIC Peripheral Register base
0x1 to 0xFF | PMIC peripheral register base.
Example:
- For PM7325, GPIO_01 PPID is 0x88
- For PMK7325, PON_PBS PPID is 0x08
|
| Access (access.dtsi)
To modify/enable the write access to PMIC peripheral for different
subsystems such as AOP, APSS, UEFI, TZ, MSS BUSID: Select SPMI
bus | `OPERATION`: Add or remove the channel with
permission. | UINT32 |
APPEND
REMOVE
APPEND_WITH_IRQ
| |
| Charger | pmic-index-charger: Select the charger PMIC index. | UINT32 | `PMIC_D` or `PMIC_I` | Index of the primary charger PMIC |
| Charger | `Dead-battery-threshold`: Set the dead battery
threshold. | UINT32 | 2800 -3300 | dBc threshold in millivolts. XBL allows you to boot to UEFI post the
event. |
| Charger | `ichg-fs-cfg-enable`: Increase the charge current
range up to 20 A. | UINT8 | | Flag to check if the full scale charging current setting should be
applied. |
| Charger | `ichg-fs-cfg-value` | UINT32 | | Supported full-scale charging current - 0: 10 A; 1: 20 A. |
| Charger | `pm-chg-batt-cfg-enable`: Select the battery type as 1
S or 2 S. | UINT8 | | Flag to check if the 1S or 2S battery configuration should be
applied. |
| Charger | `pm-chg-batt-cfg-is_1s_battery` | UINT8 | | To indicate if a 1S or 2S battery is present. |
| Charger | `dbg-board-id-cfg-min-id-ohms`: Minimum
`batt_id` in ohms for debug board detection. | UINT32 | 2000 | Battery less platform with debug board, the
`batt_id` should be within this min and max range to
skip the battery charging. |
| Charger | `dbg-board-id-cfg-max-id-ohms`: Maximum
`batt_id` in ohms for debug board detection. | UINT32 | 14000 | Battery less platform with debug board, the
`batt_id` should be within this min and max range to
skip the battery charging. |
| Charger | `afp-cfg-too-hot-threshold`: Set the AFP threshold
temperature for a hot temperature. | UINT32 | Temperature in degree C | If the battery temperature crosses any of the AFP thresholds, the
device shuts down automatically.
Example: 75 C |
| Charger | `afp-cfg-too-hot-enable`: Enable/Disable AFP for hot
temperature threshold config. | UINT8 | | Enable/Disable AFP when the hot temperature threshold is reached.
If `PM_FALSE`, the hardware default settings are
programmed. |
| Charger | `afp-cfg-too-cold-threshold`: AFP threshold temp for
cold temperatures. | UINT32 | Temperature in degree C | Example: -20 C |
| Charger | `afp-cfg-too-cold-enable`: Enable/Disable AFP for cold
temperature threshold config | UINT8 | | Enable/Disable AFP when the cold temperature threshold is
reached.
If `PM_FALSE`, the hardware default settings are
programmed. |
| Charger | `no-batt-cfg-enable`: Enable the battery-less
configuration. | UINT8 | | If `PM_TRUE`, the device boots up automatically if the
battery is not detected. |
| Charger | `no-batt-cfg-boot-without-batt`: Continue to boot when
the battery is not detected. | UINT8 | | If `PM_FALSE`, the device shuts down automatically if
the battery is not detected. |
| Charger | `no-batt-cfg-icl-value_ma`: Set the input current
limit for a battery-less platform. | UINT32 | 0 - 5000 | Input current limit value in mA |
| Charger | `float-voltage-cfg-enable`: Configure the maximum
battery voltage. | UINT8 | | If `PM_FALSE`, the hardware default settings are
programmed. |
| Charger | `float-voltage-cfg-value-mv` | UINT8 | 0 - 4500 | Maximu battery voltage for charging |
| Charger | `pre-charging-current-cfg-enable`: Configure the
precharge current. | UINT8 | | If `PM_FALSE`, the hardware default settings are
programmed. |
| Charger | `pre-charging-current-cfg-value-ma` | UINT32 | 0 - 600 | Precharge current in mA when battery voltage is < Vsys\_min
Ex:
3 V |
| Charger | `fast-charging-current-enable`: Configure the
fast-charge current. | UINT8 | | If PM\_FALSE, the hardware default settings are programmed. |
| Charger | `fast-charging-current-value-ma` | UINT32 | 0 - 10000 | – |
| Charger | `usbin-input-current-enable`: Configure the USB input
current limit. | UINT8 | | If PM\_FALSE, the hardware default settings are programmed. |
| Charger | `usbin-input-current-value-ma` | UINT32 | 0 - 5000 | USB input current configuration |
| Charger | `dam-cable-chg-enable`: Enable charging for DAM
cable. | UINT8 | | If PM\_FALSE, the hardware default settings are programmed.
By default, the hardware disables the DAM cable charging. |
| Charger | `dam-cable-aicl-enable`: Enable AICL for DAM
cable. | UINT8 | | If PM\_FALSE, the hardware default settings are programmed.
By default, the hardware disables the DAM cable AICL. |
| Charger | slave-charger-present: Indicate the Qualcomm slave charger
presence. | UINT8 | | Slave charger settings |
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## SMPS/LDO/CLK sample code
driver-post-init = < // PM_SMPS_SET_AHC_HR PM_BUSID_0 PMIC_C PM_SMPS_1 0x57
// PM_SMPS_SET_ULS PM_BUSID_0 PMIC_F PM_SMPS_6 1375000 /*The Voltage is in microVolts*/ // PM_LDO_SET_ULS PM_BUSID_0 PMIC_F PM_SMPS_6 1375000 /*The Voltage is in microVolts*/
// PM_CLK_ENABLE PM_BUSID_0 PMIC_A PM_CLK_RF_1 PM_TRUE
// PM_SMPS_SET_VOLT PM_BUSID_0 PMIC_B PM_SMPS_1 1200
// PM_SMPS_SET_AHC PM_BUSID_0 PMIC_B PM_SMPS_1 PM_FALSE
// PM_LDO_SET_AHC PM_BUSID_0 PMIC_B PM_LDO_1 PM_FALSE
// PM_LDO_SET_VOLT PM_BUSID_0 PMIC_B PM_LDO_1 1200
// PM_LDO_SET_MODE PM_BUSID_0 PMIC_B PM_LDO_1 PM_SW_MODE_NPM
// PM_SMPS_SET_MODE PM_BUSID_0 PMIC_B PM_SMPS_1 PM_SW_MODE_NPM
// PM_SMPS_SET_PD_CTRL PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_SMPS_SET_PIN_CTRL PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_SMPS_SET_OCP_BROADCAST PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_LDO_SET_PD_CTRL PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_LDO_SET_PIN_CTRL PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_LDO_SET_OCP_BROADCAST PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_CLK_DRV_STR PM_BUSID_0 PMIC_A PM_CLK_RF_1 3
// PM_SMPS_SET_ENABLE PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_LDO_SET_ENABLE PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_SPMI_CLK_DATA_CFG PM_BUSID_0 PMIC_A 0x2 0x2 /*BUS_ID, PMIC_ID, CLK buff Config, DATA buff Config*/
PM_DELAY(10)
> ;
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**Parent Topic:** [Interfaces](https://docs.qualcomm.com/doc/80-70014-4/topic/interfaces.html)
Last Published: Feb 02, 2026
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