# Bootloader/UEFI device tree

Source: [https://docs.qualcomm.com/doc/80-70014-6/topic/bootloader_uefi_device_tree.html](https://docs.qualcomm.com/doc/80-70014-6/topic/bootloader_uefi_device_tree.html)

The device tree specifies the UFS host configuration parameters such as number of
        gears, number of lanes, rate value, timeout values, etc.

## UFS

The device tree is located at
                    <workspace\_root\_path>\boot\_images\boot\Settings\Soc\Kodiak\Core\Storage\UFS\ufs.dtsi.

The UFS device tree node in UEFI is described below.

| Device tree node/key | Subnode | Device tree value | Notes |
| --- | --- | --- | --- |
| `init_speed_params` | `EnableHighSpeed` | 1 | Enables HS mode |
| `init_speed_params` | `NumGears` | 4 | Max gear to be used. |
| `init_speed_params` | `NumLanes` | 2 | Number of lanes used in UFS |
| `init_speed_params` | `Rate` | 2 | <ul class="ul"><br>                                    <li class="li">1 = Rate A </li><br><br>                                    <li class="li">2 = Rate B</li><br><br>                                </ul> |
| `perf_speed_params` | `EnableHighSpeed` | 1 | To enable HS mode while in perf mode |
| `perf_speed_params` | `NumGears` | 4 | Max gear to be used in perf mode. |
| `perf_speed_params` | `NumLanes` | 2 | Number of lanes used in UFS in perf mode |
| `perf_speed_params` | `Rate` | 2 | Series in perf mode<ul class="ul"><br>                                    <li class="li">1 = Rate A </li><br><br>                                    <li class="li">2 = Rate B</li><br><br>                                </ul> |
| `timeout_values` | `fDeviceInitTimeoutUs` | 2500000 | Timeout (µs) during device init |
| `timeout_values` | `UTRDPollTimeoutUs` | 30000000 | Timeout (µs) for UTRD |
| `BatteryThresholdMv` |  | 3600 | Battery threshold (in milli volts) to move to Gear1 |
| `LinkStartupRetryCount` |  | 5 | Retry count for Link startup |
| `FUA_Value` |  | 1 | Forced unit access |
| `EnableLogging` |  | 0 | Enables DT serial debug logging in loader<ul class="ul"><br>                                    <li class="li">1 - Enable</li><br><br>                                    <li class="li">0 - Disable</li><br><br>                                </ul> |
| `RefClock` |  | 19200000 | UFS controller reference clock 19.2MHz |
| `MphyInitTable` |  |  | MphyInit table |
| `MphyInitEndTable` |  |  | `MphyInitEnd` table |
| `MphyLaneInitTable` |  |  | Mphy 2 Lane Init table |
|  |  |  |  |
|  |  |  |  |
|  |  |  |  |

Any change in the .dtsi should be compiled into
                    xbl\_config.elf and the image reflashed on to the
                device.

Note: `MphyInitTable`, `MphyInitEndTable`, and
                        `MphyLaneInitTable` are used for UFS phy initialization and
                    these values are tuned by Qualcomm. For debugging/tuning any phy-level issue,
                    these values should be changed with guidance from the Qualcomm team.

Note: The default values are for UFS 3.1 part. For UFS 2.x part,
                        `NumGears` value should be 3. Other parameters need not be
                    changed for UFS 2.x part.

**Parent Topic:** [Configure](https://docs.qualcomm.com/doc/80-70014-6/topic/configuration.html)

Last Published: Jul 10, 2024

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