# Linux device tree

Source: [https://docs.qualcomm.com/doc/80-70014-6/topic/linux-device-tree.html](https://docs.qualcomm.com/doc/80-70014-6/topic/linux-device-tree.html)

The UFS  device tree nodes define properties
        used for storage.

## UFS

The SoC DTSI node specifies register address space, clocks, interrupts, and reset
                information. The platform DTSI node specifies power supply, voltage, and current
                levels. The `Ufs_mem_hc` node describes the on-chip UFS host
                controller and this node is in the
                    <workspace\_root\_path>/sources/kernel/kernel\_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi
                file.

Note: These parameters are only for information purposes and should not be changed by
                the developer.

| Property | Description |
| --- | --- |
| Compatible | For Qualcomm SoCs, must contain strings such as "qcom,<br>                                ufshc". |
| Interrupts | Interrupt mapping for UFS host controller IRQ |
| Reg | UFS host registers address mapping |
| Phys | `phandle` to UFS PHY node |
| lanes-per-direction | Specifies the number of lanes available per direction. Either 1<br>                                or 2. |
| clock-names | List of clock input name strings |
| Clocks | List of  `phandle` and clock specifier<br>                                pairs |
| freq-table-hz | Array of &lt;min max&gt; operating frequencies stored in the same<br>                                order as the clocks property. |
| reset-gpios | A `phandle` and GPIO specifier denoting the GPIO<br>                                that is connected |
| Resets | Reset node register |

The `Ufs_mem_phy` node describes on-chip UFS PHY hardware and this
                node is in
                    &lt;workspace\_root\_path&gt;/sources/kernel/kernel\_platform/kernel/arch/arm64/boot/dts/qcom/sc7280.dtsi
                file.

| Property | Description |
| --- | --- |
| Compatible | Compatible string such as "qcom,qmp-ufs-phy" needs to be<br>                                specified. |
| #phy-cells | Property should be set to 0 |
| Reg | Should contain PHY register address space |
| reg-names | Indicates various resources passed to driver (via reg property)<br>                                    by name.<br><br><br>                                <br>The required reg-names is phy\_mem. |
| lanes-per-direction | Number of lanes available per direction; either 1 or 2. |
| clock-names | List of clock input name strings |
| Clocks | List of phandle and clock specifier pairs |
| vdda-phy-supply | `phandle` to main PHY supply for analog<br>                                domain |
| vdda-pll-supply | `phandle` to PHY PLL and Power-Gen block power<br>                                supply |
| Resets | Specifies the PHY reset in the UFS controller |

For more information on DTS parameters, refer to:
                    /kernel\_platform/msm-kernel/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml.

**Parent Topic:** [Configure](https://docs.qualcomm.com/doc/80-70014-6/topic/configuration.html)

Last Published: Jul 10, 2024

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