# SoC power saving state Source: [https://docs.qualcomm.com/doc/80-70015-30/topic/qcs6490-soc-power-saving-state.html](https://docs.qualcomm.com/doc/80-70015-30/topic/qcs6490-soc-power-saving-state.html) The SoC supports multiple sleep states based on the requirement of resources, such as, double data rate (DDR), crystal oscillator (XO) clock, digital power supply `(Chip_CX)`, and memory domains power supply `(Chip_MX)`. Note: The SoC sleep states are enabled for QCS6490/QCS5430. As the device transitions from active state to SoC sleep state, the power consumption decreases. For example, when the device is idle with no use cases running, it is in the SoC sleep state (AOSD). This is the deepest sleep state and consumes the least power. During this state, the resources, like, XO clock, memory, and power supply of digital, and memory domains also enter their respective sleep states. The following table lists the supported SoC sleep states. Note: The SoC sleep states listed in the table are for information only. You cannot enable or disable SoC sleep states. Table : SoC sleep states | SoC sleep states | Resource states | | --- | --- | | Active | | | DDR collapse | | | XO shutdown (CXSD) | | | SoC sleep (AOSD) | | ## Check SoC sleep state To retrieve SoC sleep statistics, run the following commands: mount -t debugfs none /sys/kernel/debug Copy to clipboard cat /sys/kernel/debug/qcom_stats/aosdCopy to clipboard cat /sys/kernel/debug/qcom_stats/cxsdCopy to clipboard The following is a sample output: Count: 3 Last Entered At: 1087943710378 Last Exited At: 1088442890377 Accumulated Duration: 6668562002 The following table explains the fields of the output: Table : SoC sleep states output fields | Field | Explanation | | --- | --- | | `Count` | | | `Last Entered At` | Indicates the last sleep entry timestamp in ticks | | `Last Exited At` | Indicates the last sleep exit timestamp in ticks | | `Accumulated duration` | Total amount of time in sleep, represented in ticks | Note: Ticks are based on the XO clock frequency of 19.2 MHz. **Parent Topic:** [Power states and features](https://docs.qualcomm.com/doc/80-70015-30/topic/powerfeatures.html) Last Published: Oct 16, 2024 [Previous Topic Power states and features](https://docs.qualcomm.com/bundle/publicresource/80-70015-30/topics/powerfeatures.md) [Next Topic CPU power management](https://docs.qualcomm.com/bundle/publicresource/80-70015-30/topics/cpupowermanagement.md)