# Buses

Source: [https://docs.qualcomm.com/doc/80-70015-4/topic/buses.html](https://docs.qualcomm.com/doc/80-70015-4/topic/buses.html)

A bus facilitates data transfer among various system components. The DT properties
        allow for the configuration of the Qualcomm Universal Peripheral (QUP) v3 serial interface
        device nodes.

QUP v3 supports interintegrated circuit (I^2^C), serial peripheral interface
            (SPI), and universal asynchronous receiver-transmitter (UART) serial engines. The DT
            properties include the active and sleep settings for these serial engines.

For more information on QUP v3 and its peripheral interfaces, see [Overview of peripheral devices](https://docs.qualcomm.com/bundle/publicresource/topics/80-70015-8/overview-of-wired-interfaces.html).

The serial engine protocol and active configurations can be applied when the firmware is
            loaded onto the serial engine.

The following files can be configured at the Linux host machine:

- boot\_images/boot/Settings/Soc/<chipset>/Core/Buses/qup\_common/<chipset>-qupv3-pinctrl.dtsi
- boot\_images/boot/Settings/Soc/<chipset>/Core/Buses/qup\_common/<chipset>-qupv3.dtsi

In `&top_qupk_sen`, **k** represents the QUP number
            and **n** represents the serial engine number. The table lists the DT properties:

Table : Bus DT properties

| Property name | Property description | Data type | Possible values/value range | Device behavior |
| --- | --- | --- | --- | --- |
| status = "disabled"; | Status control to enable/disable serial interfaces supported for QUP<br>                            v3 serial engine (I2C/SPI/UART) protocols. | String | <ul class="ul" id="buses__ul_onr_wtz_s1c"><br>                                <li class="li">Okay</li><br><br>                                <li class="li">Disabled</li><br><br>                            </ul> | Enables or disables the serial engine. |
| &top\_qup**k**\_se**n**\_i2c\_active | GPIOs active settings for I2C serial engines. | UNIT32-array | Reference to a node label. | Sets active GPIO configurations for the I^2^C<br>                            protocol. |
| &top\_qup**k**\_se**n**\_i2c\_sleep | GPIOs sleep settings for I^2^C. | UNIT32-array | Reference to a node label. | Sets sleep GPIO configurations for the I^2^C<br>                            protocol. |
| &top\_qup**k**\_se**n**\_spi\_active | GPIOs active settings for SPI. | UNIT32-array | Reference to a node label. | Sets active GPIO configurations for the SPI protocol. |
| &top\_qup**k**\_se**n**\_spi\_sleep | GPIOs sleep settings for SPI. | UNIT32-array | Reference to a node label. | Sets sleep GPIO configurations for the SPI protocol. |
| &top\_qup**k**\_se**n**\_uart\_active | GPIOs active settings for UART. | UNIT32-array | Reference to a node label. | Sets active GPIO configurations for the UART protocol. |
| &top\_qup**k**\_se**n**\_uart\_sleep | GPIOs sleep settings for UART. | UNIT32-array | Reference to a node label. | Sets sleep GPIO configurations for the UART protocol. |

## Sample configuration

    TOP_QUP_0{
    /*TOP_QUP_0_SE_0 Instance */
                   TOP_QUP_0_SE_0{
                   status = "disabled"; /* status to enable/disable SE0 Node */
                   pinctrl-0  = <&top_qup0_se0_i2c_active>;  
                    pinctrl-1  = <&top_qup0_se0_i2c_sleep>;
                   pinctrl-2  = <&top_qup0_se0_spi_active>;
                   pinctrl-3  = <&top_qup0_se0_spi_sleep>;
                   pinctrl-4  = <&top_qup0_se0_uart_active>;
                   pinctrl-5  = <&top_qup0_se0_uart_sleep>;
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**Parent Topic:** [Interfaces](https://docs.qualcomm.com/doc/80-70015-4/topic/interfaces.html)

Last Published: Oct 04, 2024

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