VBackground-1

# Ethernet architecture The following figure shows the architecture and its components involved in communicating data over Ethernet on the reference kits. Ethernet architecture on reference kits Tab QCS6490 Tab QCS9075 Tab QCS8275 The following table describes the components of Ethernet architecture. | Component | Description | | --- | --- | | Application processor subsystem (APSS) | Runs on a Linux-based operating system. | | Ethernet driver |

A software driver in the Linux kernel.

Provides data connectivity over a wired Ethernet interface.

| | PHY driver |

A low-level driver dedicated to manage the Ethernet physical layer.

Implements a software statemachine required to handle the lifecycle of PHY, from initialization to link establishment.

Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.

| | Ethernet hardware (RB3 Gen 2 Development Kit) |

Both QEP and AQR PHYs are validated on RB3 Gen 2 Development Kit.

QEP PHY for 2.5 GbE is available by default on SGMII interface. It is enabled and verified on a 1 x QEP8121 IX connector.

USB2ETH interface with 1 GbE is available by default and verified on RJ45 connector.

AQR PHY for 10 GbE is optional and may not be available on the development kit. If available, it is verified on a 1 x AQR113C IX connector.

Note

The sample outputs shown in [Tools for Ethernet operations](https://docs.qualcomm.com/doc/80-70018-26/topic/tools-for-ethernet-operations.html#tools-for-ethernet-operations) are based on the verification of QEP8121 PHY, USB2ETH, and AQR113C PHY.

To bring up hardware configurations other than the configuration provided by Qualcomm, see Bring up alternate hardware enablement.

For information on how to configure RJ45 based USB2ETH, see Configure Ethernet with RJ45

| The following table describes the components of Ethernet architecture. | Component | Description | | --- | --- | | Application processor subsystem (APSS) | Runs on a Linux-based operating system. | | Ethernet driver |

A software driver in the Linux kernel.

Provides data connectivity over a wired Ethernet interface.

| | PHY driver |

A low-level driver dedicated to manage the Ethernet physical layer.

Implements a software statemachine required to handle the lifecycle of PHY, from initialization to link establishment.

Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.

| | Ethernet hardware (IQ-9075 EVK) | 1 x QEP8121 PHY for 10/100/1000 Mbps is validated on [IQ-9075 EVK](https://docs.qualcomm.com/bundle/resource/topics/80-73418-123/overview.html#evk-ports-and-interfaces) and enabled by RJ45 connector.

Note

2.5 GbE is not enabled on IQ-9075 EVK. | The following table describes the components of Ethernet architecture. | Component | Description | | --- | --- | | Application processor subsystem (APSS) | Runs on a Linux-based operating system. | | Ethernet driver |

A software driver in the Linux kernel.

Provides data connectivity over a wired Ethernet interface.

| | PHY driver |

A low-level driver dedicated to manage the Ethernet physical layer.

Implements a software statemachine required to handle the lifecycle of PHY, from initialization to link establishment.

Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.

| | Ethernet hardware (IQ-8 Beta EVK) | 1 x AQR115 PHY for 10/100/1000 Mbps and 2.5 GbE is validated on IQ-8 Beta EVK and enabled by RJ45 connector. | Last Published: Apr 10, 2025 [Previous Topic Ethernet features](https://docs.qualcomm.com/bundle/publicresource/80-70018-26/topics/ethernet-features.md) [Next Topic Tools for Ethernet operations](https://docs.qualcomm.com/bundle/publicresource/80-70018-26/topics/tools-for-ethernet-operations.md)