# Understand thermal architecture The thermal architecture shows how the thermal framework of Qualcomm Linux interacts with temperature sensors (Tsens) hardware, cooling map interfaces, and user space clients.  **Figure : Thermal architecture** Table : Description of the components of thermal architecture | Components of thermal architecture | Description | | --- | --- | | Thermal device tree |
A thermal device tree is made up of various thermal zones.
A thermal zone is configured for every Tsens.
Each thermal zone consists of sensor hardware
information, different levels of thermal thresholds, and
their respective cooling actions.
All rules for a thermal zone are defined in the device
tree.
The thermal governor is a temperature monitor algorithm
that controls the temperature of a thermal zone.
It mitigates the cooling devices associated with the zone
and keeps the temperature within the limit.
Upon receipt of interrupt notification from Tsens
hardware, the thermal framework uses a stepwise thermal
governor to communicate the cooling actions to the
cooling map interface (CPU frequency driver).
A cooling map interface is a collection of devices that
can be throttled to reduce the temperature of Qualcomm
Linux.
Every trip instance of the thermal zone is associated
with a cooling device.
The thermal core framework aggregates all the cooling
device instance requests and places the aggregated
requests to the cooling device.
The sysfs interface is used to read the temperature
> of Tsens and kernel trip information.
The Netlink interface gets information of Tsens
> temperature notifications.
The Tsens triggers an interrupt whenever the temperature
in the system crosses the configured threshold.
The thermal framework initiates the following mitigation
actions on the CPU, GPU, and NSP in response to the
interrupts:
Thermal DCVS
Reduces the maximum operating frequency if
temperature thresholds are crossed
Voltage scaling occurs according to clock scaling,
which reduces power consumption and temperature in
turn
CPU idle injection
The core is put in the deepest Low-Power state for the
configured idle time.
In-built hardware executes thermal mitigation actions
ensuring system reliability
Reduces CPU and NSP clock speed to quickly recover from
high thermal conditions