# Getting started: Set up device interface
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
Before you begin, set up your infrastructure as described in the [Qualcomm Linux Build Guide](https://docs.qualcomm.com/bundle/publicresource/topics/80-70017-254/introduction.html).
## Identify interface status
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
The default interface status indicates the status of the interfaces during bootup. To
identify the interface status, you must ensure that the interfaces are registered
successfully and obtain the list of enabled interfaces.
### Obtain the bootup logs
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
### About this task
To obtain the bootup logs of the device, do the following:
### Procedure
1. Open the SSH shell in permissive mode or use the ADB shell. For more
information about how to run SSH, see the [Use SSH](https://docs.qualcomm.com/bundle/publicresource/topics/80-70018-254/how_to.html#use-ssh) section.
2. Obtain the logs of the enabled interfaces by running the following
command.
dmesgCopy to clipboard
Output:
[ 0.434365] msm_serial: driver initialized
[ 0.799123] 994000.serial: ttyMSM0 at MMIO 0x994000 (irq = 139, base_baud = 0) is a MSM
[ 0.801937] 99c000.serial: ttyHS1 at MMIO 0x99c000 (irq = 140, base_baud = 0) is a MSM
[ 0.804563] serial serial0: tty port ttyHS1 registered
[ 0.720945] usbhub_rest_vreg GPIO handle specifies active low - ignored
[ 0.815241] dwc3-qcom 8c00000.usb: Adding to iommu group 4
[ 5.195974] dwc3-qcom a600000.usb: Adding to iommu group 18
[ 5.229464] qcom_pmic_glink pmic-glink: Failed to create device link (0x180) with a600000.usb
[ 6.195825] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[ 6.450338] usb 1-1: new high-speed USB device number 2 using xhci_hcd
[ 6.664583] usbcore: registered new device driver onboard-usb-hub
[ 6.730998] usb 2-1: new SuperSpeed USB device number 2 using xhci_hcd
[ 7.083668] usb 2-1.1: new SuperSpeed USB device number 3 using xhci_hcd
[ 7.217287] ax88179_178a 2-1.1:1.0 eth0: register 'ax88179_178a' at usb-0001:04:00.0-1.1, ASIX AX88179 USB 3.0 Gigabit Ethernet, 02:fe:ee:05:44:23
[ 7.217415] usbcore: registered new interface driver ax88179_178a
[ 10.223140] dwc3-qcom a600000.usb: request 0000000000000000 was not queued to ep0ouCopy to clipboard
3. Connect the UART serial port to log in to the console.

### List enabled interfaces on devices
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
To obtain the list of the enabled interfaces, do the following:
- For UART, run the following
command.
ls /dev/tty*Copy to clipboard
Output:
/dev/tty /dev/tty21 /dev/tty35 /dev/tty49 /dev/tty62 /dev/ttyp4
/dev/tty0 /dev/tty22 /dev/tty36 /dev/tty5 /dev/tty63 /dev/ttyp5
/dev/tty1 /dev/tty23 /dev/tty37 /dev/tty50 /dev/tty7 /dev/ttyp6
/dev/tty10 /dev/tty24 /dev/tty38 /dev/tty51 /dev/tty8 /dev/ttyp7
/dev/tty11 /dev/tty25 /dev/tty39 /dev/tty52 /dev/tty9 /dev/ttyp8
/dev/tty12 /dev/tty26 /dev/tty4 /dev/tty53 /dev/ttyMSM0 /dev/ttyp9
/dev/tty13 /dev/tty27 /dev/tty40 /dev/tty54 /dev/ttyS0 /dev/ttypa
/dev/tty14 /dev/tty28 /dev/tty41 /dev/tty55 /dev/ttyS1 /dev/ttypb
/dev/tty15 /dev/tty29 /dev/tty42 /dev/tty56 /dev/ttyS2 /dev/ttypc
/dev/tty16 /dev/tty3 /dev/tty43 /dev/tty57 /dev/ttyS3 /dev/ttypd
/dev/tty17 /dev/tty30 /dev/tty44 /dev/tty58 /dev/ttynull /dev/ttype
/dev/tty18 /dev/tty31 /dev/tty45 /dev/tty59 /dev/ttyp0 /dev/ttypf
/dev/tty19 /dev/tty32 /dev/tty46 /dev/tty6 /dev/ttyp1
/dev/tty2 /dev/tty33 /dev/tty47 /dev/tty60 /dev/ttyp2
/dev/tty20 /dev/tty34 /dev/tty48 /dev/tty61 /dev/ttyp3Copy to clipboard
- For I2C, run the following
command.
ls /dev/i2c*Copy to clipboard
The
following output is
displayed.
/dev/i2c-0 /dev/i2c-1 /dev/i2c-16Copy to clipboard
- For SPI, run the following
command.
ls /dev/spi*Copy to clipboard
The
following output is
displayed.
spidev14.0Copy to clipboard
- For PCIe, obtain the enumeration log. For more information about PCIe probe logs,
see [PCIe-related configurations](https://docs.qualcomm.com/doc/80-70018-8/topic/pcie.html#pcie-software-support-feature-for-qps615__section_xbl_hhd_l1c) and [QPS615 switch support](https://docs.qualcomm.com/doc/80-70018-8/topic/pcie.html#pcie-software-support-feature-for-qps615__section_nmw_5jd_l1c).
## Load Linux firmware on QUP v3 serial engine
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
The QUP v3 serial engine loads the firmware for the required protocol onto the serial
engine. The configuration of protocols (I2C, SPI, I3C) and communication modes ([FIFO](https://docs.qualcomm.com/doc/80-70018-8/topic/references.html#qup-v3-supported-transfer-modes__ul_unp_cdt_qzb), [GSI](https://docs.qualcomm.com/doc/80-70018-8/topic/references.html#qup-v3-supported-transfer-modes__b_zzd_rsp_rcc)), is done in a secure execution environment, such as Qualcomm TEE
`devcfg`. For open-source development, this configuration is
performed in the Linux `devkit`, allowing for the nonsecure use cases.
However, for secure use cases, Qualcomm TEE `devcfg` is used.
### Default configuration
The default configuration for each serial engine, including the selected mode of data
transmission and ownership, is in the
/TZ.XF.5.0/core.tz/2.0/settings/buses/qup\_accesscontrol/qupv3/config/lemans/QUPAC\_Access.c
file.
In the default configuration, Linux owns all the serial engines. All secure use cases
are handled from Qualcomm TEE.
const QUPv3_se_security_permissions_type qupv3_perms_default =
{
/* PeriphID, ProtocolID, Mode, NsOwner, bAllowFifo, bLoad, bModExcl */
/*QUPV3_0_SE0*/
/*QUPV3_0_SE1*/
/*QUPV3_0_SE2*/
{ QUPV3_0_SE3, QUPV3_PROTOCOL_UART_4W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // BT UART (2nd Hastings)
{ QUPV3_0_SE4, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // VIP UART/SPI (SOC SLAVE)
/*QUPV3_0_SE5*/ // Spare
{ QUPV3_1_SE0, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // I2C Carplay
/*QUPV3_1_SE1*/
{ QUPV3_1_SE2, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // Tuner
{ QUPV3_1_SE3, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, FALSE, FALSE }, // Debug UART
{ QUPV3_1_SE4, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // I2C A2B Controller & Audio port expander
{ QUPV3_1_SE5, QUPV3_PROTOCOL_UART_2W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // GNSS
/*QUPV3_1_SE6*/
{ QUPV3_2_SE0, QUPV3_PROTOCOL_SPI, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // FPGA
{ QUPV3_2_SE1, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // PCIe I2C MUX
{ QUPV3_2_SE2, QUPV3_PROTOCOL_SPI, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // SPI - Audio
{ QUPV3_2_SE3, QUPV3_PROTOCOL_UART_4W, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // BT UART
{ QUPV3_2_SE4, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // I2C Display 1
{ QUPV3_2_SE5, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, // I2C Sensor
/*QUPV3_2_SE6 */
{ QUPV3_3_SE0, QUPV3_PROTOCOL_SPI, QUPV3_MODE_FIFO, AC_HLOS, TRUE, FALSE, FALSE }, // SPI
};
Copy to clipboard
### Load Linux firmware
To load the Linux firmware, do the following:
1. Enable CONFIG\_QUP\_FW\_LOAD in the following files:
- `CONFIG_QCOM_QUP_FW_LOAD=y` in
arch/arm64/configs/qcom\_defconfig
- `CONFIG_QCOM_QUP_FW_LOAD=m` in
arch/arm64/configs/qcom\_vm\_defconfig
2. To load the firmware with the required protocol, include the
`qcom,load-firmware` property in the device tree
node.
3. Configure the transfer
mode.
GENI_SE_INVALID, // 0
GENI_SE_FIFO, //1
GENI_SE_DMA, //2
GENI_GPI_DMA, //3
Copy to clipboard
4. Load the firmware to the serial engine.
For example, when QUPv3\_2\_SE2
(0x00888000) is loaded from Linux through the FIFO mode of communication
use the following DTSI
property.
spi16: spi@888000 {
compatible = "qcom,geni-spi";
reg = <0x0 0x00888000 0x0 0x4000>;
interrupts = ;
clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
clock-names = "se";
interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "qup-core",
"qup-config",
"qup-memory";
power-domains = <&rpmhpd SA8775P_CX>;
dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
<&gpi_dma2 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
address-cells = <1>;
#size-cells = <0>; qcom,load-firmware; xfer-mode = <1>;
status = "disabled";
};
Copy to clipboard
5. Load the GPI
firmware.
gpi_dma2: qcom,gpi-dma@800000 { #dma-cells = <3>; compatible = "qcom,sm6350-gpi-dma"; reg = <0x0 0x00800000 0x0 0x60000>; interrupts = , , , , , , , , , , , ; dma-channels = <12>; dma-channel-mask = <0xfff>;
iommus = <&apps_smmu 0x5b6 0x0>;
qcom,load-firmware;
xfer-mode = <3>; status = "disabled"; };
Copy to clipboard
## Enable required interfaces
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
To enable an interface, do the following:
- For UART, see the [UART software](https://docs.qualcomm.com/doc/80-70018-8/topic/uart.html#uart_software) section.
- For SPI, see the [SPI software](https://docs.qualcomm.com/doc/80-70018-8/topic/spi.html#spi_software) section.
- For I2C, see the [I2C software](https://docs.qualcomm.com/doc/80-70018-8/topic/i2c.html#i2c-software) section.
- For PCIe, see the [PCIe software](https://docs.qualcomm.com/doc/80-70018-8/topic/pcie.html#pcie-software) section.
- For USB, see the [USB software](https://docs.qualcomm.com/doc/80-70018-8/topic/usb.html#usb-software) section.
## Verify interface status
Source: [https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html](https://docs.qualcomm.com/doc/80-70018-8/topic/get-started.html)
To verify the functioning of the different interfaces, do the following:
- For UART, see the [Verify UART interface](https://docs.qualcomm.com/doc/80-70018-8/topic/uart.html#uart_verification) section.
- For SPI, see the [SPI verification](https://docs.qualcomm.com/doc/80-70018-8/topic/spi.html#spi_verification) section.
- For I2C, see the [Verify I2C interface](https://docs.qualcomm.com/doc/80-70018-8/topic/i2c.html#i2c-verification) section.
- For PCIe, verify the connected endpoint with the following command.
lspciCopy to clipboard
The following output is
displayed.
0001:00:00.0 PCI bridge: Qualcomm Device 010b
0001:01:00.0 PCI bridge: Toshiba Corporation Device 0623
0001:02:01.0 PCI bridge: Toshiba Corporation Device 0623
0001:02:02.0 PCI bridge: Toshiba Corporation Device 0623
0001:02:03.0 PCI bridge: Toshiba Corporation Device 0623
0001:04:00.0 USB controller: Renesas Technology Corp. uPD720201 USB 3.0 Host Controller (rev 03)
0001:05:00.0 Ethernet controller: Toshiba Corporation Device 0220
0001:05:00.1 Ethernet controller: Toshiba Corporation Device 0220Copy to clipboard
- For USB, verify the device and host as follows:
- Device: Connect the USB Type-C port and verify the enumerated log with the
host PC.
adb devicesCopy to clipboard
The
following output is
displayed.
List of devices attached
541eb4ba deviceCopy to clipboard
- Host: Connect a USB device such as a mouse, or a pen drive, and verify
device detection with the following
command.
lsusbCopy to clipboard
The
following output is
displayed.
Bus 002 Device 003: ID 0b95:1790 ASIX Electronics Corp. AX88179 Gigabit Ethernet
Bus 002 Device 002: ID 05e3:0625 Genesys Logic, Inc. USB3.2 Hub
Bus 002 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
Bus 001 Device 002: ID 05e3:0610 Genesys Logic, Inc. Hub
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hubCopy to clipboard
Last Published: Mar 26, 2025
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