# Video architecture
The video software stack consists of a client application that interacts with the Adreno VPU using the V4L2 framework.
The following figure shows the video software architecture for decoder and encoder. The image on the left shows the decoder architecture and the image on the right shows the encoder architecture.
**Figure: Video decoder and encoder software architecture**
The following table lists the components of the video software architecture:
| Component | Description |
| --- | --- |
| User application | Interacts with the FileSource for decoder and the Camera Source for encoder based on GStreamer/V4L2 |
| V4L2 framework |
Interacts with user application and the Adreno VPU driver
Handles events, callbacks, and buffer management
|
| Adreno VPU driver |
Acts as an entry point to the video kernel mode driver (KMD)
Common driver for the encoder and decoder that controls the Adreno VPU
Manages the video driver state machine, buffer allocation, clock/bus management, and communication with Adreno VPU using the Host Firmware Interface (HFI)
|
| Adreno VPU | Functions as a hardware accelerated engine that decodes and encodes a video with minimal power consumption |
## Video feature summary
The Adreno VPU provides the following video decoding and encoding features:
| Use case | Feature | QCS6490 | Qualcomm Dragonwing ^™^ IQ-9075/Qualcomm Dragonwing ^™^ IQ-8275 |
| --- | --- | --- | --- |
| **Codecs** | H.264 (8‑bit decoder) | ✔ | ✔ |
| **Codecs** | HEVC (8‑bit decoder) | ✔ | ✔ |
| **Codecs** | HEVC (10‑bit decoder) | ✔ | ✔ |
| **Codecs** | VP9 (8‑bit decoder) | ✔ | ✔ |
| **Codecs** | VP9 (10‑bit decoder) | ✔ | ✔ |
| **Codecs** | AV1 (8‑bit decoder) | ✖ | ✔ |
| **Codecs** | AV1 (10‑bit decoder) | ✖ | ✔ |
| **Codecs** | H.264 (8‑bit encoder) | ✔ | ✔ |
| **Codecs** | HEVC (8‑bit encoder) | ✔ | ✔ |
| **Features** | [B-frame encode](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#beframeencode) | ✔ | ✔ |
| **Features** | [Encoder initial QP override](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#qpoverride) | ✔ | ✔ |
| **Features** | [Hierarchical-P encode](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#hierarchical) | ✔ | ✖ |
| **Features** | [Slice encode](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#sliceencode) | ✔ | ✖ |
| **Features** | [Intra-refresh](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#interarefresh) | ✔ | ✖ |
| **Features** | [Preprocessing](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#videoencoder) | ✔ | ✖ |
| **Features** | [Rate control](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#ratecontrol) | ✔ | ✔ |
| **Features** | [Long term reference (LTR)](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#longterm) | ✔ | ✖ |
| **Features** | [Dynamic properties](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#dynamicencoder) | ✔ | ✔ |
| **Concurrency** | Multi-instance support | ✔ | ✔ |
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## Video capabilities
Tab QCS6490
Tab IQ-8275
Tab IQ-9075
The Adreno VPU on QCS6490 is a sixth-generation video processing unit that comes with the following capabilities:
>
>
> | Feature | Capability |
> | --- | --- |
> | Video decode | Up to 4096 × 2160 at 60 fps for H.264/HEVC/VP9 |
> | Video encode | Up to 4096 × 2160 at 30 fps for H.264/HEVC |
> | Multichannel capability |
8x of 1920 × 1088 at 30 fps decode
16x of 1280 × 720 at 30 fps decode
4x of 1920 × 1088 at 30 fps encode
8x of 1280 × 720 at 30 fps encode
|
> | High frame rate capture | 1280 × 720 at 480 fps or 1920 × 1088 at 240 fps |
> | Maximum macroblocks per second | 2088960
You can calculate the maximum macroblocks per second using the formula:
For example, (4096 × 2176 × 60)/256=2088960 |
>
>
>
> For more information on decode and encode capabilities for QCS6490, see [Advanced video specifications](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#qcs6490).
The Adreno VPU on Dragonwing IQ-8275 is a seventh-generation video processing unit that comes with the following capabilities:
>
>
> | **Feature** | **Capability** |
> | --- | --- |
> | Video decode |
Up to 3840 × 2160 at 120 fps for H.264/HEVC/VP9
Up to 3840 × 2160 at 60 fps for AV1
|
> | Video encode | Up to 4096 × 2160 at 60 fps for H.264/HEVC |
> | Multichannel capability |
16x for 1920 × 1088 at 30 fps decode
16x for 1280 × 720 at 30 fps encode
|
> | High framerate capture | 1920 × 1088 at 240 fps or 3840 × 2160 at 60 fps |
> | Maximum macroblocks per second | 3916800
You can calculate the maximum macroblocks per second using the formula:
For example, (3840 × 2176 × 120)/256 = 3916800 |
>
>
>
> For more information on decode and encode capabilities for Dragonwing IQ-8275, see [Advanced video specifications](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#qcs8275).
The Adreno VPU on Dragonwing QCS9075 is a seventh-generation video processing unit that comes with the following capabilities:
| Feature | Capability |
| --- | --- |
| Video decode |
Up to 7680 × 4320 at 60 fps or 3840 × 2160 at 240 fps for H.264/HEVC/AV1
Up to 3840 × 2160 at 240 fps for VP9
|
| Video encode | Up to 7680 × 4320 at 30 fps for H.264/HEVC |
| Multichannel capability |
32x for 1920 × 1088 at 30 fps decode
32x for 1280 × 720 at 30 fps encode
24x for 1920 × 1088 at 30 fps encode
8x for 3840 × 2160 at 30 fps decode
|
| High frame rate capture | 1920 × 1088 at 480 fps or 3840 × 2160 at 120 fps |
| Maximum macroblocks per second | 7833600
> > > You can calculate the maximum macroblocks per second using the formula: > > > (aligned width × aligned height × fps)/(macroblock size) > > > For example, (3840 × 2176 × 240)/256 = 7833600 |
For more information on decode and encode capabilities for Dragonwing IQ-9075, see [Advanced video specifications](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#qcs9075).
## Next steps
- [Advanced video specifications](https://docs.qualcomm.com/doc/80-70020-20/topic/feature-descriptions.html#section-tmv-51x-k1c-eputla-02-14-24-1638-44-607)
Last Published: Jul 02, 2025
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