# System-on-chip sleep states

The System-on-chip (SoC) supports several sleep states based on the requirement of
resources, such as, double data rate (DDR), crystal oscillator (XO)
clock, digital power supply `(Chip_CX)`, and memory domains power
supply `(Chip_MX)`.

Note

The SoC sleep states are enabled on QCS6490/QCS5430.

As the device transitions from active state to SoC sleep state, the
power consumption decreases.

For example, when the device is idle with no use cases running, it’s in
the SoC sleep state (AOSD). This is the deepest sleep state and consumes
the least power. In this state, the resources, such as, XO clock,
memory, and power supply of digital and memory domains also enter their
respective sleep states.

The following table lists the supported SoC sleep states.

Note

The SoC sleep states listed in the table are for information only. You can’t enable or disable SoC sleep states.

Table : SoC sleep states

| SoC sleep states | Resource states |
| --- | --- |
| Active | <ul class="simple"><br><li><p>XO clock on</p></li><br><li><p><code class="docutils literal notranslate"><span class="pre">Chip_CX</span></code> (Digital) and <code class="docutils literal notranslate"><span class="pre">Chip_MX</span></code> (Memory) power<br>domains operate at active voltage level</p></li><br></ul> |
| DDR collapse | <ul class="simple"><br><li><p>Memory in Self-Refresh mode</p></li><br><li><p>XO clock on</p></li><br><li><p><code class="docutils literal notranslate"><span class="pre">Chip_CX</span></code> and <code class="docutils literal notranslate"><span class="pre">Chip_MX</span></code> power domains are configured<br>with active voltage</p></li><br></ul> |
| XO shutdown (CXSD) | <ul class="simple"><br><li><p>Memory in Self-Refresh mode</p></li><br><li><p>XO clock off</p></li><br><li><p><code class="docutils literal notranslate"><span class="pre">Chip_CX</span></code> power domain configured with least voltage</p></li><br><li><p><code class="docutils literal notranslate"><span class="pre">Chip_MX</span></code> configured with active voltage</p></li><br></ul> |
| SoC sleep (AOSD) | <ul class="simple"><br><li><p>The deepest system sleep state where the system is<br>expected to achieve the lowest sleep power, which is the<br>most desired state for power management</p></li><br><li><p>Memory in Self-Refresh mode</p></li><br><li><p>XO clock off</p></li><br><li><p><code class="docutils literal notranslate"><span class="pre">Chip_CX</span></code> and <code class="docutils literal notranslate"><span class="pre">Chip_MX</span></code> power domains configured with the<br>least voltage</p></li><br></ul> |

## Verify system-on-chip sleep state

To retrieve SoC sleep statistics, run the following commands:

mount -t debugfs none /sys/kernel/debug
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cat /sys/kernel/debug/qcom_stats/aosd
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cat /sys/kernel/debug/qcom_stats/cxsd
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The following is a sample output:

Count: 3

Last Entered At: 1087943710378

Last Exited At: 1088442890377

Accumulated Duration: 6668562002

The following table explains the output fields:

Table : SoC sleep states output fields

| Field | Explanation |
| --- | --- |
| `Count` | <ul class="simple"><br><li><p>Indicates the number of times the SoC entered a<br>particular power state</p></li><br><li><p>A nonzero count indicates that the SoC has exercised<br>sleep states</p></li><br></ul> |
| `Last Entered At` | Indicates the last sleep entry timestamp in ticks |
| `Last Exited At` | Indicates the last sleep exit timestamp in ticks |
| `Accumulated duration` | Total amount of time in sleep, represented in ticks |

Note

The XO clock frequency of 19.2 MHz determines the ticks.

Last Published: Jul 03, 2025

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