# QCS8275 high-level block diagram IVI Sheet.138 Sheet.1 Sheet.2 Sheet.3 Connectivity Connectivity Sheet.4 Sheet.5 Memory support Memory support Sheet.6 Real time subsystem Real time subsystem Sheet.7 QCS8275 QCS8275 Sheet.8 UFS 2-lane UFS 2-lane Sheet.9 4-lane DSI (×1) 4-lane DSI (×1) Sheet.10 RTSS_GPIO (×68) RTSS_GPIO (×68) Sheet.11 GPIO (×133) LPASS, Main GPIO (×133)LPASS, Main Sheet.12 PCIe Gen4 (×2 lane) PCIe Gen4 (×2 lane) Sheet.13 SGMII (×1) SGMII (×1) Sheet.14 EBI0-1 EBI0-1 Sheet.15 LPDDR5 LPDDR5 Sheet.16 EBI2-3 EBI2-3 Sheet.17 SPMI SPMI Sheet.18 USB 2.0 (×1) USB 2.0 (×1) Sheet.19 eDP/DP (×1) eDP/DP (×1) Sheet.20 LS-I2S/TDM/PCM (×8) LS-I2S/TDM/PCM (×8) Sheet.21 NOR flash NOR flash Sheet.22 Processors Processors Sheet.23 System functions System functions Sheet.24 PCIe Gen4 (×4 lane) PCIe Gen4 (×4 lane) Sheet.25 HS-I2S (×3) HS-I2S (×3) Sheet.26 eMMC eMMC Sheet.27 RTSS_IO (×68): Only the RTSS_IO_52 pin is reserved for intern... · RTSS_IO (×68): Only the RTSS_IO_52 pin is reserved for internal use. · HS-I²S (×3): Two out of the three HS-I²S interfaces are muxed behind the I²S interfaces.· LS-I²S/PCM/TDM (×8): Among the eight LS-I²S interfaces, five are dedicated LS-I²S, two are muxed with HS-I²S, and one dedicated HS-I²S interface reconfigured as an LS-I²S interface. · eMMC and UFS: Cannot co-exist, either eMMC or UFS can be used.· EBI External Bus Interface Sheet.28 USB 3.1 Gen 2 (×1) (HS + SS) USB 3.1 Gen 2 (×1)(HS + SS) Sheet.29 Audio CODEC / MIC / Amplifiers Audio CODEC / MIC / Amplifiers Sheet.30 Up to 3.125 Gbps Up to 3.125 Gbps Sheet.31 To any Ethernet switches / PHY To any Ethernet switches / PHY Bracket Sheet.33 Bracket.688 Sheet.35 Sheet.36 Sheet.37 Sheet.38 Sheet.39 Sheet.40 SPI SPI Sheet.41 UART UART Sheet.42 I2C I2C Sheet.43 I3C I3C Sheet.44 CAN CAN Sheet.45 OSPI OSPI Sheet.46 RGMII RGMII Sheet.47 Sheet.48 Sheet.49 Sheet.50 Sheet.51 Sheet.52 Sheet.53 SPI SPI Sheet.54 UART UART Sheet.55 I2C I2C Sheet.56 I3C I3C Sheet.57 Sheet.58 Sheet.59 PCIe slots / switches PCIe slots / switches Sheet.60 Sheet.61 Sheet.62 Sheet.63 Sheet.64 Sheet.65 Sheet.66 Sheet.67 Sheet.68 Sheet.69 Sheet.70 Sheet.71 Sheet.72 Sheet.73 Sheet.74 Sheet.75 Sheet.76 Sheet.77 Sheet.78 Sheet.79 Sheet.80 Sheet.81 Sheet.82 Sheet.83 Sheet.84 Sheet.85 Sheet.86 Sheet.87 Sheet.88 Sheet.89 Sheet.90 Sheet.91 Sheet.92 Sheet.93 Sheet.94 Sheet.95 Sheet.96 Sheet.97 Sheet.98 Sheet.99 Sheet.100 Sheet.101 Sheet.102 Sheet.103 Sheet.104 Sheet.105 Sheet.106 4-lane CSI 4-lane CSI Sheet.107 4-lane CSI 4-lane CSI Sheet.108 4-lane CSI 4-lane CSI Sheet.109 Sheet.110 Sheet.111 Sheet.112 Sheet.113 Sheet.114 Sheet.115 Sheet.116 Sheet.117 Sheet.118 Sheet.119 LPDDR5 LPDDR5 Sheet.120 Sheet.121 UIM UFS Sheet.122 Sheet.123 Sheet.124 Sheet.125 UIM eMMC Sheet.126 Sheet.127 Sheet.128 Sheet.129 DP/eDP connectors /display bridges DP/eDP connectors/display bridges Sheet.130 Sheet.131 Display connector/ bridges Display connector/ bridges Sheet.132 Sheet.133 Camera connectors/ bridges Camera connectors/ bridges Sheet.134 Power Management Power Management Sheet.135 Sheet.136 Sheet.137 Multimedia Multimedia Last Published: Jul 21, 2026 [Previous Topic Key features](https://docs.qualcomm.com/bundle/publicresource/80-73475-1/topics/key-features.md) [Next Topic Introduction](https://docs.qualcomm.com/bundle/publicresource/80-73475-1/topics/introduction.md)