# Key features Source: [https://docs.qualcomm.com/doc/80-73475-1/topic/key-features.html](https://docs.qualcomm.com/doc/80-73475-1/topic/key-features.html) - Qualcomm Spectra™ 692 ISP image processing engine - Adreno 623 VPU for high-quality, Ultra HD video encode and decode - Qualcomm® Adreno™ 1199 DPU for Ultra HD multi-display support - Dedicated real time subsystem (RTSS) equipped with quad Arm Cortex-R52 CPU - 1 × OSPI/QSPI interface (166 MHz) in RTSS domain for boot-up - 2 × PCIe interfaces: - 1 × 2-lane PCIe Gen 4 (PCIe0) - 1 × 4-lane PCIe Gen 4 (PCIe1) - 1 × SGMII (SGMII0) supporting up to 3.125 Gbps - 1 × RGMII v1.3 and v2.0 up to 1 Gbps over RTSS domain, multiplexed with RTSS I/Os - Two USB interfaces: - USB0 – USB 3.1 Gen 2 (HS and SS, supporting device and host modes) - USB1 – USB 2.0 (HS, supporting device and host modes) - 1 × UFS 3.1 up to Gear 4 (UFS0), 2 lanes, Rate B, 11.67 Gbps (bootable) - 1 × SDIO interface (SDC1) for eMMC 5.1 (bootable)/SD Card (storage only) - 3 × 4-lane CSI C-PHY/D-PHY interfaces (CSI0, CSI1, CSI2) - 6 dedicated CCI\_I2C interfaces multiplexed with GPIOs - 3 camera MCLKs, multiplexed with GPIOs - Each 4-lane interface configurable as 2 × PHY with 2 or 1 lanes each - 1 × 4-lane DSI C-PHY/D-PHY interface (DSI0) - 1 × DP/eDP interface up to 4 lanes; DP is compliant with VESA DisplayPort v1.4 - 133 GPIOs in main domain, 68 GPIOs in RTSS domain, multiplexed with SPI/I²C/I³C/UART/CAN - Audio interfaces: LS-I2S, PCM/TDM, HS-I2S Last Published: Jul 21, 2026 [Previous Topic Device description](https://docs.qualcomm.com/bundle/publicresource/80-73475-1/topics/device-description.md) [Next Topic QCS8275 high-level block diagram](https://docs.qualcomm.com/bundle/publicresource/80-73475-1/topics/high-level-block-diagram.md)