# Overview
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/introduction.html](https://docs.qualcomm.com/doc/80-78830-1/topic/introduction.html)
This topic provides the module component information, high-level functional block
diagram, and the device features.
## QCC743M variants
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/introduction.html](https://docs.qualcomm.com/doc/80-78830-1/topic/introduction.html)
The Qualcomm^®^
QCC743M is a compact, all-in-one module featuring a tri-radio chipset that
integrates 1x1 Wi-Fi 6, Bluetooth^®^ 5.4, and IEEE 802.15.4 . Unlike typical
combo modules, the QCC743M includes a high-performance 32-bit RISC-V
processor with FPU and DSP, operating at up to 325 MHz, along with 484 KB on-chip SRAM,
48 KB cache, and 128 KB ROM.
The QCC743M supports hostless mode, enabling it to run full protocol stacks
and IoT applications independently, without an external MCU. Built on FreeRTOS, its
open-source SDK is available on CodeLinaro, and integrates with the Microsoft Visual
Studio Code (VS Code) IDE extension to accelerate development. It also supports hosted
mode (both RCP and NCP) for use as a connectivity transceiver with an external host.
The QCC743M family includes six distinct variants, offering flexibility in
chipset configuration and antenna options to meet diverse design needs:
- QCC743M-1 relies on external NOR Flash on the module.
- QCC743M-4 uses embedded NOR Flash inside the chipset (SiP).
Table : QCC743M variants
| Variant | Configuration code | Chipset | Chipset memory | Module memory | Antenna type | Package |
| :---: | :---: | :---: | --- | --- | --- | --- |
| QCC743M-1B | 101-AA | QCC743-1 | - | 4 MB external NOR Flash | PCB antenna | 12.28 × 17.28 × 2.37 mm, QFN-40 |
| QCC743M-1U | 101-AB | QCC743-1 | - | 4 MB external NOR Flash | RF connector | 12.28 × 12.28 × 2.37 mm, QFN-40 |
| QCC743M-1P | 101-AC | QCC743-1 | - | 4 MB external NOR Flash | RF pin antenna | 12.28 × 12.28 × 2.37 mm, QFN-40 |
| QCC743M-4B | 401-AA | QCC743-4 | 4 MB embedded NOR Flash (SiP) | - | PCB antenna | 12.28 × 17.28 × 2.37 mm, QFN-40 |
| QCC743M-4U | 401-AB | QCC743-4 | 4 MB embedded NOR Flash (SiP) | - | RF connector | 12.28 × 12.28 × 2.37 mm, QFN-40 |
| QCC743M-4P | 401-AC | QCC743-4 | 4 MB embedded NOR Flash (SiP) | - | RF pin antenna | 12.28 × 12.28 × 2.37 mm, QFN-40 |
## QCC743M functional block diagram
Note:
- Module memory: The 4 MB NOR flash module memory is applicable only to the
QCC743M-1.
- BLE sleep clock configuration: To retain BLE connections in low power mode,
connect a 32 kHz sleep clock source such as a crystal to GPIO 16 and GPIO 17 or
an oscillator to GPIO 17. For detailed guidance, please contact the Qualcomm
support team.
- Power-on sequence for bootstrap pins CHIP\_EN and Boot (GPIO2): To meet the
power-on timing requirement, the CHIP\_EN pin must be asserted at least 3.3 ms
after the Boot pin. In hostless mode, this delay should be implemented using an
RC circuit on the CHIP\_EN pin. In hosted mode, the timing should be controlled
by the MCU connected to CHIP\_EN. For detailed guidance, please contact the
Qualcomm support team.
## QCC743M features
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/introduction.html](https://docs.qualcomm.com/doc/80-78830-1/topic/introduction.html)
The following table lists the comprehensive features of the QCC743M and its
capabilities.
| Feature | Description | Description | Description | Description |
| --- | --- | --- | --- | --- |
| Microcontroller | 32‑bit RISC-V processor up to
325 MHz | 32‑bit RISC-V processor up to
325 MHz | 32‑bit RISC-V processor up to
325 MHz | 32‑bit RISC-V processor up to
325 MHz |
| On-chip Memory |
- 484 KB SRAM
- 128 KB ROM
- 1/2/4 KB OTP
- 4 Kb eFuse
|
- 484 KB SRAM
- 128 KB ROM
- 1/2/4 KB OTP
- 4 Kb eFuse
|
- 484 KB SRAM
- 128 KB ROM
- 1/2/4 KB OTP
- 4 Kb eFuse
|
- 484 KB SRAM
- 128 KB ROM
- 1/2/4 KB OTP
- 4 Kb eFuse
|
| Security System |
- Security system encryption engine
- Secure services (secure boot, secure debug, OTA, OTFAD, and so
on)
|
- Security system encryption engine
- Secure services (secure boot, secure debug, OTA, OTFAD, and so
on)
|
- Security system encryption engine
- Secure services (secure boot, secure debug, OTA, OTFAD, and so
on)
|
- Security system encryption engine
- Secure services (secure boot, secure debug, OTA, OTFAD, and so
on)
|
| Standard |
- IEEE 802.11b/g/n/ax
- Bluetooth Low Energy 5.4
- IEEE 802.15.4
|
- IEEE 802.11b/g/n/ax
- Bluetooth Low Energy 5.4
- IEEE 802.15.4
|
- IEEE 802.11b/g/n/ax
- Bluetooth Low Energy 5.4
- IEEE 802.15.4
|
- IEEE 802.11b/g/n/ax
- Bluetooth Low Energy 5.4
- IEEE 802.15.4
|
| Wi-Fi |
- Max Tx Power (HE40 and MCS9): +16 dBm
- Active Tx Power (HE40 and MCS9): 245 mA
- Rx Sensitivity (HE40 and MCS9): -69 dBm
- Active Rx Power (HE40 and MCS9): 64 mA
|
- Max Tx Power (HE40 and MCS9): +16 dBm
- Active Tx Power (HE40 and MCS9): 245 mA
- Rx Sensitivity (HE40 and MCS9): -69 dBm
- Active Rx Power (HE40 and MCS9): 64 mA
|
- Max Tx Power (HE40 and MCS9): +16 dBm
- Active Tx Power (HE40 and MCS9): 245 mA
- Rx Sensitivity (HE40 and MCS9): -69 dBm
- Active Rx Power (HE40 and MCS9): 64 mA
|
- Max Tx Power (HE40 and MCS9): +16 dBm
- Active Tx Power (HE40 and MCS9): 245 mA
- Rx Sensitivity (HE40 and MCS9): -69 dBm
- Active Rx Power (HE40 and MCS9): 64 mA
|
| Bluetooth |
- Max Tx Power
- BLE (2 Mbps): +10 dBm
- BLE (1 Mbps): +10 dBm
- BLE Coded PHY (500 kbps): +10 dBm
- BLE Coded PHY (125 kbps): +10 dBm
- Rx Sensitivity
- BLE (2 Mbps): -97 dBm
- BLE (1 Mbps): -99 dBm
- BLE Coded PHY (500 kbps): -102 dBm
- BLE Coded PHY (125 kbps): -105 dBm
- Active Rx Power: 51 mA
|
- Max Tx Power
- BLE (2 Mbps): +10 dBm
- BLE (1 Mbps): +10 dBm
- BLE Coded PHY (500 kbps): +10 dBm
- BLE Coded PHY (125 kbps): +10 dBm
- Rx Sensitivity
- BLE (2 Mbps): -97 dBm
- BLE (1 Mbps): -99 dBm
- BLE Coded PHY (500 kbps): -102 dBm
- BLE Coded PHY (125 kbps): -105 dBm
- Active Rx Power: 51 mA
|
- Max Tx Power
- BLE (2 Mbps): +10 dBm
- BLE (1 Mbps): +10 dBm
- BLE Coded PHY (500 kbps): +10 dBm
- BLE Coded PHY (125 kbps): +10 dBm
- Rx Sensitivity
- BLE (2 Mbps): -97 dBm
- BLE (1 Mbps): -99 dBm
- BLE Coded PHY (500 kbps): -102 dBm
- BLE Coded PHY (125 kbps): -105 dBm
- Active Rx Power: 51 mA
|
- Max Tx Power
- BLE (2 Mbps): +10 dBm
- BLE (1 Mbps): +10 dBm
- BLE Coded PHY (500 kbps): +10 dBm
- BLE Coded PHY (125 kbps): +10 dBm
- Rx Sensitivity
- BLE (2 Mbps): -97 dBm
- BLE (1 Mbps): -99 dBm
- BLE Coded PHY (500 kbps): -102 dBm
- BLE Coded PHY (125 kbps): -105 dBm
- Active Rx Power: 51 mA
|
| 802.15.4 |
- Max Tx Power: +20 dBm
- Rx Sensitivity: -105 dBm
|
- Max Tx Power: +20 dBm
- Rx Sensitivity: -105 dBm
|
- Max Tx Power: +20 dBm
- Rx Sensitivity: -105 dBm
|
- Max Tx Power: +20 dBm
- Rx Sensitivity: -105 dBm
|
| Peripherals | 19 configurable I/O:
- Serial Flash
- SD/MMC
- SDIO 2.0
- QSPI
- SPI
- I2C
- UART
- I2S
- CAN (ISO 11898)
- PWM
- ADC
- DAC
- JTAG
| 19 configurable I/O:
- Serial Flash
- SD/MMC
- SDIO 2.0
- QSPI
- SPI
- I2C
- UART
- I2S
- CAN (ISO 11898)
- PWM
- ADC
- DAC
- JTAG
| 19 configurable I/O:
- Serial Flash
- SD/MMC
- SDIO 2.0
- QSPI
- SPI
- I2C
- UART
- I2S
- CAN (ISO 11898)
- PWM
- ADC
- DAC
- JTAG
| 19 configurable I/O:
- Serial Flash
- SD/MMC
- SDIO 2.0
- QSPI
- SPI
- I2C
- UART
- I2S
- CAN (ISO 11898)
- PWM
- ADC
- DAC
- JTAG
|
| Voltage |
- Input voltage: 2.97 V~3.63 V
- I/O voltage: 1.8 V/3.3 V
|
- Input voltage: 2.97 V~3.63 V
- I/O voltage: 1.8 V/3.3 V
|
- Input voltage: 2.97 V~3.63 V
- I/O voltage: 1.8 V/3.3 V
|
- Input voltage: 2.97 V~3.63 V
- I/O voltage: 1.8 V/3.3 V
|
| Environmental |
- Temperature
- Operating: -40°C ~ 85°C
- Storage: -40°C ~ 125°C
- Humidity
- Relative: < 90% Non-condensing
- Storage: < 90% Non-condensing
|
- Temperature
- Operating: -40°C ~ 85°C
- Storage: -40°C ~ 125°C
- Humidity
- Relative: < 90% Non-condensing
- Storage: < 90% Non-condensing
|
- Temperature
- Operating: -40°C ~ 85°C
- Storage: -40°C ~ 125°C
- Humidity
- Relative: < 90% Non-condensing
- Storage: < 90% Non-condensing
|
- Temperature
- Operating: -40°C ~ 85°C
- Storage: -40°C ~ 125°C
- Humidity
- Relative: < 90% Non-condensing
- Storage: < 90% Non-condensing
|
Last Published: Apr 08, 2026
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Pin definitions](https://docs.qualcomm.com/bundle/publicresource/80-78830-1/topics/pin-definitions.md)