# Pin definitions
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html](https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html)
This topic explains the pin assignments of the QCC743M. The figure and
table within this topic provide details on pinouts, pad attributes, and their
corresponding definitions.
## I/O parameter definitions
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html](https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html)
The following table lists pad attributes and their descriptions, pad pull details, and
the pad voltage groupings used throughout this topic.
| Symbol | Description |
| --- | --- |
| ***Pin attribute*** | ***Pin attribute*** |
| AI | Analog input (does not include pad circuitry) |
| AO | Analog output (does not include pad circuitry) |
| DI | Digital input (CMOS) |
| DO | Digital output (CMOS) |
## Pin map
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html](https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html)
A high-level view of the pin assignments is shown in the following figure. For more
information on package details and to create printed circuit board (PCB) footprint, see
[Mechanical information](https://docs.qualcomm.com/doc/80-78830-1/topic/mechanical-information.html).
Figure : QCC743M
-B pin map
Figure : QCC743M
-U pin map
Figure : QCC743M
-P pin map
## Pin descriptions
Source: [https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html](https://docs.qualcomm.com/doc/80-78830-1/topic/pin-definitions.html)
The following table describes the pin functions, pin pull types, and pin voltages. It
also provides a mapping of pin numbers and pin names for all the pins on the device.
These include general pins, GPIO pins, and power pins.
| Pad number | Pad name | Pad type | Power domain | Functional description |
| --- | --- | --- | --- | --- |
| 16 | VDD33 | PWR | – | Power input (2.97 V~3.63 V) |
| 9 | VDDIO1 | PWR | – | Host I/O voltage input GPIO0–15 |
| 25 | VDDIO2 | PWR | – | Host I/O voltage input GPIO20–30 |
| 10, 15, 18, 26, 30, 32 | GND | GND | GND | Ground |
| 31 | NC | – | – | NC for QCC743M
-B and QCC743M
-U |
| 31 | ANT | AI/AO | – | Pin antenna for QCC743M
-P |
| 19 | NC | – | – | – |
| 20 | NC | – | – | – |
| 17 | CHIP\_EN | DI | – | Chip power on |
| 1 | GPIO0 | DI/DO | VDDIO1 | General purpose I/O |
| 2 | GPIO1 | DI/DO | VDDIO1 | General purpose I/O |
| 3 | GPIO2 | DI/DO | VDDIO1 | General purpose I/O |
| 4 | GPIO3 | DI/DO | VDDIO1 | General purpose I/O |
| 5 | GPIO12 | DI/DO | VDDIO1 | General purpose I/O |
| 6 | GPIO11 | DI/DO | VDDIO1 | General purpose I/O |
| 7 | GPIO10 | DI/DO | VDDIO1 | General purpose I/O |
| 8 | GPIO14 | DI/DO | VDDIO1 | General purpose I/O |
| 11 | GPIO13 | DI/DO | VDDIO1 | General purpose I/O |
| 12 | GPIO15 | DI/DO | VDDIO1 | General purpose I/O |
| 13 | GPIO17 | DI/DO | VDD33 | General purpose I/O |
| 14 | GPIO16 | DI/DO | VDD33 | General purpose I/O |
| 21 | GPIO20 | DI/DO | VDDIO2 | General purpose I/O |
| 22 | GPIO21 | DI/DO | VDDIO2 | General purpose I/O |
| 23 | GPIO22 | DI/DO | VDDIO2 | General purpose I/O |
| 24 | GPIO28 | DI/DO | VDDIO2 | General purpose I/O |
| 27 | GPIO27 | DI/DO | VDDIO2 | General purpose I/O |
| 28 | GPIO29 | DI/DO | VDDIO2 | General purpose I/O |
| 29 | GPIO30 | DI/DO | VDDIO2 | General purpose I/O |
| | | | | |
Table : GPIO pin mux
| Pad name | QSPI | SDIO | SDH | SPI | I2C
(0/1) | UART
(0/1) | I2S | PWM | CAN (ISO 11898) | ADC | DAC | JTAG |
| :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: | :---: |
| GPIO0 | – | – | – | CS | SCL | RTS/CTS/TX/RX | BCLK | CH0P/CH0P | TX/RX | CH9 | – | TMS |
| GPIO1 | – | – | – | CLK | SDA | RTS/CTS/TX/RX | FS | CH1P/CH0N | TX/RX | CH8 | – | TCK |
| GPIO2 | – | – | – | MISO | SCL | RTS/CTS/TX/RX | DI | CH2P/CH1P | TX/RX | CH2 | – | TDO |
| GPIO3 | – | – | – | MOSI | SDA | RTS/CTS/TX/RX | DO | CH3P/CH1N | TX/RX | CH3 | – | TDI |
| GPIO10 | SCL | DAT2 | DAT1 | MISO | SCL | RTS/CTS/TX/RX | DI | CH2P/CH1P | TX/RX | CH7 | – | TDO |
| GPIO11 | CS | DAT3 | DAT0 | MOSI | SDA | RTS/CTS/TX/RX | DO | CH3P/CH1N | TX/RX | – | – | TDI |
| GPIO12 | SDA0 | CMD | CLK | CS | SCL | RTS/CTS/TX/RX | BCLK | CH0P/CH2P | TX/RX | CH6 | – | TMS |
| GPIO13 | SDA1 | CLK | CMD | CLK | SDA | RTS/CTS/TX/RX | FS | CH1P/CH2N | TX/RX | CH5 | – | TCK |
| GPIO14 | SDA2 | DAT0 | DAT3 | MISO | SCL | RTS/CTS/TX/RX | DI | CH2P/CH3P | TX/RX | CH4 | A\_PWM\_P | TDO |
| GPIO15 | SDA3 | DAT1 | DAT2 | MOSI | SDA | RTS/CTS/TX/RX | DO | CH3P/CH3N | TX/RX | – | A\_PWM\_N | TDI |
| GPIO16 | – | – | – | CS | SCL | RTS/CTS/TX/RX | BCLK | CH0P/CH0P | TX/RX | – | – | TMS |
| GPIO17 | – | – | – | CLK | SDA | RTS/CTS/TX/RX | FS | CH1P/CH0N | TX/RX | – | – | TCK |
| GPIO20 | – | – | – | CS | SCL | RTS/CTS/TX/RX | BCLK | CH0P/CH2P | TX/RX | CH0/ACH0 | – | TMS |
| GPIO21 | – | – | – | CLK | SDA | RTS/CTS/TX/RX | FS | CH1P/CH2N | TX/RX | ACH1 | – | TCK |
| GPIO22 | – | – | – | MISO | SCL | RTS/CTS/TX/RX | DI | CH2P/CH3P | TX/RX | ACH2 | A\_PWM\_P | TDO |
| GPIO27 | – | – | – | MOSI | SDA | RTS/CTS/TX/RX | DO | CH3P/CH1N | TX/RX | CH10/ACH4 | A\_PWM\_N | TDI |
| GPIO28 | – | – | – | CS | SCL | RTS/CTS/TX/RX | BCLK | CH0P/CH2P | TX/RX | CH11/ACH5 | A\_PWM\_P | TMS |
| GPIO29 | – | – | – | CLK | SDA | RTS/CTS/TX/RX | FS | CH1P/CH2N | TX/RX | ACH6 | – | TCK |
| GPIO30 | – | – | – | MISO | SCL | RTS/CTS/TX/RX | DI | CH2P/CH3P | TX/RX | ACH7 | – | TDO |
Note:
The configuration of GPIO10–GPIO15 differs between QCC743M module variants:
- QCC743M-1: GPIO10–GPIO15 are dedicated to the QSPI interface for the onboard
module flash memory. These pins are fixed and cannot be reassigned to other
peripheral functions.
- QCC743M-4: GPIO10–GPIO15 are fully configurable and can be assigned to any
supported peripheral listed in the pin function table.
Last Published: Apr 08, 2026
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