# Hardware overview
The Qualcomm Dragonwing^TM^ IQ-615 (SMARC) Evaluation Kit (EVK) has Qualcomm IQ-615 SoC mounted on the main board. Learn more about the system block diagram, electrical design, features, and capabilities of the EVK.
## System block diagram
The following figure shows the system block diagram of the Dragonwing IQ-615 (SMARC) EVK platform. The system block diagram provides a visual representation of the architecture, highlighting the main components and their interactions.
Dragonwing IQ-615 (SMARC) EVK system block diagram
## Hardware specification
The following table outlines the key hardware specification of the Dragonwing IQ-615 (SMARC) EVK.
Note
For the list of interfaces supported in this release, see the [Qualcomm Linux 2.1 Release Notes](https://dragonwingdocs.qualcomm.com/Key-Documents/Software-Release-Notes/interfaces#iq6).
Dragonwing IQ-615 (SMARC) EVK key specifications
| Interface or feature | Description |
| --- | --- |
| SOM | IQ-615 (SMARC) |
| Memory |
LPDDR4X (2 × 16-bit)
8 GB supported; up to 1555 MHz
|
| PMIC | PMM6155AU power management IC |
| External MCU | Not present |
| Storage |
UFS 2.1 gear 3 - one lane (64 GB, DNP in DVT module)
eMMC v5.1 (32 GB)
QSPI NOR flash 64 MB (DNP)
I²C EEPROM 1K-bit
|
| Display | Four DisplayPorts:
MIPI DSI connector
HDMI connector
30‑pin dual‑channel LVDS connector
DisplayPort (DP) connector
eDP Connector (Supported only with QCS6490 SOM)
Note: LVDS and DSI are not supported simultaneously on the hardware and are expected to be supported in future releases. Currently, based on the MUX selection either HDMI or DSI connector will be enabled. |
| Camera/Video input |
1× 2‑lane CSI‑0 routed to SMARC edge connector
1× 4‑lane CSI-1 (Using MUX it is routed to GMSL de-serializer and a CSI connector. Any one option can be chosen)
|
| USB |
2× USB 3.0 stacked connectors
1× micro USB 2.0 connector
1× USB Type-C connector for main Power
1× USB Type-C USB (2.0) for debug
1× micro USB for flashing
|
| WLAN/Bluetooth^®^ |
Wi‑Fi/Bluetooth module via PCIe (Quectel AF68E Wi-Fi module)
2.4 GHz antenna support
|
| PCIe | 2× PCIe Gen2 (1‑lane) routed to SMARC edge connector used for the following:
NVMe SSD
Wi‑Fi/BT
Expansion via M.2 on carrier board
|
| Audio | I^2^ S interface routed to SMARC edge connector. Used with audio codec on carrier board for headset audio. |
| Ethernet | 1× Gigabit Ethernet via RGMII to GigE PHY (KSZ9031RNXI) |
| CAN/CAN-FD |
CAN is not supported natively on SoC
1× SPI‑to‑CAN controller implemented on SMARC module
|
| Low-speed expansion | Multiple low‑speed interfaces routed to SMARC edge connector, including UART, SPI, I²C, GPIOs. |
| Second low-speed expansion | Additional GPIOs available through SMARC edge connector and carrier board expansion headers. |
## Exterior view
The following figure shows the exterior view of the Dragonwing IQ-615 (SMARC) EVK.

Exterior view of the EVK
## EVK ports and interfaces
The following figures show a detailed view of all the connectors on the Dragonwing IQ-615 (SMARC) EVK:

Connectors on Dragonwing IQ-615 (SMARC) EVK top
Note
The retail board doesn’t have **Type-C Connector (Codiac) (13)** and the **USB 2.0 Type-A connector (16)** will be replaced with a Micro USB Connector.

Connectors on Dragonwing IQ-615 (SMARC) EVK bottom
The following figure shows the platform with few cables plugged in:

Platform with cables plugged in
Connectors and functions
| Connectors | Functions |
| --- | --- |
| P1 | GMSL2 FAKRA connector |
| P2 | CAN header |
| P3 | Expansion header |
| P8 | LVDS backlight connector (8-pin) |
| P11 | LVDS panel connector (30-pin) |
| P14 | Headset jack |
| P15 | DSI Display panel power connector |
| J1 | eDP connector |
| J2 | Micro-USB connector for flashing |
| J3 | Type-C connector (UART) |
| J4 | Type-C connector (Power input) |
| J6 | JTAG header |
| J7 | SMARC Edge connector |
| J8 | USB3.0 Type-A connector (Dual stacked) |
| J9 | USB3.0 Type-A connector (Dual stacked) |
| J10 | RJ45 connector-2 |
| J11 | RJ45 connector-1 |
| J12 | DisplayPort connector |
| J13 | Type-C connector (Codiac) |
| J14 | USB2.0 Type-A connector |
| J15 | HDMI Type-A connector |
| J20 | M.2(Key-M) Conn\_NVMe |
| J21 | M.2(Key-M) Conn\_Codiac |
| J22 | M.2(Key-E) QC daughter card |
| J23 | DSI Display Panel connector (22-pin) |
| J24 | CSI-1 Camera connector (22-pin) |
| J25 | CSI-0 Camera connector (22-pin) |
| SW11 | APWR ON/OFF switch |
### Expansion table
The Dragonwing IQ-615 (SMARC) EVK has a dual-channel, single 2 GB SDRAM IC.
Expansion table
| S.No | Pin number | Net name |
| --- | --- | --- |
| 1 | 1 | VREG\_S4A\_1P8 |
| 2 | 2 | LCD1\_VDD\_EN |
| 3 | 3 | V3P3\_OUT |
| 4 | 4 | SOC\_GPIO\_74\_CAM0\_RST# |
| 5 | 5 | SOC\_SSC\_CS0#\_S4A\_1P8 |
| 6 | 6 | SOC\_GPIO\_75\_CAM1\_RST# |
| 7 | 7 | SOC\_SSC\_CS1#\_S4A\_1P8 |
| 8 | 8 | SOC\_GPIO\_23\_SPI\_CS# |
| 9 | 9 | SOC\_SSC\_SCLK\_S4A\_1P8 |
| 10 | 10 | SOC\_GPIO\_22\_SPI\_CLK |
| 11 | 11 | SOC\_SSC\_MISO\_S4A\_1P8 |
| 12 | 12 | SOC\_GPIO\_20\_SPI\_MISO |
| 13 | 13 | SOC\_SSC\_MOSI\_S4A\_1P8 |
| 14 | 14 | SOC\_GPIO\_21\_SPI\_MOSI |
| 15 | 15 | USB2\_PORT1\_EN\_OC# |
| 16 | 16 | DSP0\_PWR\_EN\_S4A\_1P8 |
| 17 | 17 | SMARC\_SER3\_UART\_TX |
| 18 | 18 | NC |
| 19 | 19 | SMARC\_SER3\_UART\_RX |
| 20 | 20 | GND |
## DIP switch
The following images show the location of the DIP switches on the Dragonwing IQ-615 (SMARC) EVK:

DIP switches on Dragonwing IQ-615 (SMARC) EVK top

DIP switches on Dragonwing IQ-615 (SMARC) EVK bottom
The following tables detail DIP switch operations for the Dragonwing IQ-615 (SMARC) EVK, including functions and settings for main board configuration.
PCIe path selection
| Carrier board switch function | Switch configuration | Comments |
| --- | --- | --- |
| Enable Quectel AF68E Wi-Fi module | SW12–OFF
SW14–ON
SW16–OFF
SW17–ON | Select switches to enable PCIe path for Quectel AF68E |
| Enable NVMe module | SW12–OFF
SW14–OFF
SW16–ON
SW17–OFF | Select switches to enable PCIe path for NVMe module |
| Enable M.2 path | SW12–ON
SW14–OFF
SW16–ON
SW17–ON | Select switches to enable PCIe path for any PCIe-based M.2 card.
Ensure software availability |
MIPI selection
| Carrier board switch function | Switch configuration | Comments |
| --- | --- | --- |
| Enable GMSL deserializer | SW13–OFF | Select switches to connect from GMSL deserializer to CSI1 port |
| Enable 22‑pin camera connector | SW13–ON | Select switches to connect from 22‑pin camera connector to CSI1 port |
DSI selection (Supported only on DSI variant)
| Carrier board switch function | Switch configuration | Comments |
| --- | --- | --- |
| DSI lines from SMARC to HDMI converter | SW7–OFF | Switch to convert DSI-to-HDMI in the carrier board |
| DSI lines from SMARC to DSI connector | SW7–ON | 22‑pin DSI connector
Note: DSI connector is supported only on the DSI variant. |
I2S selection
| Carrier board switch function | Switch configuration | Comments |
| --- | --- | --- |
| I2S from SMARC to Quectel AF68E Wi-Fi module | SW15–OFF | None |
| I2S from SMARC to DSI-to-HDMI path | SW15–ON | None |
| Boot option | Switch | Setting |
| --- | --- | --- |
| eMMC boot option | SW3.1 FASTBOOT\_SEL\_2 | OFF |
| eMMC boot option | SW3.2 FASTBOOT\_SEL\_1 | OFF |
| eMMC boot option | SW3.3 FASTBOOT\_SEL\_0 | OFF |
| eMMC boot option | SW3.4 FORCE BOOT | OFF |
| UFS boot option | SW3.1 FASTBOOT\_SEL\_2 | ON |
| UFS boot option | SW3.2 FASTBOOT\_SEL\_1 | OFF |
| UFS boot option | SW3.3 FASTBOOT\_SEL\_0 | OFF |
| UFS boot option | SW3.4 FORCE BOOT | OFF |
| Forced USB BOOT | SW3.1 FASTBOOT\_SEL\_2 | OFF |
| Forced USB BOOT | SW3.2 FASTBOOT\_SEL\_1 | OFF |
| Forced USB BOOT | SW3.3 FASTBOOT\_SEL\_0 | OFF |
| Forced USB BOOT | SW3.4 FORCE BOOT | ON |
| | | |
| | | |
| | | |
Other switches
| Switch | Function |
| --- | --- |
| SW4 | Forced USB |
| SW5 | Volume up |
| SW6 | Volume down |
## LEDs
The Dragonwing IQ-615 (SMARC) EVK main board has LEDs that monitor system function status such as power-on and board faults required for debugging and bring up. The following table lists the functions of the LEDs:
| Reference designator | Location | Color | Function |
| --- | --- | --- | --- |
| LED1 | Carrier board | Green | Indicates that the power is On |
| D58 Stacked LEDs | Carrier board | Yellow | SOM input power LED |
| D58 Stacked LEDs | Carrier board | Yellow | SOM Reset Out LED |
| D58 Stacked LEDs | Carrier board | Yellow | Carrier Power LED |
| LED2 | Carrier board | Green | GMSL lock |
| DS1 | Carrier board | Green | USB hub LED |
| | | | |
| | | | |
## Hardware components and interfaces
The following are the high-level details of the Dragonwing IQ-615 (SMARC) processor, power supply, memory, and various interfaces, such as camera, USB, and DisplayPort. It also includes Ethernet, debug interface, and audio support.
### Processor
The target processor used in the Dragonwing IQ-615 (SMARC) EVK main board is the Dragonwing IQ-615 (SMARC) SoC. This SoC features the following:
- Qualcomm Kryo^™^ 460 with 64-bit application processor, and a 1 MB L3 cache.
- Kryo Gold: Two cores running at 1.9 GHz with a 256 kB L2 cache per core.
- Kryo Silver: Six low-power cores running at 1.6 GHz with a 64 kB L2 cache per core.
- Error-correcting code (ECC) to support system-level use cases.
- Qualcomm^®^ Adreno^™^ graphics processing unit (GPU) 612.
- OpenGL ES 3.2, Vulkan, Vulkan compute, and DirectX 12 (DX12) feature level (FL) 9.3.
- OpenCL 2.0.
The Dragonwing IQ-615 (SMARC) SoC supports integrated Ethernet, USB, Wi-Fi, PCIe, and Bluetooth^®^.
The Dragonwing IQ-615 (SMARC) EVK supports the following application areas:
- Handhelds and tablets
- Kiosks
- Industrial scanners
- Point-of-sale (POS) systems
- Human machine interface systems
- Robotics
- Drones and controllers
- cameras
- Qualcomm^®^ Edge AI box solutions
### Power
The main power input to the Dragonwing IQ-615 (SMARC) EVK is provided by the 20 V/4.5A power connector module with integrated Type-C cable. The EVK includes a Type-C adapter.
The Power management ICs manage the respective power supplies to various system blocks, including the SoC, PMIC, PCIe, and expansion ports.
### Camera interface
The MIPI CSI interface uses an analog switch that allows the MIPI CSI interfaces to be accessible.
To use a GMSL camera with the Dragonwing IQ-615 (SMARC) EVK, connect it through the GMSL connector. For more information, see [MIPI selection table](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-hw-overview.html#table-mipi-selection).
Note
GMSL functionality requires a hardware rework. This interface isn’t currently supported as indicated in the [Qualcomm Linux 2.0 Release Notes](https://dragonwingdocs.qualcomm.com/Key-Documents/Software-Release-Notes/interfaces#iq6).
The two MIPI CSI ports operate in D-PHY mode and support a range of existing cameras and flex.
The following block diagrams show CSI0 and CSI1 interfaces:
>
>
>
>
> Camera CSI0 interfaces
>
>
>
>
> Camera CSI1 interfaces
### USB interface
The Dragonwing IQ-615 (SMARC) EVK features the following six USB connectors:
- Two stacked USB connectors (J8 and J9)
- One micro-USB connector (J14)
- One Type-C USB (2.0) for debugging
- One micro-USB for flashing (J2)
- Type-C USB connector for main power (J4)
The following figure shows the USB interfaces and configuration.
USB interface and configuration
### Debug interface
The USB Type-C connector (J3) accesses the serial console during development. It interfaces with USB to UART converter (FT234XD-R). The converter translates USB signals into UART signals. The UART interface connects to the SMARC for debugging and acquiring console logs.
For the location of the debug interface connector on the main board, see the [Connectors on Dragonwing IQ-615 (SMARC) EVK](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-hw-overview.html#ports-interfaces).
**Debug interface connectors**
### Embedded DisplayPort (eDP) interface
The Dragonwing IQ-615 (SMARC) processor comes with 1x eDP interface. The eDP0 terminates at the connector J1 and is an optional interface through resistor mount option. You can choose either eDP or the LVDS according to your requirement.
Note
The eDP interface isn’t supported on the Dragonwing IQ-615 (SMARC). However, it’s supported on the QCS6490 SOM. Since Dragonwing IQ-615 (SMARC) doesn’t support the eDP, it’s not validated.
The following figure shows the eDP interface and configuration:
eDP interface and configuration
### DisplayPort (DP)
From the Dragonwing IQ-615 (SMARC) EVK, the DP lanes terminate at connector (J12).
The following figure shows the DP connectors:
DP connectors
### DSI
The `TMUX646` mux splits the single two‑lane DSI interface from the Dragonwing IQ-615 (SMARC) EVK into two dual‑lane DSI outputs. One DSI port connects directly to connector J23 for the Raspberry Pi Touch Display 2. The HDMI signals terminate at the Type‑A HDMI connector J15.
The following figure shows the DSI connectors:
DSI connectors
### LVDS interface
The Dragonwing IQ-615 (SMARC) EVK supports one 4-lane MIPI-DSI.
The Dragonwing IQ-615 (SMARC) EVK uses an analog switch for DSI0 interface. This analog switch converts DSI to DUAL LVDS interface and is terminated at P11 where Fortec display `PN: G133HAN01.1` is connected.
The following figure shows the LVDS connectors:
LVDS connectors
### Storage interfaces
The Dragonwing IQ-615 (SMARC) has four types of storage interfaces:
- Secure digital (SD) card
- Universal flash storage (UFS)
- Quad Serial Peripheral Interface (QSPI) NOR flash memory
- Electrically erasable programmable read only memory (EEPROM)
The following figure show the storage interfaces and configuration.
Storage interface connectors
#### SD card
From the Dragonwing IQ-615 (SMARC) edge, the SDC2 lines are terminated at the SD card connector (J16).
The following figure shows the SD card interface and configuration:
SD card interface
### eMMC (SDC1)
eMMC 32 GB is used as a nonvolatile mass storage device for OS, root file system, and the user data. eMMC is connected through the SDC1 interface for reliable boot and speed storage access.
eMMC SDC1 interface
#### Universal flash storage (UFS)
UFS 64 GB provides high‑performance nonvolatile storage with lower latency and higher throughput than eMMC. UFS is connected using a single‑lane UFS interface for fastboot and data‑intensive applications.
UFS interface
### QSPI NOR memory
QSPI NOR flash 64 MB is used for boot loader, firmware, or recovery images. QSPI provides fast random read access and supports execute‑in‑place (XIP) use cases.
QSPI NOR memory interface
#### EEPROM (I^2^ C)
I^2^ C‑based EEPROM (1‑Kbit) stores board‑specific configuration such as IDs, calibration data, or factory settings.
Used for low‑frequency access, non‑volatile parameter storage independent of main storage.
EEPROM interface
### Memory
The Dragonwing IQ-615 (SMARC) EVK has a dual channel single 2 GB SDRAM IC.
### PCIe interface
The Dragonwing IQ-615 (SMARC) main board supports the following two PCIe interfaces:
- PCIe0 a Gen2 2-lane interface
- PCIe1 a Gen2 4-lane PCIe interface
Select switches to enable PCIe path for Quectel AF68E Wi-Fi module, NVME module, and M.2 path. For DIP switch settings, see the [PCIe path selection](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-hw-overview.html#table-aqt-1vs-w2c).
The following figures show the PCIe interfaces and configuration.
PCIe interfaces and configuration
### Controller area network (CAN) interface
As the Dragonwing IQ-615 (SMARC) doesn’t support native RS‑232 signaling, the `SSC_QUP3_UART_TX` and `SSC_QUP3_UART_RX` signals from the SoC are used to provide RS‑232 functionality through an external UART to RS‑232 bridge.
Both CAN and RS‑232 interfaces are terminated on the same physical connector to enable flexible communication and debugging options.
Detailed pin assignments for CAN and RS‑232 signals on this shared connector are listed in the following table:
P2 connector and pin assignment
| Pin number | Function |
| --- | --- |
| Pin 2 | CAN0\_L |
| Pin 4 | CAN0\_H |
| Pin 8 | DB9\_RS232\_TX |
| Pin 10 | DB9\_RS232\_RX |
The following figure shows the CAN interface:
CAN interface
### Ethernet interface
The SoC connects to a Gigabit Ethernet PHY (KSZ9031RNX) using the RGMII interface for high speed data transfer. MDIO is used to configure, control and monitor the status of PHY.
The PHY handles the conversion between RGMII digital signals and the physical Ethernet link. The link status is indicated through the GBE0\_LINK signal for system monitoring.
Ethernet interface connectors
### JTAG interface
The JTAG connector header on the Dragonwing IQ-615 (SMARC) is a 10-position pin interconnect with 10 Position FPC connector contacts. The JTAG connector header is a 0.020” (0.50 mm) surface-mount connector with a right-angle orientation. The reference designator for the JTAG connector is J6, and its part number is 10051922-1010EHLF.
For the location of the JTAG connectors on the platform, see the [Connectors on Dragonwing IQ-615 (SMARC) EVK](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-hw-overview.html#ports-interfaces).
### Audio
The Dragonwing IQ-615 (SMARC) module outputs digital audio over the I^2^S interface to the DA7212 01UM audio codec. The audio codec converts the digital audio data into an analog signal. It also performs necessary audio processing and signal conditioning. The analog audio output is routed to a headset jack for headphone or headset playback.
The following figure shows the audio connections:
Audio connections
## Next steps
- [Set up the device.](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-set-up-the-device.html#iq615-ug-set-up-the-device)
- [Run sample applications.](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-run-sample-apps.html#iq615-ug-run-sample-applications)
- [Develop an application.](https://docs.qualcomm.com/doc/80-80022-291/topic/iq615-ug-develop-an-app.html#iq615-ug-develop-an-app)
Last Published: Oct 12, 2026
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