# Configure I2C in kernel Source: [https://docs.qualcomm.com/doc/80-88500-1/topic/42_Configure_I2C_in_kernel_.html](https://docs.qualcomm.com/doc/80-88500-1/topic/42_Configure_I2C_in_kernel_.html) ## Before you begin The following files are required to configure the QUP core as I^2^C in the kernel: | File type | Description | | --- | --- | | Device tree source | Linux Ubuntu:
\kernel\msm-5.4\arch\arm64\boot\dts\qcom\kona-qupv3.dtsi



Linux Embedded:
\kernel\msm-5.15\arch\arm64\boot\dts\qcom\kona-qupv3.dtsi | | Pin control settings | Linux Ubuntu:
\kernel\msm-5.4\arch\arm64\boot\dts\qcom\kona-pinctrl.dtsi



Linux Embedded:
\kernel\msm-5.15\arch\arm64\boot\dts\qcom\kona-pinctrl.dtsi | | TrustZone settings | \trustzone\_images\core\settings\buses\qup\_accesscontrol\qupv3\ config\kona\QUPAC\_Access.c | ## About this task To configure and use any of the QUP cores as an I^2^C device, do the following: Note: Here, `qupv3_se3_i2c` is considered as an example. ## Procedure 1. To create a device tree node, see the following example and modify one of the files: - Linux Ubuntu: \kernel\msm-5.4\arch\arm64\boot\dts\qcom\sdm845-qupv3.dtsi - Linux Embedded: \kernel\msm-5.15\arch\arm64\boot\dts\qcom\sdm845-qupv3.dtsi qupv3_se3_i2c: i2c@88c000 { compatible = "qcom,i2c-geni";//Manufacturer model of serial driver reg = <0x88c000 0x4000>; //SE address and size interrupts = ; #address-cells = <1>; #size-cells = <0>; clock-names = "se-clk", "m-ahb", "s-ahb";//clocks name /*clocks for SE*/ clocks = <&clock_gcc GCC_QUPV3_WRAP0_S3_CLK>, <&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, <&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; /* pinctrl settings*/ pinctrl-names = "default", "sleep"; pinctrl-0 = <&qupv3_se3_i2c_active>; pinctrl-1 = <&qupv3_se3_i2c_sleep>; qcom,wrapper-core = <&qupv3_0>; status = "disabled";// I2C is disabled, status OK enables it };Copy to clipboard 2. See the [QUP configuration with 20 QUPs for GPIO](https://docs.qualcomm.com/doc/80-88500-1/topic/16_Qualcomm_universal_peripheral__QUP_.html#Qualcomm_universal_peripheral__QUP__16__table_1) and chipset software interface and modify the pin control settings in one of the files as shown in the following example: - Linux Ubuntu: \kernel\msm-5.4\arch\arm64\boot\dts\qcom\kona-pinctrl.dtsi - Linux Embedded: \kernel\msm-5.15\arch\arm64\boot\dts\qcom\kona-pinctrl.dtsi qupv3_se3_i2c_pins: qupv3_se3_i2c_pins { qupv3_se3_i2c_active: qupv3_se3_i2c_active { mux { pins = "gpio41", "gpio42"; function = "qup3"; }; config { pins = "gpio41", "gpio42"; drive-strength = <2>; bias-disable; }; }; qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep { mux { pins = "gpio41", "gpio42"; function = "gpio"; }; config { pins = "gpio41", "gpio42"; drive-strength = <2>; bias-pull-up; }; }; };Copy to clipboard 3. Add the I^2^C instance in the TrustZone. In the \trustzone\_images\core\settings\buses\qup\_accesscontrol\qupv3\config\kona\QUPAC\_Access.c file, add the I^2^C instance as: const QUPv3_se_security_permissions_type qupv3_perms_default[] = { ---- ---- { QUPV3_0_SE3, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE }, ---- ---- };Copy to clipboard **Parent Topic:** [I2C in QUP](https://docs.qualcomm.com/doc/80-88500-1/topic/41_I2C_in_QUP_v3.html) Last Published: Aug 18, 2023 [Previous Topic I2C in QUP](https://docs.qualcomm.com/bundle/publicresource/80-88500-1/topics/41_I2C_in_QUP_v3.md) [Next Topic Configure I2C in UEFI](https://docs.qualcomm.com/bundle/publicresource/80-88500-1/topics/44_Configure_I2C_in_UEFI.md)