# Configure I2C in UEFI Source: [https://docs.qualcomm.com/doc/80-88500-1/topic/44_Configure_I2C_in_UEFI.html](https://docs.qualcomm.com/doc/80-88500-1/topic/44_Configure_I2C_in_UEFI.html) ## Before you begin The following files are required to configure the QUP as I^2^C in UEFI: | File type | Description | | --- | --- | | Config settings | | | TrustZone settings | \trustzone\_images\core\settings\buses\qup\_accesscontrol\qupv3\ config\kona\QUPAC\_Access.c | ## About this task To configure and use any of the QUP cores as an XBL core or UEFI I^2^C, do the following: Note: As an example, the following steps are to configure `QUP0 I2C3` in UEFI. ## Procedure 1. Declare the I2C4 instance in the `i2c_devcfg.c` file as following. The numbering of the I^2^C serial engine starts from 1. Hence, SE3 is I2C4. \boot_images\QcomPkg\SocPkg\kona\Settings\I2C\core\\i2c_devcfg.c #include #include "gpi.h" #define QUPV3_0_CORE_BASE_ADDRESS 0x00800000 #define QUPV3_0_CORE_COMMON_BASE_ADDRESS 0x008C0000 #define QUPV3_1_CORE_BASE_ADDRESS 0x00A00000 #define QUPV3_1_CORE_COMMON_BASE_ADDRESS 0x00AC0000 #define ENABLE_I2C_04 #ifdef ENABLE_I2C_04 plat_device_config i2c_device_config_04 = { .core_base_addr = (uint8 *) QUPV3_0_CORE_BASE_ADDRESS, .common_base_addr = (uint8 *) QUPV3_0_CORE_COMMON_BASE_ADDRESS, .core_offset = 0x0008C000, .qupv3_instance = QUP_0, .core_index = 4, .core_irq = 0, .polled_mode = TRUE, .min_data_length_for_dma = 0, .gpi_index = 3, .scl_encoding = TOP_I2C_04_SCL, .sda_encoding = TOP_I2C_04_SDA, .tcsr_base_addr = (uint8 *) 0x01FC0000, .tcsr_reg_offset = 0x00000000, .tcsr_reg_value = 0x00000000, .common_clocks = (uint8 **) common_clocks_str_0, .se_clock = (uint8 **) (se_clocks_str_0 + 3), .clock_config = clk_cfg, }; #endifCopy to clipboard 2. Uncomment `/dev/i2c4` the `QcomPkg/SDM845Pkg/Settings/I2C/core/i2c_devcfg_Sdm845.xml` file. i2c_device_config_06 Copy to clipboard 3. In the \trustzone\_images\core\settings\buses\qup\_accesscontrol\qupv3\ config\kona\QUPAC\_Access.c file, add the I^2^C instance. { QUPV3_0_SE3, QUPV3_PROTOCOL_I2C, QUPV3_MODE_FIFO,AC_HLOS, TRUE, TRUE,FALSE }, Copy to clipboard 4. In the QcomPkg/SDM845Pkg/LA/Core.fdf file, enable the I^2^C protocol. -#INF QcomPkg/Drivers/I2CDxe/I2CDxe.inf +INF QcomPkg/Drivers/I2CDxe/I2CDxe.infCopy to clipboard 5. Add the I^2^C-related `lib/protocol` definition in the `*.inf` files. [LibraryClasses] I2CApiLib [Protocols] gQcomI2CProtocolGuidCopy to clipboard 6. To use the I^2^C function, see the boot\_images\QcomPkg\QcomTestPkg\I2CApp\I2Ceeprom.c file. 7. Add `i2c_open()`, `i2c_read()`, or `i2c_write()`, `i2c_close()` functions in this same sequence in the code. Note: - To use `i2c_7` when using `i2c_open()` function, the I^2^C instance must be defined as `I2C_INSTANCE_08`. - Ensure that `GpiDxe.inf` and `I2C.efi` files are loaded before calling the `I2c_open()` function. **Parent Topic:** [I2C in QUP](https://docs.qualcomm.com/doc/80-88500-1/topic/41_I2C_in_QUP_v3.html) Last Published: Aug 18, 2023 [Previous Topic Configure I2C in kernel](https://docs.qualcomm.com/bundle/publicresource/80-88500-1/topics/42_Configure_I2C_in_kernel_.md) [Next Topic Enable I2C bus in UEFI](https://docs.qualcomm.com/bundle/publicresource/80-88500-1/topics/45_Enable_I2C_bus_in_UEFI.md)