# Clock configuration

Source: [https://docs.qualcomm.com/doc/80-88500-1/topic/70_Clock_configuration.html](https://docs.qualcomm.com/doc/80-88500-1/topic/70_Clock_configuration.html)

In the DTS file, for each sensor node, configure the clock source as:

    clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; 
    clock-names = "cam_clk";
    clock-cntl-level = "turbo"; 
    clock-rates = <24000000>;Copy to clipboard

The order of the lists in the two properties is important. The nth clock-name corresponds to the nth entry in the clock property. Do not change the list order, as it is parsed in the clock framework.

By default, up to four `CAM_MCLK` running at 19.2 MHz are supported. The clock rate is configured based on the sensor XML file. The `CAM_CLK` peak-to-peak jitter is less than 400 ps with the default frequency.

**Parent Topic:** [Sensor hardware configuration](https://docs.qualcomm.com/doc/80-88500-1/topic/62_Sensor_hardware_configuration.html)

Last Published: Aug 18, 2023

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