# Qualcomm Spectra 480
Source: [https://docs.qualcomm.com/doc/80-88500-4/topic/124_Qualcomm_Spectra_480.html](https://docs.qualcomm.com/doc/80-88500-4/topic/124_Qualcomm_Spectra_480.html)
An image signal processor (ISP) tunes the camera parameters to ensure that the device
captures high quality images. The Qualcomm Spectra 480 ISP supports tuning for seven concurrent
cameras at the hardware level. However, the number of cameras enabled end to end at software
level may be different.
Table : Specifications of Camera ISP
| Feature | Qualcomm Spectra 480 |
| --- | --- |
| Maximum real-time sensor input resolution | - 2x full IFE processing – 25 MP (4:3), 18 MP (16:9 aspect ratio)
- 5x IFE_Lite processing – Mono/YUV interface for miscellaneous CV use cases
|
| Camera interfaces | - DPHY 1.2 – 4/4/4/4/4/4 (2.5 Gbps/lane)
- CPHY 1.2 – 10.28 Gbps/T
- Connect up to 12x cameras, 7x concurrent
|
| ZSL performance | - 2x 25M at 30 fps – Dual camera
- 1x 64M at 30 fps – Single camera
|
| Video | 10-bit 4K/120, 8K/30 support with inline hardware EIS |
| Image quality and imaging
improvements | - PDPC for R, B and G; 2x1 and 2x2 OCL
- PDLib for 2PD and sparse PD
- Machine learning-based face detection hardware
- MCTF with local motion compensation
- Mid/low frequency denoising improvements and local contrast enhancement
- Adaptive lens shading correction to recover highlight details
- Binning correction to remove artifacts due to sensor binning
- Video super resolution
- quadCFA binning
|
| Bayer Processing Segment (BPS) tap-out points | |
| Power improvements | - All Qualcomm Robotics RB5 camera use cases can be exercised at lower voltage
- Inline hardware EIS
- Multiple outputs from one pass (SIMO)
- Better compression to reduce bandwidth and power consumption
- 4K at 120 fps camcorder support
|
Figure : High-level architecture of Qualcomm Spectra 480
- Camera Serial Interface Decoder (CSID) module
- Image Front End (IFE) (x 2)
- IFE\_Lite (x 5)
- BPS for snapshot
- Image Processing Engine (IPE)
- VPU: Codec
- DPU
Figure : High-level architecture of Qualcomm Spectra 480 (BPS)
- BPS:
- Snapshot path only
- Bayer processing, for example, demosaic, PDAF pixel correction (including 2x1/2x2 OCL), lens
shading correction, and so on
- Downscaling for registration and alignment of sequential frames for multi-frame processing
- Multiple format support for flexible hybrid of hardware and software
- No HNR in BPS
**Parent Topic:** [Camera](https://docs.qualcomm.com/doc/80-88500-4/topic/122_Camera.html)
Last Published: Aug 18, 2023
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