# NoC (bus) configuration

Source: [https://docs.qualcomm.com/doc/80-88500-4/topic/16_NoC__bus__configuration.html](https://docs.qualcomm.com/doc/80-88500-4/topic/16_NoC__bus__configuration.html)

The network-on-chip (NoC) facilitates and controls the data flow using a bus interface.
    The NoC configuration can be done for various system and memory cores.

The resource power manager (RPM) owns the bus and double data rate (DDR) clocks. It chooses a
      performance level that satisfies all outstanding requests for a bus. The requests come from
      any client such as applications processor subsystem (APSS) or low power audio subsystem
      (LPASS).

Table : System NoC performance levels

| Performance level | Frequency (MHz) | Source | VDD\_CX |
| --- | --- | --- | --- |
| 0 | 19.20 | CXO | MinSVS |
| 1 | 37.50 | GPLL0 | MinSVS |
| 2 | 50.00 | GPLL0 | LowSVS |
| 3 | 100.00 | GPLL0 | SVS |
| 4 | 200.00 | GPLL0 | Nominal |
| 5 | 240.00 | GPLL0 | Turbo |

Table : Configuration NoC performance levels

| Performance level | Frequency (MHz) | Source | VDD\_CX |
| --- | --- | --- | --- |
| 0 | 19.2 | CXO | MinSVS |
| 1 | 37.5 | GPLL0 | SVS |
| 2 | 75 | GPLL0 | Nominal |

Table : Memory NoC performance levels

| Performance level | Frequency (MHz) | Source | VDD\_CX |
| --- | --- | --- | --- |
| 0 | 19.2 | CXO | MinSVS |
| 1 | 150 | GPLL0 | MinSVS |
| 2 | 300 | GPLL0 | LowSVS |
| 3 | 466.5 | GPLL5 | SVS |
| 4 | 600 | GPLL0 | SVS\_L1 |
| 5 | 806 | GPLL4 | Nominal |
| 6 | 933 | GPLL5 | Turbo |
| 7 | 1020 | GPLL10 | Turbo\_L1 |

**Parent Topic:** [Clock](https://docs.qualcomm.com/doc/80-88500-4/topic/13_Clock.html)

Last Published: Aug 18, 2023

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