# Overview Qualcomm Layout Checker is a web-based tool for performing electrical Design Rule Checks (DRC) on PCB layouts. The tool validates layout designs against Qualcomm chipset interface specifications and design guidelines. ## Key features - Performs electrical DRC for multiple interfaces (CSI, DSI, USB, PCIe, etc.) - Validates impedance, trace spacing, and routing requirements - Supports ODB++ and Allegro Board file formats - Generates comprehensive Excel reports with violation snapshots - Allows multiple interface selection for batch processing ## Next steps - [Get started with Qualcomm Layout Checker](https://docs.qualcomm.com/doc/80-99775-1/topic/layout-checker_getting_started.html) - [Configure and run a layout check](https://docs.qualcomm.com/doc/80-99775-1/topic/layout-checker_user_guide.html) - [Review frequently asked questions](https://docs.qualcomm.com/doc/80-99775-1/topic/faq.html) - [Request assistance with Layout Checker](https://docs.qualcomm.com/doc/80-99775-1/topic/layout-checker_contact.html) Last Published: Sep 30, 2026 [Previous Topic Qualcomm® Layout Checker Reference Guide](https://docs.qualcomm.com/bundle/publicresource/80-99775-1/topics/index_layout-checker.md) [Next Topic Get started with Qualcomm Layout Checker](https://docs.qualcomm.com/bundle/publicresource/80-99775-1/topics/layout-checker_getting_started.md)